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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
32b11273 CR |
2 | /* |
3 | * Copyright (C) 2011 OMICRON electronics GmbH | |
4 | * | |
a430fa06 | 5 | * based on drivers/mtd/nand/raw/nand_spl_load.c |
32b11273 CR |
6 | * |
7 | * Copyright (C) 2011 | |
8 | * Heiko Schocher, DENX Software Engineering, [email protected]. | |
32b11273 CR |
9 | */ |
10 | ||
a79fc7a7 | 11 | #include <config.h> |
4d72caa5 | 12 | #include <image.h> |
ab12179b | 13 | #include <imx_container.h> |
f7ae49fc | 14 | #include <log.h> |
ff0960f9 | 15 | #include <spi.h> |
32b11273 | 16 | #include <spi_flash.h> |
36afd451 | 17 | #include <errno.h> |
a4cc1c48 | 18 | #include <spl.h> |
a04d5f60 | 19 | #include <spl_load.h> |
401d1c4f | 20 | #include <asm/global_data.h> |
b02c4e94 | 21 | #include <asm/io.h> |
7de8bd03 | 22 | #include <dm/ofnode.h> |
2bac55bc | 23 | |
00d55956 LV |
24 | static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector, |
25 | ulong count, void *buf) | |
26 | { | |
0c6c83e6 | 27 | struct spi_flash *flash = load->priv; |
00d55956 LV |
28 | ulong ret; |
29 | ||
30 | ret = spi_flash_read(flash, sector, count, buf); | |
31 | if (!ret) | |
32 | return count; | |
33 | else | |
34 | return 0; | |
35 | } | |
ec649330 PF |
36 | |
37 | unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash) | |
38 | { | |
39 | return CONFIG_SYS_SPI_U_BOOT_OFFS; | |
40 | } | |
41 | ||
6dd18a65 VA |
42 | u32 __weak spl_spi_boot_bus(void) |
43 | { | |
44 | return CONFIG_SF_DEFAULT_BUS; | |
45 | } | |
46 | ||
47 | u32 __weak spl_spi_boot_cs(void) | |
48 | { | |
49 | return CONFIG_SF_DEFAULT_CS; | |
50 | } | |
51 | ||
32b11273 CR |
52 | /* |
53 | * The main entry for SPI booting. It's necessary that SDRAM is already | |
54 | * configured and available since this code loads the main U-Boot image | |
55 | * from SPI into SDRAM and starts it from there. | |
56 | */ | |
2a2ee2ac SG |
57 | static int spl_spi_load_image(struct spl_image_info *spl_image, |
58 | struct spl_boot_device *bootdev) | |
32b11273 | 59 | { |
36afd451 | 60 | int err = 0; |
ec649330 | 61 | unsigned int payload_offs; |
32b11273 | 62 | struct spi_flash *flash; |
6dd18a65 VA |
63 | unsigned int sf_bus = spl_spi_boot_bus(); |
64 | unsigned int sf_cs = spl_spi_boot_cs(); | |
a04d5f60 | 65 | struct spl_load_info load; |
32b11273 CR |
66 | |
67 | /* | |
68 | * Load U-Boot image from SPI flash into RAM | |
b0cc1b84 PD |
69 | * In DM mode: defaults speed and mode will be |
70 | * taken from DT when available | |
32b11273 | 71 | */ |
6dd18a65 | 72 | flash = spi_flash_probe(sf_bus, sf_cs, |
88e34e5f NK |
73 | CONFIG_SF_DEFAULT_SPEED, |
74 | CONFIG_SF_DEFAULT_MODE); | |
32b11273 | 75 | if (!flash) { |
a4cc1c48 | 76 | puts("SPI probe failed.\n"); |
36afd451 | 77 | return -ENODEV; |
32b11273 CR |
78 | } |
79 | ||
14509a28 SA |
80 | load.priv = flash; |
81 | spl_set_bl_len(&load, 1); | |
82 | load.read = spl_spi_fit_read; | |
83 | ||
a04d5f60 | 84 | #if CONFIG_IS_ENABLED(OS_BOOT) |
14509a28 SA |
85 | if (spl_start_uboot()) { |
86 | int err = spl_load(spl_image, bootdev, &load, 0, | |
87 | CFG_SYS_SPI_KERNEL_OFFS); | |
88 | ||
89 | if (!err) | |
90 | /* Read device tree. */ | |
91 | return spi_flash_read(flash, CFG_SYS_SPI_ARGS_OFFS, | |
92 | CFG_SYS_SPI_ARGS_SIZE, | |
93 | (void *)CONFIG_SPL_PAYLOAD_ARGS_ADDR); | |
94 | } | |
a04d5f60 | 95 | #endif |
32b11273 | 96 | |
a04d5f60 | 97 | payload_offs = spl_spi_get_uboot_offs(flash); |
414cc151 SG |
98 | if (CONFIG_IS_ENABLED(OF_REAL)) { |
99 | payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset", | |
100 | payload_offs); | |
101 | } | |
2bac55bc | 102 | |
a04d5f60 SA |
103 | err = spl_load(spl_image, bootdev, &load, 0, payload_offs); |
104 | if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) | |
105 | err = spi_nor_remove(flash); | |
36afd451 | 106 | return err; |
32b11273 | 107 | } |
139db7af | 108 | /* Use priorty 1 so that boards can override this */ |
ebc4ef61 | 109 | SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image); |