]> Git Repo - J-u-boot.git/blame - drivers/pci_indirect.c
* Patch by Wolter Kamphuis, 15 Dec 2003:
[J-u-boot.git] / drivers / pci_indirect.c
CommitLineData
affae2bf
WD
1/*
2 * Support for indirect PCI bridges.
3 *
4 * Copyright (C) 1998 Gabriel Paubert.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <common.h>
13
14#ifdef CONFIG_PCI
ea909b76 15#ifndef __I386__
affae2bf
WD
16
17#include <asm/processor.h>
18#include <asm/io.h>
19#include <pci.h>
20
21#define cfg_read(val, addr, type, op) *val = op((type)(addr))
22#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
23
5d232d0e 24#if defined(CONFIG_MPC8260)
affae2bf
WD
25#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
26static int \
27indirect_##rw##_config_##size(struct pci_controller *hose, \
28 pci_dev_t dev, int offset, type val) \
29{ \
30 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
4d75a504 31 sync(); \
affae2bf
WD
32 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
33 return 0; \
34}
42d1f039
WD
35#elif defined(CONFIG_E500)
36#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
37static int \
38indirect_##rw##_config_##size(struct pci_controller *hose, \
39 pci_dev_t dev, int offset, type val) \
40{ \
41 *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
42 sync(); \
43 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
44 return 0; \
45}
4d75a504
WD
46#else
47#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
48static int \
49indirect_##rw##_config_##size(struct pci_controller *hose, \
50 pci_dev_t dev, int offset, type val) \
51{ \
52 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
53 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
54 return 0; \
55}
56#endif
affae2bf
WD
57
58#define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \
59static int \
60indirect_##rw##_config_##size(struct pci_controller *hose, \
61 pci_dev_t dev, int offset, type val) \
62{ \
63 unsigned int msr = mfmsr(); \
64 mtmsr(msr & ~(MSR_EE | MSR_CE)); \
65 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
66 cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
67 out_le32(hose->cfg_addr, 0x00000000); \
68 mtmsr(msr); \
69 return 0; \
70}
71
72INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
73INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
74INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
75#ifdef CONFIG_405GP
76INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
77INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
78INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
79#else
80INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
81INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
82INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
83#endif
84
85void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
86{
87 pci_set_ops(hose,
88 indirect_read_config_byte,
89 indirect_read_config_word,
90 indirect_read_config_dword,
91 indirect_write_config_byte,
92 indirect_write_config_word,
93 indirect_write_config_dword);
94
95 hose->cfg_addr = (unsigned int *) cfg_addr;
96 hose->cfg_data = (unsigned char *) cfg_data;
97}
98
99#endif
ea909b76 100#endif
This page took 0.0401 seconds and 4 git commands to generate.