[J-u-boot.git] / include / configs / ds414.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2014 Stefan Roese <[email protected]>
 */

#ifndef _CONFIG_SYNOLOGY_DS414_H
#define _CONFIG_SYNOLOGY_DS414_H

/* Vendor kernel expects this MACH_TYPE */
#define CONFIG_MACH_TYPE	3036

/*
 * High Level Configuration Options (easy to change)
 */

/*
 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
 * for DDR ECC byte filling in the SPL before loading the main
 * U-Boot into it.
 */

/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0		MVEBU_TWSI_BASE

/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_SCAN_SHOW
#endif

/* USB/EHCI/XHCI configuration */
#define CONFIG_EHCI_IS_TDI

/*
 * mv-common.h should be defined after CMD configs since it used them
 * to enable certain macros
 */
#include "mv-common.h"

/*
 * Memory layout while starting into the bin_hdr via the
 * BootROM:
 *
 * 0x4000.4000 - 0x4003.4000	headers space (192KiB)
 * 0x4000.4030			bin_hdr start address
 * 0x4003.4000 - 0x4004.7c00	BootROM memory allocations (15KiB)
 * 0x4007.fffc			BootROM stack top
 *
 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
 * L2 cache thus cannot be used.
 */

/* SPL */
/* Defines for SPL */
#define CONFIG_SPL_MAX_SIZE		((128 << 10) - 0x4030)

#define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + (128 << 10))
#define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)

#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif

#define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)

/* DS414 bus width is 32bits */
#define CONFIG_DDR_32BIT

/* Default Environment */
#define CONFIG_LOADADDR		0x80000
#define CONFIG_BOOTCOMMAND					\
	"sf probe; "						\
	"sf read ${loadaddr} 0xd0000 0x2d0000; "		\
	"sf read ${ramdisk_addr_r} 0x3a0000 0x430000; "		\
	"bootm ${loadaddr} ${ramdisk_addr_r}"

#define CONFIG_EXTRA_ENV_SETTINGS				\
	"initrd_high=0xffffffff\0"				\
	"ramdisk_addr_r=0x8000000\0"				\
	"usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0"	\
	"ethmtu=1500\0eth1mtu=1500\0"				\
	"update_uboot=sf probe; dhcp; "				\
		"mw.b ${loadaddr} 0x0 0xd0000; "		\
		"tftpboot ${loadaddr} u-boot-spl.kwb; "		\
		"sf update ${loadaddr} 0x0 0xd0000\0"


/* increase autoneg timeout, my NIC sucks */
#define PHY_ANEG_TIMEOUT	16000

#endif /* _CONFIG_SYNOLOGY_DS414_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
aefb8f4c PS	2	/*
aefb8f4c PS	3	* Copyright (C) 2014 Stefan Roese <[email protected]>
aefb8f4c PS	4	*/
	5
	6	#ifndef _CONFIG_SYNOLOGY_DS414_H
	7	#define _CONFIG_SYNOLOGY_DS414_H
	8
e471ddf0 PS	9	/* Vendor kernel expects this MACH_TYPE */
	10	#define CONFIG_MACH_TYPE 3036
	11
aefb8f4c PS	12	/*
	13	* High Level Configuration Options (easy to change)
	14	*/
aefb8f4c PS	15
	16	/*
	17	* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
	18	* for DDR ECC byte filling in the SPL before loading the main
	19	* U-Boot into it.
	20	*/
aefb8f4c	21
aefb8f4c	22	/* I2C */
aefb8f4c	23	#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
aefb8f4c	24
aefb8f4c PS	25	/* PCIe support */
aefb8f4c PS	26	#ifndef CONFIG_SPL_BUILD
aefb8f4c PS	27	#define CONFIG_PCI_SCAN_SHOW
	28	#endif
	29
	30	/* USB/EHCI/XHCI configuration */
aefb8f4c	31	#define CONFIG_EHCI_IS_TDI
aefb8f4c PS	32
	33	/*
	34	* mv-common.h should be defined after CMD configs since it used them
	35	* to enable certain macros
	36	*/
	37	#include "mv-common.h"
	38
	39	/*
	40	* Memory layout while starting into the bin_hdr via the
	41	* BootROM:
	42	*
	43	* 0x4000.4000 - 0x4003.4000 headers space (192KiB)
	44	* 0x4000.4030 bin_hdr start address
	45	* 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
	46	* 0x4007.fffc BootROM stack top
	47	*
	48	* The address space between 0x4007.fffc and 0x400f.fff is not locked in
	49	* L2 cache thus cannot be used.
	50	*/
	51
	52	/* SPL */
	53	/* Defines for SPL */
aefb8f4c PS	54	#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
	55
	56	#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
	57	#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
	58
	59	#ifdef CONFIG_SPL_BUILD
	60	#define CONFIG_SYS_MALLOC_SIMPLE
	61	#endif
	62
	63	#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
	64	#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
	65
aefb8f4c PS	66	/* DS414 bus width is 32bits */
	67	#define CONFIG_DDR_32BIT
	68
aefb8f4c	69	/* Default Environment */
aefb8f4c	70	#define CONFIG_LOADADDR 0x80000
e471ddf0 PS	71	#define CONFIG_BOOTCOMMAND \
	72	"sf probe; " \
	73	"sf read ${loadaddr} 0xd0000 0x2d0000; " \
	74	"sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
	75	"bootm ${loadaddr} ${ramdisk_addr_r}"
	76
	77	#define CONFIG_EXTRA_ENV_SETTINGS \
	78	"initrd_high=0xffffffff\0" \
	79	"ramdisk_addr_r=0x8000000\0" \
	80	"usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
a751f83b PS	81	"ethmtu=1500\0eth1mtu=1500\0" \
	82	"update_uboot=sf probe; dhcp; " \
	83	"mw.b ${loadaddr} 0x0 0xd0000; " \
	84	"tftpboot ${loadaddr} u-boot-spl.kwb; " \
	85	"sf update ${loadaddr} 0x0 0xd0000\0"
	86
aefb8f4c	87
7d3c6c6e PS	88	/* increase autoneg timeout, my NIC sucks */
	89	#define PHY_ANEG_TIMEOUT 16000
	90
aefb8f4c	91	#endif /* _CONFIG_SYNOLOGY_DS414_H */