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83d290c5 | 1 | # SPDX-License-Identifier: GPL-2.0+ |
c609719b | 2 | # |
eca3aeb3 | 3 | # (C) Copyright 2000 - 2013 |
c609719b | 4 | # Wolfgang Denk, DENX Software Engineering, [email protected]. |
c609719b WD |
5 | |
6 | Summary: | |
7 | ======== | |
8 | ||
24ee89b9 | 9 | This directory contains the source code for U-Boot, a boot loader for |
e86e5a07 WD |
10 | Embedded boards based on PowerPC, ARM, MIPS and several other |
11 | processors, which can be installed in a boot ROM and used to | |
12 | initialize and test the hardware or to download and run application | |
13 | code. | |
c609719b WD |
14 | |
15 | The development of U-Boot is closely related to Linux: some parts of | |
24ee89b9 WD |
16 | the source code originate in the Linux source tree, we have some |
17 | header files in common, and special provision has been made to | |
c609719b WD |
18 | support booting of Linux images. |
19 | ||
20 | Some attention has been paid to make this software easily | |
21 | configurable and extendable. For instance, all monitor commands are | |
22 | implemented with the same call interface, so that it's very easy to | |
23 | add new commands. Also, instead of permanently adding rarely used | |
24 | code (for instance hardware test utilities) to the monitor, you can | |
25 | load and run it dynamically. | |
26 | ||
27 | ||
28 | Status: | |
29 | ======= | |
30 | ||
31 | In general, all boards for which a configuration option exists in the | |
24ee89b9 | 32 | Makefile have been tested to some extent and can be considered |
c609719b WD |
33 | "working". In fact, many of them are used in production systems. |
34 | ||
7207b366 RD |
35 | In case of problems see the CHANGELOG file to find out who contributed |
36 | the specific port. In addition, there are various MAINTAINERS files | |
37 | scattered throughout the U-Boot source identifying the people or | |
38 | companies responsible for various boards and subsystems. | |
c609719b | 39 | |
7207b366 RD |
40 | Note: As of August, 2010, there is no longer a CHANGELOG file in the |
41 | actual U-Boot source tree; however, it can be created dynamically | |
42 | from the Git log using: | |
adb9d851 RD |
43 | |
44 | make CHANGELOG | |
45 | ||
c609719b WD |
46 | |
47 | Where to get help: | |
48 | ================== | |
49 | ||
24ee89b9 | 50 | In case you have questions about, problems with or contributions for |
7207b366 | 51 | U-Boot, you should send a message to the U-Boot mailing list at |
0c32565f PT |
52 | <[email protected]>. There is also an archive of previous traffic |
53 | on the mailing list - please search the archive before asking FAQ's. | |
6681bbb5 NH |
54 | Please see https://lists.denx.de/pipermail/u-boot and |
55 | https://marc.info/?l=u-boot | |
c609719b | 56 | |
218ca724 WD |
57 | Where to get source code: |
58 | ========================= | |
59 | ||
7207b366 | 60 | The U-Boot source code is maintained in the Git repository at |
a3bbd0b9 HS |
61 | https://source.denx.de/u-boot/u-boot.git ; you can browse it online at |
62 | https://source.denx.de/u-boot/u-boot | |
218ca724 | 63 | |
c4bd51e2 | 64 | The "Tags" links on this page allow you to download tarballs of |
11ccc33f | 65 | any version you might be interested in. Official releases are also |
c4bd51e2 NH |
66 | available from the DENX file server through HTTPS or FTP. |
67 | https://ftp.denx.de/pub/u-boot/ | |
68 | ftp://ftp.denx.de/pub/u-boot/ | |
218ca724 WD |
69 | |
70 | ||
c609719b WD |
71 | Where we come from: |
72 | =================== | |
73 | ||
74 | - start from 8xxrom sources | |
047f6ec0 | 75 | - create PPCBoot project (https://sourceforge.net/projects/ppcboot) |
c609719b WD |
76 | - clean up code |
77 | - make it easier to add custom boards | |
78 | - make it possible to add other [PowerPC] CPUs | |
79 | - extend functions, especially: | |
80 | * Provide extended interface to Linux boot loader | |
81 | * S-Record download | |
82 | * network boot | |
9e5616de | 83 | * ATA disk / SCSI ... boot |
047f6ec0 | 84 | - create ARMBoot project (https://sourceforge.net/projects/armboot) |
c609719b | 85 | - add other CPU families (starting with ARM) |
047f6ec0 NH |
86 | - create U-Boot project (https://sourceforge.net/projects/u-boot) |
87 | - current project page: see https://www.denx.de/wiki/U-Boot | |
24ee89b9 WD |
88 | |
89 | ||
90 | Names and Spelling: | |
91 | =================== | |
92 | ||
93 | The "official" name of this project is "Das U-Boot". The spelling | |
94 | "U-Boot" shall be used in all written text (documentation, comments | |
95 | in source files etc.). Example: | |
96 | ||
97 | This is the README file for the U-Boot project. | |
98 | ||
99 | File names etc. shall be based on the string "u-boot". Examples: | |
100 | ||
101 | include/asm-ppc/u-boot.h | |
102 | ||
103 | #include <asm/u-boot.h> | |
104 | ||
105 | Variable names, preprocessor constants etc. shall be either based on | |
106 | the string "u_boot" or on "U_BOOT". Example: | |
107 | ||
108 | U_BOOT_VERSION u_boot_logo | |
109 | IH_OS_U_BOOT u_boot_hush_start | |
c609719b WD |
110 | |
111 | ||
93f19cc0 WD |
112 | Versioning: |
113 | =========== | |
114 | ||
360d883a TW |
115 | Starting with the release in October 2008, the names of the releases |
116 | were changed from numerical release numbers without deeper meaning | |
117 | into a time stamp based numbering. Regular releases are identified by | |
118 | names consisting of the calendar year and month of the release date. | |
119 | Additional fields (if present) indicate release candidates or bug fix | |
120 | releases in "stable" maintenance trees. | |
121 | ||
122 | Examples: | |
c0f40859 | 123 | U-Boot v2009.11 - Release November 2009 |
360d883a | 124 | U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree |
0de21ecb | 125 | U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release |
93f19cc0 WD |
126 | |
127 | ||
c609719b WD |
128 | Directory Hierarchy: |
129 | ==================== | |
130 | ||
6e73ed00 | 131 | /arch Architecture-specific files |
6eae68e4 | 132 | /arc Files generic to ARC architecture |
8d321b81 | 133 | /arm Files generic to ARM architecture |
8d321b81 | 134 | /m68k Files generic to m68k architecture |
8d321b81 | 135 | /microblaze Files generic to microblaze architecture |
8d321b81 | 136 | /mips Files generic to MIPS architecture |
afc1ce82 | 137 | /nds32 Files generic to NDS32 architecture |
8d321b81 | 138 | /nios2 Files generic to Altera NIOS2 architecture |
a47a12be | 139 | /powerpc Files generic to PowerPC architecture |
3fafced7 | 140 | /riscv Files generic to RISC-V architecture |
7207b366 | 141 | /sandbox Files generic to HW-independent "sandbox" |
8d321b81 | 142 | /sh Files generic to SH architecture |
33c7731b | 143 | /x86 Files generic to x86 architecture |
e4eb313a | 144 | /xtensa Files generic to Xtensa architecture |
6e73ed00 SG |
145 | /api Machine/arch-independent API for external apps |
146 | /board Board-dependent files | |
19a91f24 | 147 | /boot Support for images and booting |
740f7e5c | 148 | /cmd U-Boot commands functions |
6e73ed00 | 149 | /common Misc architecture-independent functions |
7207b366 | 150 | /configs Board default configuration files |
8d321b81 | 151 | /disk Code for disk drive partition handling |
6e73ed00 SG |
152 | /doc Documentation (a mix of ReST and READMEs) |
153 | /drivers Device drivers | |
154 | /dts Makefile for building internal U-Boot fdt. | |
155 | /env Environment support | |
8d321b81 PT |
156 | /examples Example code for standalone applications, etc. |
157 | /fs Filesystem code (cramfs, ext2, jffs2, etc.) | |
158 | /include Header Files | |
7207b366 RD |
159 | /lib Library routines generic to all architectures |
160 | /Licenses Various license files | |
8d321b81 PT |
161 | /net Networking code |
162 | /post Power On Self Test | |
7207b366 RD |
163 | /scripts Various build scripts and Makefiles |
164 | /test Various unit test files | |
6e73ed00 | 165 | /tools Tools to build and sign FIT images, etc. |
c609719b | 166 | |
c609719b WD |
167 | Software Configuration: |
168 | ======================= | |
169 | ||
170 | Configuration is usually done using C preprocessor defines; the | |
171 | rationale behind that is to avoid dead code whenever possible. | |
172 | ||
173 | There are two classes of configuration variables: | |
174 | ||
175 | * Configuration _OPTIONS_: | |
176 | These are selectable by the user and have names beginning with | |
177 | "CONFIG_". | |
178 | ||
179 | * Configuration _SETTINGS_: | |
180 | These depend on the hardware etc. and should not be meddled with if | |
181 | you don't know what you're doing; they have names beginning with | |
6d0f6bcf | 182 | "CONFIG_SYS_". |
c609719b | 183 | |
7207b366 RD |
184 | Previously, all configuration was done by hand, which involved creating |
185 | symbolic links and editing configuration files manually. More recently, | |
186 | U-Boot has added the Kbuild infrastructure used by the Linux kernel, | |
187 | allowing you to use the "make menuconfig" command to configure your | |
188 | build. | |
c609719b WD |
189 | |
190 | ||
191 | Selection of Processor Architecture and Board Type: | |
192 | --------------------------------------------------- | |
193 | ||
194 | For all supported boards there are ready-to-use default | |
ab584d67 | 195 | configurations available; just type "make <board_name>_defconfig". |
c609719b WD |
196 | |
197 | Example: For a TQM823L module type: | |
198 | ||
199 | cd u-boot | |
ab584d67 | 200 | make TQM823L_defconfig |
c609719b | 201 | |
7207b366 RD |
202 | Note: If you're looking for the default configuration file for a board |
203 | you're sure used to be there but is now missing, check the file | |
204 | doc/README.scrapyard for a list of no longer supported boards. | |
c609719b | 205 | |
75b3c3aa SG |
206 | Sandbox Environment: |
207 | -------------------- | |
208 | ||
209 | U-Boot can be built natively to run on a Linux host using the 'sandbox' | |
210 | board. This allows feature development which is not board- or architecture- | |
211 | specific to be undertaken on a native platform. The sandbox is also used to | |
212 | run some of U-Boot's tests. | |
213 | ||
bbb140ed | 214 | See doc/arch/sandbox.rst for more details. |
75b3c3aa SG |
215 | |
216 | ||
db910353 SG |
217 | Board Initialisation Flow: |
218 | -------------------------- | |
219 | ||
220 | This is the intended start-up flow for boards. This should apply for both | |
7207b366 RD |
221 | SPL and U-Boot proper (i.e. they both follow the same rules). |
222 | ||
223 | Note: "SPL" stands for "Secondary Program Loader," which is explained in | |
224 | more detail later in this file. | |
225 | ||
226 | At present, SPL mostly uses a separate code path, but the function names | |
227 | and roles of each function are the same. Some boards or architectures | |
228 | may not conform to this. At least most ARM boards which use | |
229 | CONFIG_SPL_FRAMEWORK conform to this. | |
230 | ||
231 | Execution typically starts with an architecture-specific (and possibly | |
232 | CPU-specific) start.S file, such as: | |
233 | ||
234 | - arch/arm/cpu/armv7/start.S | |
235 | - arch/powerpc/cpu/mpc83xx/start.S | |
236 | - arch/mips/cpu/start.S | |
db910353 | 237 | |
7207b366 RD |
238 | and so on. From there, three functions are called; the purpose and |
239 | limitations of each of these functions are described below. | |
db910353 SG |
240 | |
241 | lowlevel_init(): | |
242 | - purpose: essential init to permit execution to reach board_init_f() | |
243 | - no global_data or BSS | |
244 | - there is no stack (ARMv7 may have one but it will soon be removed) | |
245 | - must not set up SDRAM or use console | |
246 | - must only do the bare minimum to allow execution to continue to | |
247 | board_init_f() | |
248 | - this is almost never needed | |
249 | - return normally from this function | |
250 | ||
251 | board_init_f(): | |
252 | - purpose: set up the machine ready for running board_init_r(): | |
253 | i.e. SDRAM and serial UART | |
254 | - global_data is available | |
255 | - stack is in SRAM | |
256 | - BSS is not available, so you cannot use global/static variables, | |
257 | only stack variables and global_data | |
258 | ||
259 | Non-SPL-specific notes: | |
260 | - dram_init() is called to set up DRAM. If already done in SPL this | |
261 | can do nothing | |
262 | ||
263 | SPL-specific notes: | |
264 | - you can override the entire board_init_f() function with your own | |
265 | version as needed. | |
266 | - preloader_console_init() can be called here in extremis | |
267 | - should set up SDRAM, and anything needed to make the UART work | |
499696e4 | 268 | - there is no need to clear BSS, it will be done by crt0.S |
1425465a AD |
269 | - for specific scenarios on certain architectures an early BSS *can* |
270 | be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing | |
271 | of BSS prior to entering board_init_f()) but doing so is discouraged. | |
272 | Instead it is strongly recommended to architect any code changes | |
273 | or additions such to not depend on the availability of BSS during | |
274 | board_init_f() as indicated in other sections of this README to | |
275 | maintain compatibility and consistency across the entire code base. | |
db910353 SG |
276 | - must return normally from this function (don't call board_init_r() |
277 | directly) | |
278 | ||
279 | Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at | |
280 | this point the stack and global_data are relocated to below | |
281 | CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of | |
282 | memory. | |
283 | ||
284 | board_init_r(): | |
285 | - purpose: main execution, common code | |
286 | - global_data is available | |
287 | - SDRAM is available | |
288 | - BSS is available, all static/global variables can be used | |
289 | - execution eventually continues to main_loop() | |
290 | ||
291 | Non-SPL-specific notes: | |
292 | - U-Boot is relocated to the top of memory and is now running from | |
293 | there. | |
294 | ||
295 | SPL-specific notes: | |
296 | - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and | |
297 | CONFIG_SPL_STACK_R_ADDR points into SDRAM | |
298 | - preloader_console_init() can be called here - typically this is | |
0680f1b1 | 299 | done by selecting CONFIG_SPL_BOARD_INIT and then supplying a |
db910353 SG |
300 | spl_board_init() function containing this call |
301 | - loads U-Boot or (in falcon mode) Linux | |
302 | ||
303 | ||
c609719b WD |
304 | Configuration Options: |
305 | ---------------------- | |
306 | ||
307 | Configuration depends on the combination of board and CPU type; all | |
308 | such information is kept in a configuration file | |
309 | "include/configs/<board_name>.h". | |
310 | ||
311 | Example: For a TQM823L module, all configuration settings are in | |
312 | "include/configs/TQM823L.h". | |
313 | ||
314 | ||
7f6c2cbc WD |
315 | Many of the options are named exactly as the corresponding Linux |
316 | kernel configuration options. The intention is to make it easier to | |
317 | build a config tool - later. | |
318 | ||
63b2316c AK |
319 | - ARM Platform Bus Type(CCI): |
320 | CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which | |
321 | provides full cache coherency between two clusters of multi-core | |
322 | CPUs and I/O coherency for devices and I/O masters | |
323 | ||
324 | CONFIG_SYS_FSL_HAS_CCI400 | |
325 | ||
326 | Defined For SoC that has cache coherent interconnect | |
327 | CCN-400 | |
7f6c2cbc | 328 | |
c055cee1 AK |
329 | CONFIG_SYS_FSL_HAS_CCN504 |
330 | ||
331 | Defined for SoC that has cache coherent interconnect CCN-504 | |
332 | ||
c609719b WD |
333 | The following options need to be configured: |
334 | ||
2628114e KP |
335 | - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX. |
336 | ||
337 | - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. | |
6ccec449 | 338 | |
66412c63 | 339 | - 85xx CPU Options: |
ffd06e02 YS |
340 | CONFIG_SYS_PPC64 |
341 | ||
342 | Specifies that the core is a 64-bit PowerPC implementation (implements | |
343 | the "64" category of the Power ISA). This is necessary for ePAPR | |
344 | compliance, among other possible reasons. | |
345 | ||
66412c63 KG |
346 | CONFIG_SYS_FSL_TBCLK_DIV |
347 | ||
348 | Defines the core time base clock divider ratio compared to the | |
349 | system clock. On most PQ3 devices this is 8, on newer QorIQ | |
350 | devices it can be 16 or 32. The ratio varies from SoC to Soc. | |
351 | ||
8f29084a KG |
352 | CONFIG_SYS_FSL_PCIE_COMPAT |
353 | ||
354 | Defines the string to utilize when trying to match PCIe device | |
355 | tree nodes for the given platform. | |
356 | ||
33eee330 SW |
357 | CONFIG_SYS_FSL_ERRATUM_A004510 |
358 | ||
359 | Enables a workaround for erratum A004510. If set, | |
360 | then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and | |
361 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set. | |
362 | ||
363 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV | |
364 | CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional) | |
365 | ||
366 | Defines one or two SoC revisions (low 8 bits of SVR) | |
367 | for which the A004510 workaround should be applied. | |
368 | ||
369 | The rest of SVR is either not relevant to the decision | |
370 | of whether the erratum is present (e.g. p2040 versus | |
371 | p2041) or is implied by the build target, which controls | |
372 | whether CONFIG_SYS_FSL_ERRATUM_A004510 is set. | |
373 | ||
374 | See Freescale App Note 4493 for more information about | |
375 | this erratum. | |
376 | ||
74fa22ed PK |
377 | CONFIG_A003399_NOR_WORKAROUND |
378 | Enables a workaround for IFC erratum A003399. It is only | |
b445bbb4 | 379 | required during NOR boot. |
74fa22ed | 380 | |
9f074e67 PK |
381 | CONFIG_A008044_WORKAROUND |
382 | Enables a workaround for T1040/T1042 erratum A008044. It is only | |
b445bbb4 | 383 | required during NAND boot and valid for Rev 1.0 SoC revision |
9f074e67 | 384 | |
33eee330 SW |
385 | CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY |
386 | ||
387 | This is the value to write into CCSR offset 0x18600 | |
388 | according to the A004510 workaround. | |
389 | ||
64501c66 PJ |
390 | CONFIG_SYS_FSL_DSP_DDR_ADDR |
391 | This value denotes start offset of DDR memory which is | |
392 | connected exclusively to the DSP cores. | |
393 | ||
765b0bdb PJ |
394 | CONFIG_SYS_FSL_DSP_M2_RAM_ADDR |
395 | This value denotes start offset of M2 memory | |
396 | which is directly connected to the DSP core. | |
397 | ||
64501c66 PJ |
398 | CONFIG_SYS_FSL_DSP_M3_RAM_ADDR |
399 | This value denotes start offset of M3 memory which is directly | |
400 | connected to the DSP core. | |
401 | ||
765b0bdb PJ |
402 | CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT |
403 | This value denotes start offset of DSP CCSR space. | |
404 | ||
b135991a PJ |
405 | CONFIG_SYS_FSL_SINGLE_SOURCE_CLK |
406 | Single Source Clock is clocking mode present in some of FSL SoC's. | |
407 | In this mode, a single differential clock is used to supply | |
408 | clocks to the sysclock, ddrclock and usbclock. | |
409 | ||
fb4a2409 AB |
410 | CONFIG_SYS_CPC_REINIT_F |
411 | This CONFIG is defined when the CPC is configured as SRAM at the | |
a187559e | 412 | time of U-Boot entry and is required to be re-initialized. |
fb4a2409 | 413 | |
aade2004 | 414 | CONFIG_DEEP_SLEEP |
b445bbb4 | 415 | Indicates this SoC supports deep sleep feature. If deep sleep is |
aade2004 TY |
416 | supported, core will start to execute uboot when wakes up. |
417 | ||
6cb461b4 DS |
418 | - Generic CPU options: |
419 | CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN | |
420 | ||
421 | Defines the endianess of the CPU. Implementation of those | |
422 | values is arch specific. | |
423 | ||
5614e71b YS |
424 | CONFIG_SYS_FSL_DDR |
425 | Freescale DDR driver in use. This type of DDR controller is | |
1c58857a | 426 | found in mpc83xx, mpc85xx as well as some ARM core SoCs. |
5614e71b YS |
427 | |
428 | CONFIG_SYS_FSL_DDR_ADDR | |
429 | Freescale DDR memory-mapped register base. | |
430 | ||
431 | CONFIG_SYS_FSL_DDR_EMU | |
432 | Specify emulator support for DDR. Some DDR features such as | |
433 | deskew training are not available. | |
434 | ||
435 | CONFIG_SYS_FSL_DDRC_GEN1 | |
436 | Freescale DDR1 controller. | |
437 | ||
438 | CONFIG_SYS_FSL_DDRC_GEN2 | |
439 | Freescale DDR2 controller. | |
440 | ||
441 | CONFIG_SYS_FSL_DDRC_GEN3 | |
442 | Freescale DDR3 controller. | |
443 | ||
34e026f9 YS |
444 | CONFIG_SYS_FSL_DDRC_GEN4 |
445 | Freescale DDR4 controller. | |
446 | ||
9ac4ffbd YS |
447 | CONFIG_SYS_FSL_DDRC_ARM_GEN3 |
448 | Freescale DDR3 controller for ARM-based SoCs. | |
449 | ||
5614e71b YS |
450 | CONFIG_SYS_FSL_DDR1 |
451 | Board config to use DDR1. It can be enabled for SoCs with | |
452 | Freescale DDR1 or DDR2 controllers, depending on the board | |
453 | implemetation. | |
454 | ||
455 | CONFIG_SYS_FSL_DDR2 | |
62a3b7dd | 456 | Board config to use DDR2. It can be enabled for SoCs with |
5614e71b YS |
457 | Freescale DDR2 or DDR3 controllers, depending on the board |
458 | implementation. | |
459 | ||
460 | CONFIG_SYS_FSL_DDR3 | |
461 | Board config to use DDR3. It can be enabled for SoCs with | |
34e026f9 YS |
462 | Freescale DDR3 or DDR3L controllers. |
463 | ||
464 | CONFIG_SYS_FSL_DDR3L | |
465 | Board config to use DDR3L. It can be enabled for SoCs with | |
466 | DDR3L controllers. | |
5614e71b | 467 | |
1b4175d6 PK |
468 | CONFIG_SYS_FSL_IFC_BE |
469 | Defines the IFC controller register space as Big Endian | |
470 | ||
471 | CONFIG_SYS_FSL_IFC_LE | |
472 | Defines the IFC controller register space as Little Endian | |
473 | ||
1c40707e PK |
474 | CONFIG_SYS_FSL_IFC_CLK_DIV |
475 | Defines divider of platform clock(clock input to IFC controller). | |
476 | ||
add63f94 PK |
477 | CONFIG_SYS_FSL_LBC_CLK_DIV |
478 | Defines divider of platform clock(clock input to eLBC controller). | |
479 | ||
4e5b1bd0 YS |
480 | CONFIG_SYS_FSL_DDR_BE |
481 | Defines the DDR controller register space as Big Endian | |
482 | ||
483 | CONFIG_SYS_FSL_DDR_LE | |
484 | Defines the DDR controller register space as Little Endian | |
485 | ||
6b9e309a YS |
486 | CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY |
487 | Physical address from the view of DDR controllers. It is the | |
488 | same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But | |
489 | it could be different for ARM SoCs. | |
490 | ||
6b1e1254 YS |
491 | CONFIG_SYS_FSL_DDR_INTLV_256B |
492 | DDR controller interleaving on 256-byte. This is a special | |
493 | interleaving mode, handled by Dickens for Freescale layerscape | |
494 | SoCs with ARM core. | |
495 | ||
1d71efbb YS |
496 | CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS |
497 | Number of controllers used as main memory. | |
498 | ||
499 | CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS | |
500 | Number of controllers used for other than main memory. | |
501 | ||
44937214 PK |
502 | CONFIG_SYS_FSL_HAS_DP_DDR |
503 | Defines the SoC has DP-DDR used for DPAA. | |
504 | ||
028dbb8d RG |
505 | CONFIG_SYS_FSL_SEC_BE |
506 | Defines the SEC controller register space as Big Endian | |
507 | ||
508 | CONFIG_SYS_FSL_SEC_LE | |
509 | Defines the SEC controller register space as Little Endian | |
510 | ||
92bbd64e DS |
511 | - MIPS CPU options: |
512 | CONFIG_SYS_INIT_SP_OFFSET | |
513 | ||
514 | Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack | |
515 | pointer. This is needed for the temporary stack before | |
516 | relocation. | |
517 | ||
92bbd64e DS |
518 | CONFIG_XWAY_SWAP_BYTES |
519 | ||
520 | Enable compilation of tools/xway-swap-bytes needed for Lantiq | |
521 | XWAY SoCs for booting from NOR flash. The U-Boot image needs to | |
522 | be swapped if a flash programmer is used. | |
523 | ||
b67d8816 CR |
524 | - ARM options: |
525 | CONFIG_SYS_EXCEPTION_VECTORS_HIGH | |
526 | ||
527 | Select high exception vectors of the ARM core, e.g., do not | |
528 | clear the V bit of the c1 register of CP15. | |
529 | ||
207774b2 YS |
530 | COUNTER_FREQUENCY |
531 | Generic timer clock source frequency. | |
532 | ||
533 | COUNTER_FREQUENCY_REAL | |
534 | Generic timer clock source frequency if the real clock is | |
535 | different from COUNTER_FREQUENCY, and can only be determined | |
536 | at run time. | |
537 | ||
73c38934 SW |
538 | - Tegra SoC options: |
539 | CONFIG_TEGRA_SUPPORT_NON_SECURE | |
540 | ||
541 | Support executing U-Boot in non-secure (NS) mode. Certain | |
542 | impossible actions will be skipped if the CPU is in NS mode, | |
543 | such as ARM architectural timer initialization. | |
544 | ||
5da627a4 | 545 | - Linux Kernel Interface: |
5da627a4 WD |
546 | CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] |
547 | ||
b445bbb4 | 548 | When transferring memsize parameter to Linux, some versions |
5da627a4 WD |
549 | expect it to be in bytes, others in MB. |
550 | Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. | |
551 | ||
fec6d9ee | 552 | CONFIG_OF_LIBFDT |
f57f70aa WD |
553 | |
554 | New kernel versions are expecting firmware settings to be | |
213bf8c8 GVB |
555 | passed using flattened device trees (based on open firmware |
556 | concepts). | |
557 | ||
558 | CONFIG_OF_LIBFDT | |
559 | * New libfdt-based support | |
560 | * Adds the "fdt" command | |
3bb342fc | 561 | * The bootm command automatically updates the fdt |
213bf8c8 | 562 | |
f57f70aa WD |
563 | OF_TBCLK - The timebase frequency. |
564 | ||
11ccc33f MZ |
565 | boards with QUICC Engines require OF_QE to set UCC MAC |
566 | addresses | |
3bb342fc | 567 | |
c654b517 SG |
568 | CONFIG_OF_SYSTEM_SETUP |
569 | ||
570 | Other code has addition modification that it wants to make | |
571 | to the flat device tree before handing it off to the kernel. | |
572 | This causes ft_system_setup() to be called before booting | |
573 | the kernel. | |
574 | ||
3887c3fb HS |
575 | CONFIG_OF_IDE_FIXUP |
576 | ||
577 | U-Boot can detect if an IDE device is present or not. | |
578 | If not, and this new config option is activated, U-Boot | |
579 | removes the ATA node from the DTS before booting Linux, | |
580 | so the Linux IDE driver does not probe the device and | |
581 | crash. This is needed for buggy hardware (uc101) where | |
582 | no pull down resistor is connected to the signal IDE5V_DD7. | |
583 | ||
0b2f4eca NG |
584 | - vxWorks boot parameters: |
585 | ||
586 | bootvx constructs a valid bootline using the following | |
9e98b7e3 BM |
587 | environments variables: bootdev, bootfile, ipaddr, netmask, |
588 | serverip, gatewayip, hostname, othbootargs. | |
0b2f4eca NG |
589 | It loads the vxWorks image pointed bootfile. |
590 | ||
81a05d9b | 591 | Note: If a "bootargs" environment is defined, it will override |
0b2f4eca NG |
592 | the defaults discussed just above. |
593 | ||
93bc2193 A |
594 | - Cache Configuration for ARM: |
595 | CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache | |
596 | controller | |
597 | CONFIG_SYS_PL310_BASE - Physical base address of PL310 | |
598 | controller register space | |
599 | ||
6705d81e | 600 | - Serial Ports: |
6705d81e WD |
601 | CONFIG_PL011_CLOCK |
602 | ||
603 | If you have Amba PrimeCell PL011 UARTs, set this variable to | |
604 | the clock speed of the UARTs. | |
605 | ||
606 | CONFIG_PL01x_PORTS | |
607 | ||
608 | If you have Amba PrimeCell PL010 or PL011 UARTs on your board, | |
609 | define this to a list of base addresses for each (supported) | |
610 | port. See e.g. include/configs/versatile.h | |
611 | ||
d57dee57 KM |
612 | CONFIG_SERIAL_HW_FLOW_CONTROL |
613 | ||
614 | Define this variable to enable hw flow control in serial driver. | |
615 | Current user of this option is drivers/serial/nsl16550.c driver | |
6705d81e | 616 | |
c609719b WD |
617 | - Serial Download Echo Mode: |
618 | CONFIG_LOADS_ECHO | |
619 | If defined to 1, all characters received during a | |
620 | serial download (using the "loads" command) are | |
621 | echoed back. This might be needed by some terminal | |
622 | emulations (like "cu"), but may as well just take | |
623 | time on others. This setting #define's the initial | |
624 | value of the "loads_echo" environment variable. | |
625 | ||
302a6487 SG |
626 | - Removal of commands |
627 | If no commands are needed to boot, you can disable | |
628 | CONFIG_CMDLINE to remove them. In this case, the command line | |
629 | will not be available, and when U-Boot wants to execute the | |
630 | boot command (on start-up) it will call board_run_command() | |
631 | instead. This can reduce image size significantly for very | |
632 | simple boot procedures. | |
633 | ||
a5ecbe62 WD |
634 | - Regular expression support: |
635 | CONFIG_REGEX | |
93e14596 WD |
636 | If this variable is defined, U-Boot is linked against |
637 | the SLRE (Super Light Regular Expression) library, | |
638 | which adds regex support to some commands, as for | |
639 | example "env grep" and "setexpr". | |
a5ecbe62 | 640 | |
c609719b | 641 | - Watchdog: |
933ada56 RV |
642 | CONFIG_SYS_WATCHDOG_FREQ |
643 | Some platforms automatically call WATCHDOG_RESET() | |
644 | from the timer interrupt handler every | |
645 | CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the | |
646 | board configuration file, a default of CONFIG_SYS_HZ/2 | |
647 | (i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ | |
648 | to 0 disables calling WATCHDOG_RESET() from the timer | |
649 | interrupt. | |
650 | ||
c609719b WD |
651 | - Real-Time Clock: |
652 | ||
602ad3b3 | 653 | When CONFIG_CMD_DATE is selected, the type of the RTC |
c609719b WD |
654 | has to be selected, too. Define exactly one of the |
655 | following options: | |
656 | ||
c609719b | 657 | CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC |
4e8b7544 | 658 | CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC |
c609719b | 659 | CONFIG_RTC_MC146818 - use MC146818 RTC |
1cb8e980 | 660 | CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC |
c609719b | 661 | CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC |
7f70e853 | 662 | CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC |
412921d2 | 663 | CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC |
3bac3513 | 664 | CONFIG_RTC_DS164x - use Dallas DS164x RTC |
9536dfcc | 665 | CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC |
4c0d4c3b | 666 | CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC |
2bd3cab3 | 667 | CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 |
71d19f30 HS |
668 | CONFIG_SYS_RV3029_TCR - enable trickle charger on |
669 | RV3029 RTC. | |
c609719b | 670 | |
b37c7e5e WD |
671 | Note that if the RTC uses I2C, then the I2C interface |
672 | must also be configured. See I2C Support, below. | |
673 | ||
e92739d3 PT |
674 | - GPIO Support: |
675 | CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO | |
e92739d3 | 676 | |
5dec49ca CP |
677 | The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of |
678 | chip-ngpio pairs that tell the PCA953X driver the number of | |
679 | pins supported by a particular chip. | |
680 | ||
e92739d3 PT |
681 | Note that if the GPIO device uses I2C, then the I2C interface |
682 | must also be configured. See I2C Support, below. | |
683 | ||
aa53233a SG |
684 | - I/O tracing: |
685 | When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O | |
686 | accesses and can checksum them or write a list of them out | |
687 | to memory. See the 'iotrace' command for details. This is | |
688 | useful for testing device drivers since it can confirm that | |
689 | the driver behaves the same way before and after a code | |
690 | change. Currently this is supported on sandbox and arm. To | |
691 | add support for your architecture, add '#include <iotrace.h>' | |
692 | to the bottom of arch/<arch>/include/asm/io.h and test. | |
693 | ||
694 | Example output from the 'iotrace stats' command is below. | |
695 | Note that if the trace buffer is exhausted, the checksum will | |
696 | still continue to operate. | |
697 | ||
698 | iotrace is enabled | |
699 | Start: 10000000 (buffer start address) | |
700 | Size: 00010000 (buffer size) | |
701 | Offset: 00000120 (current buffer offset) | |
702 | Output: 10000120 (start + offset) | |
703 | Count: 00000018 (number of trace records) | |
704 | CRC32: 9526fb66 (CRC32 of all trace records) | |
705 | ||
c609719b WD |
706 | - Timestamp Support: |
707 | ||
43d9616c WD |
708 | When CONFIG_TIMESTAMP is selected, the timestamp |
709 | (date and time) of an image is printed by image | |
710 | commands like bootm or iminfo. This option is | |
602ad3b3 | 711 | automatically enabled when you select CONFIG_CMD_DATE . |
c609719b | 712 | |
923c46f9 KP |
713 | - Partition Labels (disklabels) Supported: |
714 | Zero or more of the following: | |
715 | CONFIG_MAC_PARTITION Apple's MacOS partition table. | |
923c46f9 KP |
716 | CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. |
717 | CONFIG_EFI_PARTITION GPT partition table, common when EFI is the | |
718 | bootloader. Note 2TB partition limit; see | |
719 | disk/part_efi.c | |
c649e3c9 | 720 | CONFIG_SCSI) you must configure support for at |
923c46f9 | 721 | least one non-MTD partition type as well. |
c609719b | 722 | |
c40b2956 WD |
723 | - LBA48 Support |
724 | CONFIG_LBA48 | |
725 | ||
726 | Set this to enable support for disks larger than 137GB | |
4b142feb | 727 | Also look at CONFIG_SYS_64BIT_LBA. |
c40b2956 WD |
728 | Whithout these , LBA48 support uses 32bit variables and will 'only' |
729 | support disks up to 2.1TB. | |
730 | ||
6d0f6bcf | 731 | CONFIG_SYS_64BIT_LBA: |
c40b2956 WD |
732 | When enabled, makes the IDE subsystem use 64bit sector addresses. |
733 | Default is 32bit. | |
734 | ||
c609719b | 735 | - NETWORK Support (PCI): |
ce5207e1 KM |
736 | CONFIG_E1000_SPI |
737 | Utility code for direct access to the SPI bus on Intel 8257x. | |
738 | This does not do anything useful unless you set at least one | |
739 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. | |
740 | ||
c609719b WD |
741 | CONFIG_NATSEMI |
742 | Support for National dp83815 chips. | |
743 | ||
744 | CONFIG_NS8382X | |
745 | Support for National dp8382[01] gigabit chips. | |
746 | ||
45219c46 | 747 | - NETWORK Support (other): |
efdd7319 RH |
748 | CONFIG_CALXEDA_XGMAC |
749 | Support for the Calxeda XGMAC device | |
750 | ||
3bb46d23 | 751 | CONFIG_LAN91C96 |
45219c46 WD |
752 | Support for SMSC's LAN91C96 chips. |
753 | ||
45219c46 WD |
754 | CONFIG_LAN91C96_USE_32_BIT |
755 | Define this to enable 32 bit addressing | |
756 | ||
3bb46d23 | 757 | CONFIG_SMC91111 |
f39748ae WD |
758 | Support for SMSC's LAN91C111 chip |
759 | ||
760 | CONFIG_SMC91111_BASE | |
761 | Define this to hold the physical address | |
762 | of the device (I/O space) | |
763 | ||
764 | CONFIG_SMC_USE_32_BIT | |
765 | Define this if data bus is 32 bits | |
766 | ||
767 | CONFIG_SMC_USE_IOFUNCS | |
768 | Define this to use i/o functions instead of macros | |
769 | (some hardware wont work with macros) | |
770 | ||
dc02bada HS |
771 | CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT |
772 | Define this if you have more then 3 PHYs. | |
773 | ||
b3dbf4a5 ML |
774 | CONFIG_FTGMAC100 |
775 | Support for Faraday's FTGMAC100 Gigabit SoC Ethernet | |
776 | ||
777 | CONFIG_FTGMAC100_EGIGA | |
778 | Define this to use GE link update with gigabit PHY. | |
779 | Define this if FTGMAC100 is connected to gigabit PHY. | |
780 | If your system has 10/100 PHY only, it might not occur | |
781 | wrong behavior. Because PHY usually return timeout or | |
782 | useless data when polling gigabit status and gigabit | |
783 | control registers. This behavior won't affect the | |
784 | correctnessof 10/100 link speed update. | |
785 | ||
3d0075fa YS |
786 | CONFIG_SH_ETHER |
787 | Support for Renesas on-chip Ethernet controller | |
788 | ||
789 | CONFIG_SH_ETHER_USE_PORT | |
790 | Define the number of ports to be used | |
791 | ||
792 | CONFIG_SH_ETHER_PHY_ADDR | |
793 | Define the ETH PHY's address | |
794 | ||
68260aab YS |
795 | CONFIG_SH_ETHER_CACHE_WRITEBACK |
796 | If this option is set, the driver enables cache flush. | |
797 | ||
5e124724 | 798 | - TPM Support: |
90899cc0 CC |
799 | CONFIG_TPM |
800 | Support TPM devices. | |
801 | ||
0766ad2f CR |
802 | CONFIG_TPM_TIS_INFINEON |
803 | Support for Infineon i2c bus TPM devices. Only one device | |
1b393db5 TWHT |
804 | per system is supported at this time. |
805 | ||
1b393db5 TWHT |
806 | CONFIG_TPM_TIS_I2C_BURST_LIMITATION |
807 | Define the burst count bytes upper limit | |
808 | ||
3aa74088 CR |
809 | CONFIG_TPM_ST33ZP24 |
810 | Support for STMicroelectronics TPM devices. Requires DM_TPM support. | |
811 | ||
812 | CONFIG_TPM_ST33ZP24_I2C | |
813 | Support for STMicroelectronics ST33ZP24 I2C devices. | |
814 | Requires TPM_ST33ZP24 and I2C. | |
815 | ||
b75fdc11 CR |
816 | CONFIG_TPM_ST33ZP24_SPI |
817 | Support for STMicroelectronics ST33ZP24 SPI devices. | |
818 | Requires TPM_ST33ZP24 and SPI. | |
819 | ||
c01939c7 DE |
820 | CONFIG_TPM_ATMEL_TWI |
821 | Support for Atmel TWI TPM device. Requires I2C support. | |
822 | ||
90899cc0 | 823 | CONFIG_TPM_TIS_LPC |
5e124724 VB |
824 | Support for generic parallel port TPM devices. Only one device |
825 | per system is supported at this time. | |
826 | ||
827 | CONFIG_TPM_TIS_BASE_ADDRESS | |
828 | Base address where the generic TPM device is mapped | |
829 | to. Contemporary x86 systems usually map it at | |
830 | 0xfed40000. | |
831 | ||
be6c1529 RP |
832 | CONFIG_TPM |
833 | Define this to enable the TPM support library which provides | |
834 | functional interfaces to some TPM commands. | |
835 | Requires support for a TPM device. | |
836 | ||
837 | CONFIG_TPM_AUTH_SESSIONS | |
838 | Define this to enable authorized functions in the TPM library. | |
839 | Requires CONFIG_TPM and CONFIG_SHA1. | |
840 | ||
c609719b WD |
841 | - USB Support: |
842 | At the moment only the UHCI host controller is | |
064b55cf | 843 | supported (PIP405, MIP405); define |
c609719b WD |
844 | CONFIG_USB_UHCI to enable it. |
845 | define CONFIG_USB_KEYBOARD to enable the USB Keyboard | |
30d56fae | 846 | and define CONFIG_USB_STORAGE to enable the USB |
c609719b WD |
847 | storage devices. |
848 | Note: | |
849 | Supported are USB Keyboards and USB Floppy drives | |
850 | (TEAC FD-05PUB). | |
4d13cbad | 851 | |
9ab4ce22 SG |
852 | CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the |
853 | txfilltuning field in the EHCI controller on reset. | |
854 | ||
6e9e0626 OT |
855 | CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 |
856 | HW module registers. | |
857 | ||
16c8d5e7 WD |
858 | - USB Device: |
859 | Define the below if you wish to use the USB console. | |
860 | Once firmware is rebuilt from a serial console issue the | |
861 | command "setenv stdin usbtty; setenv stdout usbtty" and | |
11ccc33f | 862 | attach your USB cable. The Unix command "dmesg" should print |
16c8d5e7 WD |
863 | it has found a new device. The environment variable usbtty |
864 | can be set to gserial or cdc_acm to enable your device to | |
386eda02 | 865 | appear to a USB host as a Linux gserial device or a |
16c8d5e7 WD |
866 | Common Device Class Abstract Control Model serial device. |
867 | If you select usbtty = gserial you should be able to enumerate | |
868 | a Linux host by | |
869 | # modprobe usbserial vendor=0xVendorID product=0xProductID | |
870 | else if using cdc_acm, simply setting the environment | |
871 | variable usbtty to be cdc_acm should suffice. The following | |
872 | might be defined in YourBoardName.h | |
386eda02 | 873 | |
16c8d5e7 WD |
874 | CONFIG_USB_DEVICE |
875 | Define this to build a UDC device | |
876 | ||
877 | CONFIG_USB_TTY | |
878 | Define this to have a tty type of device available to | |
879 | talk to the UDC device | |
386eda02 | 880 | |
f9da0f89 VK |
881 | CONFIG_USBD_HS |
882 | Define this to enable the high speed support for usb | |
883 | device and usbtty. If this feature is enabled, a routine | |
884 | int is_usbd_high_speed(void) | |
885 | also needs to be defined by the driver to dynamically poll | |
886 | whether the enumeration has succeded at high speed or full | |
887 | speed. | |
888 | ||
386eda02 | 889 | If you have a USB-IF assigned VendorID then you may wish to |
16c8d5e7 | 890 | define your own vendor specific values either in BoardName.h |
386eda02 | 891 | or directly in usbd_vendor_info.h. If you don't define |
16c8d5e7 WD |
892 | CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME, |
893 | CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot | |
894 | should pretend to be a Linux device to it's target host. | |
895 | ||
896 | CONFIG_USBD_MANUFACTURER | |
897 | Define this string as the name of your company for | |
898 | - CONFIG_USBD_MANUFACTURER "my company" | |
386eda02 | 899 | |
16c8d5e7 WD |
900 | CONFIG_USBD_PRODUCT_NAME |
901 | Define this string as the name of your product | |
902 | - CONFIG_USBD_PRODUCT_NAME "acme usb device" | |
903 | ||
904 | CONFIG_USBD_VENDORID | |
905 | Define this as your assigned Vendor ID from the USB | |
906 | Implementors Forum. This *must* be a genuine Vendor ID | |
907 | to avoid polluting the USB namespace. | |
908 | - CONFIG_USBD_VENDORID 0xFFFF | |
386eda02 | 909 | |
16c8d5e7 WD |
910 | CONFIG_USBD_PRODUCTID |
911 | Define this as the unique Product ID | |
912 | for your device | |
913 | - CONFIG_USBD_PRODUCTID 0xFFFF | |
4d13cbad | 914 | |
d70a560f IG |
915 | - ULPI Layer Support: |
916 | The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via | |
917 | the generic ULPI layer. The generic layer accesses the ULPI PHY | |
918 | via the platform viewport, so you need both the genric layer and | |
919 | the viewport enabled. Currently only Chipidea/ARC based | |
920 | viewport is supported. | |
921 | To enable the ULPI layer support, define CONFIG_USB_ULPI and | |
922 | CONFIG_USB_ULPI_VIEWPORT in your board configuration file. | |
6d365ea0 LS |
923 | If your ULPI phy needs a different reference clock than the |
924 | standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to | |
925 | the appropriate value in Hz. | |
c609719b | 926 | |
71f95118 | 927 | - MMC Support: |
8bde7f77 WD |
928 | The MMC controller on the Intel PXA is supported. To |
929 | enable this define CONFIG_MMC. The MMC can be | |
930 | accessed from the boot prompt by mapping the device | |
71f95118 | 931 | to physical memory similar to flash. Command line is |
602ad3b3 JL |
932 | enabled with CONFIG_CMD_MMC. The MMC driver also works with |
933 | the FAT fs. This is enabled with CONFIG_CMD_FAT. | |
71f95118 | 934 | |
afb35666 YS |
935 | CONFIG_SH_MMCIF |
936 | Support for Renesas on-chip MMCIF controller | |
937 | ||
938 | CONFIG_SH_MMCIF_ADDR | |
939 | Define the base address of MMCIF registers | |
940 | ||
941 | CONFIG_SH_MMCIF_CLK | |
942 | Define the clock frequency for MMCIF | |
943 | ||
b3ba6e94 | 944 | - USB Device Firmware Update (DFU) class support: |
bb4059a5 | 945 | CONFIG_DFU_OVER_USB |
b3ba6e94 TR |
946 | This enables the USB portion of the DFU USB class |
947 | ||
c6631764 PA |
948 | CONFIG_DFU_NAND |
949 | This enables support for exposing NAND devices via DFU. | |
950 | ||
a9479f04 AM |
951 | CONFIG_DFU_RAM |
952 | This enables support for exposing RAM via DFU. | |
953 | Note: DFU spec refer to non-volatile memory usage, but | |
954 | allow usages beyond the scope of spec - here RAM usage, | |
955 | one that would help mostly the developer. | |
956 | ||
e7e75c70 HS |
957 | CONFIG_SYS_DFU_DATA_BUF_SIZE |
958 | Dfu transfer uses a buffer before writing data to the | |
959 | raw storage device. Make the size (in bytes) of this buffer | |
960 | configurable. The size of this buffer is also configurable | |
961 | through the "dfu_bufsiz" environment variable. | |
962 | ||
ea2453d5 PA |
963 | CONFIG_SYS_DFU_MAX_FILE_SIZE |
964 | When updating files rather than the raw storage device, | |
965 | we use a static buffer to copy the file into and then write | |
966 | the buffer once we've been given the whole file. Define | |
967 | this to the maximum filesize (in bytes) for the buffer. | |
968 | Default is 4 MiB if undefined. | |
969 | ||
001a8319 HS |
970 | DFU_DEFAULT_POLL_TIMEOUT |
971 | Poll timeout [ms], is the timeout a device can send to the | |
972 | host. The host must wait for this timeout before sending | |
973 | a subsequent DFU_GET_STATUS request to the device. | |
974 | ||
975 | DFU_MANIFEST_POLL_TIMEOUT | |
976 | Poll timeout [ms], which the device sends to the host when | |
977 | entering dfuMANIFEST state. Host waits this timeout, before | |
978 | sending again an USB request to the device. | |
979 | ||
6705d81e | 980 | - Journaling Flash filesystem support: |
6d0f6bcf JCPV |
981 | CONFIG_SYS_JFFS2_FIRST_SECTOR, |
982 | CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS | |
6705d81e WD |
983 | Define these for a default partition on a NOR device |
984 | ||
c609719b | 985 | - Keyboard Support: |
39f615ed SG |
986 | See Kconfig help for available keyboard drivers. |
987 | ||
c609719b | 988 | - Video support: |
7d3053fb | 989 | CONFIG_FSL_DIU_FB |
04e5ae79 | 990 | Enable the Freescale DIU video driver. Reference boards for |
7d3053fb TT |
991 | SOCs that have a DIU should define this macro to enable DIU |
992 | support, and should also define these other macros: | |
993 | ||
994 | CONFIG_SYS_DIU_ADDR | |
995 | CONFIG_VIDEO | |
7d3053fb TT |
996 | CONFIG_CFB_CONSOLE |
997 | CONFIG_VIDEO_SW_CURSOR | |
998 | CONFIG_VGA_AS_SINGLE_DEVICE | |
7d3053fb TT |
999 | CONFIG_VIDEO_BMP_LOGO |
1000 | ||
ba8e76bd TT |
1001 | The DIU driver will look for the 'video-mode' environment |
1002 | variable, and if defined, enable the DIU as a console during | |
8eca9439 | 1003 | boot. See the documentation file doc/README.video for a |
ba8e76bd | 1004 | description of this variable. |
7d3053fb | 1005 | |
c609719b WD |
1006 | - LCD Support: CONFIG_LCD |
1007 | ||
1008 | Define this to enable LCD support (for output to LCD | |
1009 | display); also select one of the supported displays | |
1010 | by defining one of these: | |
1011 | ||
39cf4804 SP |
1012 | CONFIG_ATMEL_LCD: |
1013 | ||
1014 | HITACHI TX09D70VM1CCA, 3.5", 240x320. | |
1015 | ||
fd3103bb | 1016 | CONFIG_NEC_NL6448AC33: |
c609719b | 1017 | |
fd3103bb | 1018 | NEC NL6448AC33-18. Active, color, single scan. |
c609719b | 1019 | |
fd3103bb | 1020 | CONFIG_NEC_NL6448BC20 |
c609719b | 1021 | |
fd3103bb WD |
1022 | NEC NL6448BC20-08. 6.5", 640x480. |
1023 | Active, color, single scan. | |
1024 | ||
1025 | CONFIG_NEC_NL6448BC33_54 | |
1026 | ||
1027 | NEC NL6448BC33-54. 10.4", 640x480. | |
c609719b WD |
1028 | Active, color, single scan. |
1029 | ||
1030 | CONFIG_SHARP_16x9 | |
1031 | ||
1032 | Sharp 320x240. Active, color, single scan. | |
1033 | It isn't 16x9, and I am not sure what it is. | |
1034 | ||
1035 | CONFIG_SHARP_LQ64D341 | |
1036 | ||
1037 | Sharp LQ64D341 display, 640x480. | |
1038 | Active, color, single scan. | |
1039 | ||
1040 | CONFIG_HLD1045 | |
1041 | ||
1042 | HLD1045 display, 640x480. | |
1043 | Active, color, single scan. | |
1044 | ||
1045 | CONFIG_OPTREX_BW | |
1046 | ||
1047 | Optrex CBL50840-2 NF-FW 99 22 M5 | |
1048 | or | |
1049 | Hitachi LMG6912RPFC-00T | |
1050 | or | |
1051 | Hitachi SP14Q002 | |
1052 | ||
1053 | 320x240. Black & white. | |
1054 | ||
676d319e SG |
1055 | CONFIG_LCD_ALIGNMENT |
1056 | ||
b445bbb4 | 1057 | Normally the LCD is page-aligned (typically 4KB). If this is |
676d319e SG |
1058 | defined then the LCD will be aligned to this value instead. |
1059 | For ARM it is sometimes useful to use MMU_SECTION_SIZE | |
1060 | here, since it is cheaper to change data cache settings on | |
1061 | a per-section basis. | |
1062 | ||
1063 | ||
604c7d4a HP |
1064 | CONFIG_LCD_ROTATION |
1065 | ||
1066 | Sometimes, for example if the display is mounted in portrait | |
1067 | mode or even if it's mounted landscape but rotated by 180degree, | |
1068 | we need to rotate our content of the display relative to the | |
1069 | framebuffer, so that user can read the messages which are | |
1070 | printed out. | |
1071 | Once CONFIG_LCD_ROTATION is defined, the lcd_console will be | |
1072 | initialized with a given rotation from "vl_rot" out of | |
1073 | "vidinfo_t" which is provided by the board specific code. | |
1074 | The value for vl_rot is coded as following (matching to | |
1075 | fbcon=rotate:<n> linux-kernel commandline): | |
1076 | 0 = no rotation respectively 0 degree | |
1077 | 1 = 90 degree rotation | |
1078 | 2 = 180 degree rotation | |
1079 | 3 = 270 degree rotation | |
1080 | ||
1081 | If CONFIG_LCD_ROTATION is not defined, the console will be | |
1082 | initialized with 0degree rotation. | |
1083 | ||
45d7f525 TWHT |
1084 | CONFIG_LCD_BMP_RLE8 |
1085 | ||
1086 | Support drawing of RLE8-compressed bitmaps on the LCD. | |
1087 | ||
17ea1177 | 1088 | - MII/PHY support: |
17ea1177 WD |
1089 | CONFIG_PHY_CLOCK_FREQ (ppc4xx) |
1090 | ||
1091 | The clock frequency of the MII bus | |
1092 | ||
17ea1177 WD |
1093 | CONFIG_PHY_RESET_DELAY |
1094 | ||
1095 | Some PHY like Intel LXT971A need extra delay after | |
1096 | reset before any MII register access is possible. | |
1097 | For such PHY, set this option to the usec delay | |
1098 | required. (minimum 300usec for LXT971A) | |
1099 | ||
1100 | CONFIG_PHY_CMD_DELAY (ppc4xx) | |
1101 | ||
1102 | Some PHY like Intel LXT971A need extra delay after | |
1103 | command issued before MII status register can be read | |
1104 | ||
c609719b WD |
1105 | - IP address: |
1106 | CONFIG_IPADDR | |
1107 | ||
1108 | Define a default value for the IP address to use for | |
11ccc33f | 1109 | the default Ethernet interface, in case this is not |
c609719b | 1110 | determined through e.g. bootp. |
1ebcd654 | 1111 | (Environment variable "ipaddr") |
c609719b WD |
1112 | |
1113 | - Server IP address: | |
1114 | CONFIG_SERVERIP | |
1115 | ||
11ccc33f | 1116 | Defines a default value for the IP address of a TFTP |
c609719b | 1117 | server to contact when using the "tftboot" command. |
1ebcd654 | 1118 | (Environment variable "serverip") |
c609719b | 1119 | |
1ebcd654 WD |
1120 | - Gateway IP address: |
1121 | CONFIG_GATEWAYIP | |
1122 | ||
1123 | Defines a default value for the IP address of the | |
1124 | default router where packets to other networks are | |
1125 | sent to. | |
1126 | (Environment variable "gatewayip") | |
1127 | ||
1128 | - Subnet mask: | |
1129 | CONFIG_NETMASK | |
1130 | ||
1131 | Defines a default value for the subnet mask (or | |
1132 | routing prefix) which is used to determine if an IP | |
1133 | address belongs to the local subnet or needs to be | |
1134 | forwarded through a router. | |
1135 | (Environment variable "netmask") | |
1136 | ||
c609719b WD |
1137 | - BOOTP Recovery Mode: |
1138 | CONFIG_BOOTP_RANDOM_DELAY | |
1139 | ||
1140 | If you have many targets in a network that try to | |
1141 | boot using BOOTP, you may want to avoid that all | |
1142 | systems send out BOOTP requests at precisely the same | |
1143 | moment (which would happen for instance at recovery | |
1144 | from a power failure, when all systems will try to | |
1145 | boot, thus flooding the BOOTP server. Defining | |
1146 | CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be | |
1147 | inserted before sending out BOOTP requests. The | |
6c33c785 | 1148 | following delays are inserted then: |
c609719b WD |
1149 | |
1150 | 1st BOOTP request: delay 0 ... 1 sec | |
1151 | 2nd BOOTP request: delay 0 ... 2 sec | |
1152 | 3rd BOOTP request: delay 0 ... 4 sec | |
1153 | 4th and following | |
1154 | BOOTP requests: delay 0 ... 8 sec | |
1155 | ||
92ac8acc TR |
1156 | CONFIG_BOOTP_ID_CACHE_SIZE |
1157 | ||
1158 | BOOTP packets are uniquely identified using a 32-bit ID. The | |
1159 | server will copy the ID from client requests to responses and | |
1160 | U-Boot will use this to determine if it is the destination of | |
1161 | an incoming response. Some servers will check that addresses | |
1162 | aren't in use before handing them out (usually using an ARP | |
1163 | ping) and therefore take up to a few hundred milliseconds to | |
1164 | respond. Network congestion may also influence the time it | |
1165 | takes for a response to make it back to the client. If that | |
1166 | time is too long, U-Boot will retransmit requests. In order | |
1167 | to allow earlier responses to still be accepted after these | |
1168 | retransmissions, U-Boot's BOOTP client keeps a small cache of | |
1169 | IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this | |
1170 | cache. The default is to keep IDs for up to four outstanding | |
1171 | requests. Increasing this will allow U-Boot to accept offers | |
1172 | from a BOOTP client in networks with unusually high latency. | |
1173 | ||
fe389a82 | 1174 | - DHCP Advanced Options: |
2c00e099 | 1175 | |
d9a2f416 AV |
1176 | CONFIG_BOOTP_DHCP_REQUEST_DELAY |
1177 | ||
1178 | A 32bit value in microseconds for a delay between | |
1179 | receiving a "DHCP Offer" and sending the "DHCP Request". | |
1180 | This fixes a problem with certain DHCP servers that don't | |
1181 | respond 100% of the time to a "DHCP request". E.g. On an | |
1182 | AT91RM9200 processor running at 180MHz, this delay needed | |
1183 | to be *at least* 15,000 usec before a Windows Server 2003 | |
1184 | DHCP server would reply 100% of the time. I recommend at | |
1185 | least 50,000 usec to be safe. The alternative is to hope | |
1186 | that one of the retries will be successful but note that | |
1187 | the DHCP timeout and retry process takes a longer than | |
1188 | this delay. | |
1189 | ||
d22c338e JH |
1190 | - Link-local IP address negotiation: |
1191 | Negotiate with other link-local clients on the local network | |
1192 | for an address that doesn't require explicit configuration. | |
1193 | This is especially useful if a DHCP server cannot be guaranteed | |
1194 | to exist in all environments that the device must operate. | |
1195 | ||
1196 | See doc/README.link-local for more information. | |
1197 | ||
24acb83d PK |
1198 | - MAC address from environment variables |
1199 | ||
1200 | FDT_SEQ_MACADDR_FROM_ENV | |
1201 | ||
1202 | Fix-up device tree with MAC addresses fetched sequentially from | |
1203 | environment variables. This config work on assumption that | |
1204 | non-usable ethernet node of device-tree are either not present | |
1205 | or their status has been marked as "disabled". | |
1206 | ||
a3d991bd | 1207 | - CDP Options: |
6e592385 | 1208 | CONFIG_CDP_DEVICE_ID |
a3d991bd WD |
1209 | |
1210 | The device id used in CDP trigger frames. | |
1211 | ||
1212 | CONFIG_CDP_DEVICE_ID_PREFIX | |
1213 | ||
1214 | A two character string which is prefixed to the MAC address | |
1215 | of the device. | |
1216 | ||
1217 | CONFIG_CDP_PORT_ID | |
1218 | ||
1219 | A printf format string which contains the ascii name of | |
1220 | the port. Normally is set to "eth%d" which sets | |
11ccc33f | 1221 | eth0 for the first Ethernet, eth1 for the second etc. |
a3d991bd WD |
1222 | |
1223 | CONFIG_CDP_CAPABILITIES | |
1224 | ||
1225 | A 32bit integer which indicates the device capabilities; | |
1226 | 0x00000010 for a normal host which does not forwards. | |
1227 | ||
1228 | CONFIG_CDP_VERSION | |
1229 | ||
1230 | An ascii string containing the version of the software. | |
1231 | ||
1232 | CONFIG_CDP_PLATFORM | |
1233 | ||
1234 | An ascii string containing the name of the platform. | |
1235 | ||
1236 | CONFIG_CDP_TRIGGER | |
1237 | ||
1238 | A 32bit integer sent on the trigger. | |
1239 | ||
1240 | CONFIG_CDP_POWER_CONSUMPTION | |
1241 | ||
1242 | A 16bit integer containing the power consumption of the | |
1243 | device in .1 of milliwatts. | |
1244 | ||
1245 | CONFIG_CDP_APPLIANCE_VLAN_TYPE | |
1246 | ||
1247 | A byte containing the id of the VLAN. | |
1248 | ||
79267edd | 1249 | - Status LED: CONFIG_LED_STATUS |
c609719b WD |
1250 | |
1251 | Several configurations allow to display the current | |
1252 | status using a LED. For instance, the LED will blink | |
1253 | fast while running U-Boot code, stop blinking as | |
1254 | soon as a reply to a BOOTP request was received, and | |
1255 | start blinking slow once the Linux kernel is running | |
1256 | (supported by a status LED driver in the Linux | |
79267edd | 1257 | kernel). Defining CONFIG_LED_STATUS enables this |
c609719b WD |
1258 | feature in U-Boot. |
1259 | ||
1df7bbba IG |
1260 | Additional options: |
1261 | ||
79267edd | 1262 | CONFIG_LED_STATUS_GPIO |
1df7bbba IG |
1263 | The status LED can be connected to a GPIO pin. |
1264 | In such cases, the gpio_led driver can be used as a | |
79267edd | 1265 | status LED backend implementation. Define CONFIG_LED_STATUS_GPIO |
1df7bbba IG |
1266 | to include the gpio_led driver in the U-Boot binary. |
1267 | ||
9dfdcdfe IG |
1268 | CONFIG_GPIO_LED_INVERTED_TABLE |
1269 | Some GPIO connected LEDs may have inverted polarity in which | |
1270 | case the GPIO high value corresponds to LED off state and | |
1271 | GPIO low value corresponds to LED on state. | |
1272 | In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined | |
1273 | with a list of GPIO LEDs that have inverted polarity. | |
1274 | ||
55dabcc8 | 1275 | - I2C Support: |
3f4978c7 | 1276 | CONFIG_SYS_NUM_I2C_BUSES |
945a18e6 | 1277 | Hold the number of i2c buses you want to use. |
3f4978c7 HS |
1278 | |
1279 | CONFIG_SYS_I2C_DIRECT_BUS | |
1280 | define this, if you don't use i2c muxes on your hardware. | |
1281 | if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can | |
1282 | omit this define. | |
1283 | ||
1284 | CONFIG_SYS_I2C_MAX_HOPS | |
1285 | define how many muxes are maximal consecutively connected | |
1286 | on one i2c bus. If you not use i2c muxes, omit this | |
1287 | define. | |
1288 | ||
1289 | CONFIG_SYS_I2C_BUSES | |
b445bbb4 | 1290 | hold a list of buses you want to use, only used if |
3f4978c7 HS |
1291 | CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example |
1292 | a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and | |
1293 | CONFIG_SYS_NUM_I2C_BUSES = 9: | |
1294 | ||
1295 | CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ | |
1296 | {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ | |
1297 | {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \ | |
1298 | {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \ | |
1299 | {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \ | |
1300 | {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \ | |
1301 | {1, {I2C_NULL_HOP}}, \ | |
1302 | {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \ | |
1303 | {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \ | |
1304 | } | |
1305 | ||
1306 | which defines | |
1307 | bus 0 on adapter 0 without a mux | |
ea818dbb HS |
1308 | bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1 |
1309 | bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2 | |
1310 | bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3 | |
1311 | bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4 | |
1312 | bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5 | |
3f4978c7 | 1313 | bus 6 on adapter 1 without a mux |
ea818dbb HS |
1314 | bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1 |
1315 | bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2 | |
3f4978c7 HS |
1316 | |
1317 | If you do not have i2c muxes on your board, omit this define. | |
1318 | ||
ce3b5d69 | 1319 | - Legacy I2C Support: |
ea818dbb | 1320 | If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) |
b37c7e5e WD |
1321 | then the following macros need to be defined (examples are |
1322 | from include/configs/lwmon.h): | |
c609719b WD |
1323 | |
1324 | I2C_INIT | |
1325 | ||
b37c7e5e | 1326 | (Optional). Any commands necessary to enable the I2C |
43d9616c | 1327 | controller or configure ports. |
c609719b | 1328 | |
ba56f625 | 1329 | eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) |
b37c7e5e | 1330 | |
c609719b WD |
1331 | I2C_ACTIVE |
1332 | ||
1333 | The code necessary to make the I2C data line active | |
1334 | (driven). If the data line is open collector, this | |
1335 | define can be null. | |
1336 | ||
b37c7e5e WD |
1337 | eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) |
1338 | ||
c609719b WD |
1339 | I2C_TRISTATE |
1340 | ||
1341 | The code necessary to make the I2C data line tri-stated | |
1342 | (inactive). If the data line is open collector, this | |
1343 | define can be null. | |
1344 | ||
b37c7e5e WD |
1345 | eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) |
1346 | ||
c609719b WD |
1347 | I2C_READ |
1348 | ||
472d5460 YS |
1349 | Code that returns true if the I2C data line is high, |
1350 | false if it is low. | |
c609719b | 1351 | |
b37c7e5e WD |
1352 | eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) |
1353 | ||
c609719b WD |
1354 | I2C_SDA(bit) |
1355 | ||
472d5460 YS |
1356 | If <bit> is true, sets the I2C data line high. If it |
1357 | is false, it clears it (low). | |
c609719b | 1358 | |
b37c7e5e | 1359 | eg: #define I2C_SDA(bit) \ |
2535d602 | 1360 | if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ |
ba56f625 | 1361 | else immr->im_cpm.cp_pbdat &= ~PB_SDA |
b37c7e5e | 1362 | |
c609719b WD |
1363 | I2C_SCL(bit) |
1364 | ||
472d5460 YS |
1365 | If <bit> is true, sets the I2C clock line high. If it |
1366 | is false, it clears it (low). | |
c609719b | 1367 | |
b37c7e5e | 1368 | eg: #define I2C_SCL(bit) \ |
2535d602 | 1369 | if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ |
ba56f625 | 1370 | else immr->im_cpm.cp_pbdat &= ~PB_SCL |
b37c7e5e | 1371 | |
c609719b WD |
1372 | I2C_DELAY |
1373 | ||
1374 | This delay is invoked four times per clock cycle so this | |
1375 | controls the rate of data transfer. The data rate thus | |
b37c7e5e | 1376 | is 1 / (I2C_DELAY * 4). Often defined to be something |
945af8d7 WD |
1377 | like: |
1378 | ||
b37c7e5e | 1379 | #define I2C_DELAY udelay(2) |
c609719b | 1380 | |
793b5726 MF |
1381 | CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA |
1382 | ||
1383 | If your arch supports the generic GPIO framework (asm/gpio.h), | |
1384 | then you may alternatively define the two GPIOs that are to be | |
1385 | used as SCL / SDA. Any of the previous I2C_xxx macros will | |
1386 | have GPIO-based defaults assigned to them as appropriate. | |
1387 | ||
1388 | You should define these to the GPIO value as given directly to | |
1389 | the generic GPIO functions. | |
1390 | ||
6d0f6bcf | 1391 | CONFIG_SYS_I2C_INIT_BOARD |
47cd00fa | 1392 | |
8bde7f77 WD |
1393 | When a board is reset during an i2c bus transfer |
1394 | chips might think that the current transfer is still | |
1395 | in progress. On some boards it is possible to access | |
1396 | the i2c SCLK line directly, either by using the | |
1397 | processor pin as a GPIO or by having a second pin | |
1398 | connected to the bus. If this option is defined a | |
1399 | custom i2c_init_board() routine in boards/xxx/board.c | |
1400 | is run early in the boot sequence. | |
47cd00fa | 1401 | |
bb99ad6d BW |
1402 | CONFIG_I2C_MULTI_BUS |
1403 | ||
1404 | This option allows the use of multiple I2C buses, each of which | |
c0f40859 WD |
1405 | must have a controller. At any point in time, only one bus is |
1406 | active. To switch to a different bus, use the 'i2c dev' command. | |
bb99ad6d BW |
1407 | Note that bus numbering is zero-based. |
1408 | ||
6d0f6bcf | 1409 | CONFIG_SYS_I2C_NOPROBES |
bb99ad6d BW |
1410 | |
1411 | This option specifies a list of I2C devices that will be skipped | |
c0f40859 | 1412 | when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS |
0f89c54b PT |
1413 | is set, specify a list of bus-device pairs. Otherwise, specify |
1414 | a 1D array of device addresses | |
bb99ad6d BW |
1415 | |
1416 | e.g. | |
1417 | #undef CONFIG_I2C_MULTI_BUS | |
c0f40859 | 1418 | #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} |
bb99ad6d BW |
1419 | |
1420 | will skip addresses 0x50 and 0x68 on a board with one I2C bus | |
1421 | ||
c0f40859 | 1422 | #define CONFIG_I2C_MULTI_BUS |
945a18e6 | 1423 | #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} |
bb99ad6d BW |
1424 | |
1425 | will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 | |
1426 | ||
6d0f6bcf | 1427 | CONFIG_SYS_SPD_BUS_NUM |
be5e6181 TT |
1428 | |
1429 | If defined, then this indicates the I2C bus number for DDR SPD. | |
1430 | If not defined, then U-Boot assumes that SPD is on I2C bus 0. | |
1431 | ||
6d0f6bcf | 1432 | CONFIG_SYS_RTC_BUS_NUM |
0dc018ec SR |
1433 | |
1434 | If defined, then this indicates the I2C bus number for the RTC. | |
1435 | If not defined, then U-Boot assumes that RTC is on I2C bus 0. | |
1436 | ||
2ac6985a AD |
1437 | CONFIG_SOFT_I2C_READ_REPEATED_START |
1438 | ||
1439 | defining this will force the i2c_read() function in | |
1440 | the soft_i2c driver to perform an I2C repeated start | |
1441 | between writing the address pointer and reading the | |
1442 | data. If this define is omitted the default behaviour | |
1443 | of doing a stop-start sequence will be used. Most I2C | |
1444 | devices can use either method, but some require one or | |
1445 | the other. | |
be5e6181 | 1446 | |
c609719b WD |
1447 | - SPI Support: CONFIG_SPI |
1448 | ||
1449 | Enables SPI driver (so far only tested with | |
1450 | SPI EEPROM, also an instance works with Crystal A/D and | |
1451 | D/As on the SACSng board) | |
1452 | ||
f659b573 HS |
1453 | CONFIG_SYS_SPI_MXC_WAIT |
1454 | Timeout for waiting until spi transfer completed. | |
1455 | default: (CONFIG_SYS_HZ/100) /* 10 ms */ | |
1456 | ||
0133502e | 1457 | - FPGA Support: CONFIG_FPGA |
c609719b | 1458 | |
0133502e MF |
1459 | Enables FPGA subsystem. |
1460 | ||
1461 | CONFIG_FPGA_<vendor> | |
1462 | ||
1463 | Enables support for specific chip vendors. | |
1464 | (ALTERA, XILINX) | |
c609719b | 1465 | |
0133502e | 1466 | CONFIG_FPGA_<family> |
c609719b | 1467 | |
0133502e MF |
1468 | Enables support for FPGA family. |
1469 | (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) | |
1470 | ||
1471 | CONFIG_FPGA_COUNT | |
1472 | ||
1473 | Specify the number of FPGA devices to support. | |
c609719b | 1474 | |
6d0f6bcf | 1475 | CONFIG_SYS_FPGA_PROG_FEEDBACK |
c609719b | 1476 | |
8bde7f77 | 1477 | Enable printing of hash marks during FPGA configuration. |
c609719b | 1478 | |
6d0f6bcf | 1479 | CONFIG_SYS_FPGA_CHECK_BUSY |
c609719b | 1480 | |
43d9616c WD |
1481 | Enable checks on FPGA configuration interface busy |
1482 | status by the configuration function. This option | |
1483 | will require a board or device specific function to | |
1484 | be written. | |
c609719b WD |
1485 | |
1486 | CONFIG_FPGA_DELAY | |
1487 | ||
1488 | If defined, a function that provides delays in the FPGA | |
1489 | configuration driver. | |
1490 | ||
6d0f6bcf | 1491 | CONFIG_SYS_FPGA_CHECK_CTRLC |
c609719b WD |
1492 | Allow Control-C to interrupt FPGA configuration |
1493 | ||
6d0f6bcf | 1494 | CONFIG_SYS_FPGA_CHECK_ERROR |
c609719b | 1495 | |
43d9616c WD |
1496 | Check for configuration errors during FPGA bitfile |
1497 | loading. For example, abort during Virtex II | |
1498 | configuration if the INIT_B line goes low (which | |
1499 | indicated a CRC error). | |
c609719b | 1500 | |
6d0f6bcf | 1501 | CONFIG_SYS_FPGA_WAIT_INIT |
c609719b | 1502 | |
b445bbb4 JM |
1503 | Maximum time to wait for the INIT_B line to de-assert |
1504 | after PROB_B has been de-asserted during a Virtex II | |
43d9616c | 1505 | FPGA configuration sequence. The default time is 500 |
11ccc33f | 1506 | ms. |
c609719b | 1507 | |
6d0f6bcf | 1508 | CONFIG_SYS_FPGA_WAIT_BUSY |
c609719b | 1509 | |
b445bbb4 | 1510 | Maximum time to wait for BUSY to de-assert during |
11ccc33f | 1511 | Virtex II FPGA configuration. The default is 5 ms. |
c609719b | 1512 | |
6d0f6bcf | 1513 | CONFIG_SYS_FPGA_WAIT_CONFIG |
c609719b | 1514 | |
43d9616c | 1515 | Time to wait after FPGA configuration. The default is |
11ccc33f | 1516 | 200 ms. |
c609719b | 1517 | |
c609719b WD |
1518 | - Vendor Parameter Protection: |
1519 | ||
43d9616c WD |
1520 | U-Boot considers the values of the environment |
1521 | variables "serial#" (Board Serial Number) and | |
7152b1d0 | 1522 | "ethaddr" (Ethernet Address) to be parameters that |
43d9616c WD |
1523 | are set once by the board vendor / manufacturer, and |
1524 | protects these variables from casual modification by | |
1525 | the user. Once set, these variables are read-only, | |
1526 | and write or delete attempts are rejected. You can | |
11ccc33f | 1527 | change this behaviour: |
c609719b WD |
1528 | |
1529 | If CONFIG_ENV_OVERWRITE is #defined in your config | |
1530 | file, the write protection for vendor parameters is | |
47cd00fa | 1531 | completely disabled. Anybody can change or delete |
c609719b WD |
1532 | these parameters. |
1533 | ||
92ac5208 JH |
1534 | Alternatively, if you define _both_ an ethaddr in the |
1535 | default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default | |
11ccc33f | 1536 | Ethernet address is installed in the environment, |
c609719b WD |
1537 | which can be changed exactly ONCE by the user. [The |
1538 | serial# is unaffected by this, i. e. it remains | |
1539 | read-only.] | |
1540 | ||
2598090b JH |
1541 | The same can be accomplished in a more flexible way |
1542 | for any variable by configuring the type of access | |
1543 | to allow for those variables in the ".flags" variable | |
1544 | or define CONFIG_ENV_FLAGS_LIST_STATIC. | |
1545 | ||
c609719b WD |
1546 | - Protected RAM: |
1547 | CONFIG_PRAM | |
1548 | ||
1549 | Define this variable to enable the reservation of | |
1550 | "protected RAM", i. e. RAM which is not overwritten | |
1551 | by U-Boot. Define CONFIG_PRAM to hold the number of | |
1552 | kB you want to reserve for pRAM. You can overwrite | |
1553 | this default value by defining an environment | |
1554 | variable "pram" to the number of kB you want to | |
1555 | reserve. Note that the board info structure will | |
1556 | still show the full amount of RAM. If pRAM is | |
1557 | reserved, a new environment variable "mem" will | |
1558 | automatically be defined to hold the amount of | |
1559 | remaining RAM in a form that can be passed as boot | |
1560 | argument to Linux, for instance like that: | |
1561 | ||
fe126d8b | 1562 | setenv bootargs ... mem=\${mem} |
c609719b WD |
1563 | saveenv |
1564 | ||
1565 | This way you can tell Linux not to use this memory, | |
1566 | either, which results in a memory region that will | |
1567 | not be affected by reboots. | |
1568 | ||
1569 | *WARNING* If your board configuration uses automatic | |
1570 | detection of the RAM size, you must make sure that | |
1571 | this memory test is non-destructive. So far, the | |
1572 | following board configurations are known to be | |
1573 | "pRAM-clean": | |
1574 | ||
5b8e76c3 | 1575 | IVMS8, IVML24, SPD8xx, |
1b0757ec | 1576 | HERMES, IP860, RPXlite, LWMON, |
2eb48ff7 | 1577 | FLAGADM |
c609719b WD |
1578 | |
1579 | - Error Recovery: | |
c609719b WD |
1580 | CONFIG_NET_RETRY_COUNT |
1581 | ||
43d9616c WD |
1582 | This variable defines the number of retries for |
1583 | network operations like ARP, RARP, TFTP, or BOOTP | |
1584 | before giving up the operation. If not defined, a | |
1585 | default value of 5 is used. | |
c609719b | 1586 | |
40cb90ee GL |
1587 | CONFIG_ARP_TIMEOUT |
1588 | ||
1589 | Timeout waiting for an ARP reply in milliseconds. | |
1590 | ||
48a3e999 TK |
1591 | CONFIG_NFS_TIMEOUT |
1592 | ||
1593 | Timeout in milliseconds used in NFS protocol. | |
1594 | If you encounter "ERROR: Cannot umount" in nfs command, | |
1595 | try longer timeout such as | |
1596 | #define CONFIG_NFS_TIMEOUT 10000UL | |
1597 | ||
c609719b WD |
1598 | Note: |
1599 | ||
8bde7f77 WD |
1600 | In the current implementation, the local variables |
1601 | space and global environment variables space are | |
1602 | separated. Local variables are those you define by | |
1603 | simply typing `name=value'. To access a local | |
1604 | variable later on, you have write `$name' or | |
1605 | `${name}'; to execute the contents of a variable | |
1606 | directly type `$name' at the command prompt. | |
c609719b | 1607 | |
43d9616c WD |
1608 | Global environment variables are those you use |
1609 | setenv/printenv to work with. To run a command stored | |
1610 | in such a variable, you need to use the run command, | |
1611 | and you must not use the '$' sign to access them. | |
c609719b WD |
1612 | |
1613 | To store commands and special characters in a | |
1614 | variable, please use double quotation marks | |
1615 | surrounding the whole text of the variable, instead | |
1616 | of the backslashes before semicolons and special | |
1617 | symbols. | |
1618 | ||
b445bbb4 | 1619 | - Command Line Editing and History: |
f3b267b3 MV |
1620 | CONFIG_CMDLINE_PS_SUPPORT |
1621 | ||
1622 | Enable support for changing the command prompt string | |
1623 | at run-time. Only static string is supported so far. | |
1624 | The string is obtained from environment variables PS1 | |
1625 | and PS2. | |
1626 | ||
a8c7c708 | 1627 | - Default Environment: |
c609719b WD |
1628 | CONFIG_EXTRA_ENV_SETTINGS |
1629 | ||
43d9616c WD |
1630 | Define this to contain any number of null terminated |
1631 | strings (variable = value pairs) that will be part of | |
7152b1d0 | 1632 | the default environment compiled into the boot image. |
2262cfee | 1633 | |
43d9616c WD |
1634 | For example, place something like this in your |
1635 | board's config file: | |
c609719b WD |
1636 | |
1637 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
1638 | "myvar1=value1\0" \ | |
1639 | "myvar2=value2\0" | |
1640 | ||
43d9616c WD |
1641 | Warning: This method is based on knowledge about the |
1642 | internal format how the environment is stored by the | |
1643 | U-Boot code. This is NOT an official, exported | |
1644 | interface! Although it is unlikely that this format | |
7152b1d0 | 1645 | will change soon, there is no guarantee either. |
c609719b WD |
1646 | You better know what you are doing here. |
1647 | ||
43d9616c WD |
1648 | Note: overly (ab)use of the default environment is |
1649 | discouraged. Make sure to check other ways to preset | |
74de7aef | 1650 | the environment like the "source" command or the |
43d9616c | 1651 | boot command first. |
c609719b | 1652 | |
06fd8538 SG |
1653 | CONFIG_DELAY_ENVIRONMENT |
1654 | ||
1655 | Normally the environment is loaded when the board is | |
b445bbb4 | 1656 | initialised so that it is available to U-Boot. This inhibits |
06fd8538 SG |
1657 | that so that the environment is not available until |
1658 | explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL | |
1659 | this is instead controlled by the value of | |
1660 | /config/load-environment. | |
1661 | ||
ecb0ccd9 WD |
1662 | - TFTP Fixed UDP Port: |
1663 | CONFIG_TFTP_PORT | |
1664 | ||
28cb9375 | 1665 | If this is defined, the environment variable tftpsrcp |
ecb0ccd9 | 1666 | is used to supply the TFTP UDP source port value. |
28cb9375 | 1667 | If tftpsrcp isn't defined, the normal pseudo-random port |
ecb0ccd9 WD |
1668 | number generator is used. |
1669 | ||
28cb9375 WD |
1670 | Also, the environment variable tftpdstp is used to supply |
1671 | the TFTP UDP destination port value. If tftpdstp isn't | |
1672 | defined, the normal port 69 is used. | |
1673 | ||
1674 | The purpose for tftpsrcp is to allow a TFTP server to | |
ecb0ccd9 WD |
1675 | blindly start the TFTP transfer using the pre-configured |
1676 | target IP address and UDP port. This has the effect of | |
1677 | "punching through" the (Windows XP) firewall, allowing | |
1678 | the remainder of the TFTP transfer to proceed normally. | |
1679 | A better solution is to properly configure the firewall, | |
1680 | but sometimes that is not allowed. | |
1681 | ||
4cf2609b WD |
1682 | CONFIG_STANDALONE_LOAD_ADDR |
1683 | ||
6feff899 WD |
1684 | This option defines a board specific value for the |
1685 | address where standalone program gets loaded, thus | |
1686 | overwriting the architecture dependent default | |
4cf2609b WD |
1687 | settings. |
1688 | ||
1689 | - Frame Buffer Address: | |
1690 | CONFIG_FB_ADDR | |
1691 | ||
1692 | Define CONFIG_FB_ADDR if you want to use specific | |
44a53b57 WD |
1693 | address for frame buffer. This is typically the case |
1694 | when using a graphics controller has separate video | |
1695 | memory. U-Boot will then place the frame buffer at | |
1696 | the given address instead of dynamically reserving it | |
1697 | in system RAM by calling lcd_setmem(), which grabs | |
1698 | the memory for the frame buffer depending on the | |
1699 | configured panel size. | |
4cf2609b WD |
1700 | |
1701 | Please see board_init_f function. | |
1702 | ||
cccfc2ab DZ |
1703 | - Automatic software updates via TFTP server |
1704 | CONFIG_UPDATE_TFTP | |
1705 | CONFIG_UPDATE_TFTP_CNT_MAX | |
1706 | CONFIG_UPDATE_TFTP_MSEC_MAX | |
1707 | ||
1708 | These options enable and control the auto-update feature; | |
1709 | for a more detailed description refer to doc/README.update. | |
1710 | ||
1711 | - MTD Support (mtdparts command, UBI support) | |
ff94bc40 HS |
1712 | CONFIG_MTD_UBI_WL_THRESHOLD |
1713 | This parameter defines the maximum difference between the highest | |
1714 | erase counter value and the lowest erase counter value of eraseblocks | |
1715 | of UBI devices. When this threshold is exceeded, UBI starts performing | |
1716 | wear leveling by means of moving data from eraseblock with low erase | |
1717 | counter to eraseblocks with high erase counter. | |
1718 | ||
1719 | The default value should be OK for SLC NAND flashes, NOR flashes and | |
1720 | other flashes which have eraseblock life-cycle 100000 or more. | |
1721 | However, in case of MLC NAND flashes which typically have eraseblock | |
1722 | life-cycle less than 10000, the threshold should be lessened (e.g., | |
1723 | to 128 or 256, although it does not have to be power of 2). | |
1724 | ||
1725 | default: 4096 | |
c654b517 | 1726 | |
ff94bc40 HS |
1727 | CONFIG_MTD_UBI_BEB_LIMIT |
1728 | This option specifies the maximum bad physical eraseblocks UBI | |
1729 | expects on the MTD device (per 1024 eraseblocks). If the | |
1730 | underlying flash does not admit of bad eraseblocks (e.g. NOR | |
1731 | flash), this value is ignored. | |
1732 | ||
1733 | NAND datasheets often specify the minimum and maximum NVM | |
1734 | (Number of Valid Blocks) for the flashes' endurance lifetime. | |
1735 | The maximum expected bad eraseblocks per 1024 eraseblocks | |
1736 | then can be calculated as "1024 * (1 - MinNVB / MaxNVB)", | |
1737 | which gives 20 for most NANDs (MaxNVB is basically the total | |
1738 | count of eraseblocks on the chip). | |
1739 | ||
1740 | To put it differently, if this value is 20, UBI will try to | |
1741 | reserve about 1.9% of physical eraseblocks for bad blocks | |
1742 | handling. And that will be 1.9% of eraseblocks on the entire | |
1743 | NAND chip, not just the MTD partition UBI attaches. This means | |
1744 | that if you have, say, a NAND flash chip admits maximum 40 bad | |
1745 | eraseblocks, and it is split on two MTD partitions of the same | |
1746 | size, UBI will reserve 40 eraseblocks when attaching a | |
1747 | partition. | |
1748 | ||
1749 | default: 20 | |
1750 | ||
1751 | CONFIG_MTD_UBI_FASTMAP | |
1752 | Fastmap is a mechanism which allows attaching an UBI device | |
1753 | in nearly constant time. Instead of scanning the whole MTD device it | |
1754 | only has to locate a checkpoint (called fastmap) on the device. | |
1755 | The on-flash fastmap contains all information needed to attach | |
1756 | the device. Using fastmap makes only sense on large devices where | |
1757 | attaching by scanning takes long. UBI will not automatically install | |
1758 | a fastmap on old images, but you can set the UBI parameter | |
1759 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note | |
1760 | that fastmap-enabled images are still usable with UBI implementations | |
1761 | without fastmap support. On typical flash devices the whole fastmap | |
1762 | fits into one PEB. UBI will reserve PEBs to hold two fastmaps. | |
1763 | ||
1764 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT | |
1765 | Set this parameter to enable fastmap automatically on images | |
1766 | without a fastmap. | |
1767 | default: 0 | |
1768 | ||
0195a7bb HS |
1769 | CONFIG_MTD_UBI_FM_DEBUG |
1770 | Enable UBI fastmap debug | |
1771 | default: 0 | |
1772 | ||
6a11cf48 | 1773 | - SPL framework |
04e5ae79 WD |
1774 | CONFIG_SPL |
1775 | Enable building of SPL globally. | |
6a11cf48 | 1776 | |
6ebc3461 AA |
1777 | CONFIG_SPL_MAX_FOOTPRINT |
1778 | Maximum size in memory allocated to the SPL, BSS included. | |
1779 | When defined, the linker checks that the actual memory | |
1780 | used by SPL from _start to __bss_end does not exceed it. | |
8960af8b | 1781 | CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE |
6ebc3461 AA |
1782 | must not be both defined at the same time. |
1783 | ||
95579793 | 1784 | CONFIG_SPL_MAX_SIZE |
6ebc3461 AA |
1785 | Maximum size of the SPL image (text, data, rodata, and |
1786 | linker lists sections), BSS excluded. | |
1787 | When defined, the linker checks that the actual size does | |
1788 | not exceed it. | |
95579793 | 1789 | |
94a45bb1 SW |
1790 | CONFIG_SPL_RELOC_TEXT_BASE |
1791 | Address to relocate to. If unspecified, this is equal to | |
1792 | CONFIG_SPL_TEXT_BASE (i.e. no relocation is done). | |
1793 | ||
95579793 TR |
1794 | CONFIG_SPL_BSS_START_ADDR |
1795 | Link address for the BSS within the SPL binary. | |
1796 | ||
1797 | CONFIG_SPL_BSS_MAX_SIZE | |
6ebc3461 AA |
1798 | Maximum size in memory allocated to the SPL BSS. |
1799 | When defined, the linker checks that the actual memory used | |
1800 | by SPL from __bss_start to __bss_end does not exceed it. | |
8960af8b | 1801 | CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE |
6ebc3461 | 1802 | must not be both defined at the same time. |
95579793 TR |
1803 | |
1804 | CONFIG_SPL_STACK | |
1805 | Adress of the start of the stack SPL will use | |
1806 | ||
8c80eb3b AA |
1807 | CONFIG_SPL_PANIC_ON_RAW_IMAGE |
1808 | When defined, SPL will panic() if the image it has | |
1809 | loaded does not have a signature. | |
1810 | Defining this is useful when code which loads images | |
1811 | in SPL cannot guarantee that absolutely all read errors | |
1812 | will be caught. | |
1813 | An example is the LPC32XX MLC NAND driver, which will | |
1814 | consider that a completely unreadable NAND block is bad, | |
1815 | and thus should be skipped silently. | |
1816 | ||
94a45bb1 SW |
1817 | CONFIG_SPL_RELOC_STACK |
1818 | Adress of the start of the stack SPL will use after | |
1819 | relocation. If unspecified, this is equal to | |
1820 | CONFIG_SPL_STACK. | |
1821 | ||
95579793 TR |
1822 | CONFIG_SYS_SPL_MALLOC_START |
1823 | Starting address of the malloc pool used in SPL. | |
9ac4fc82 FE |
1824 | When this option is set the full malloc is used in SPL and |
1825 | it is set up by spl_init() and before that, the simple malloc() | |
1826 | can be used if CONFIG_SYS_MALLOC_F is defined. | |
95579793 TR |
1827 | |
1828 | CONFIG_SYS_SPL_MALLOC_SIZE | |
1829 | The size of the malloc pool used in SPL. | |
6a11cf48 | 1830 | |
861a86f4 TR |
1831 | CONFIG_SPL_DISPLAY_PRINT |
1832 | For ARM, enable an optional function to print more information | |
1833 | about the running system. | |
1834 | ||
4b919725 SW |
1835 | CONFIG_SPL_INIT_MINIMAL |
1836 | Arch init code should be built for a very small image | |
1837 | ||
2b75b0ad PK |
1838 | CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, |
1839 | CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS | |
1840 | Sector and number of sectors to load kernel argument | |
1841 | parameters from when MMC is being used in raw mode | |
1842 | (for falcon mode) | |
1843 | ||
fae81c72 GG |
1844 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME |
1845 | Filename to read to load U-Boot when reading from filesystem | |
1846 | ||
1847 | CONFIG_SPL_FS_LOAD_KERNEL_NAME | |
7ad2cc79 | 1848 | Filename to read to load kernel uImage when reading |
fae81c72 | 1849 | from filesystem (for Falcon mode) |
7ad2cc79 | 1850 | |
fae81c72 | 1851 | CONFIG_SPL_FS_LOAD_ARGS_NAME |
7ad2cc79 | 1852 | Filename to read to load kernel argument parameters |
fae81c72 | 1853 | when reading from filesystem (for Falcon mode) |
7ad2cc79 | 1854 | |
06f60ae3 SW |
1855 | CONFIG_SPL_MPC83XX_WAIT_FOR_NAND |
1856 | Set this for NAND SPL on PPC mpc83xx targets, so that | |
1857 | start.S waits for the rest of the SPL to load before | |
1858 | continuing (the hardware starts execution after just | |
1859 | loading the first page rather than the full 4K). | |
1860 | ||
651fcf60 PK |
1861 | CONFIG_SPL_SKIP_RELOCATE |
1862 | Avoid SPL relocation | |
1863 | ||
15e207fa JK |
1864 | CONFIG_SPL_NAND_IDENT |
1865 | SPL uses the chip ID list to identify the NAND flash. | |
1866 | Requires CONFIG_SPL_NAND_BASE. | |
1867 | ||
6f4e7d3c TG |
1868 | CONFIG_SPL_UBI |
1869 | Support for a lightweight UBI (fastmap) scanner and | |
1870 | loader | |
1871 | ||
0c3117b1 HS |
1872 | CONFIG_SPL_NAND_RAW_ONLY |
1873 | Support to boot only raw u-boot.bin images. Use this only | |
1874 | if you need to save space. | |
1875 | ||
7c8eea59 YZ |
1876 | CONFIG_SPL_COMMON_INIT_DDR |
1877 | Set for common ddr init with serial presence detect in | |
1878 | SPL binary. | |
1879 | ||
95579793 TR |
1880 | CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, |
1881 | CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, | |
1882 | CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, | |
1883 | CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE, | |
1884 | CONFIG_SYS_NAND_ECCBYTES | |
1885 | Defines the size and behavior of the NAND that SPL uses | |
7d4b7955 | 1886 | to read U-Boot |
95579793 | 1887 | |
7d4b7955 SW |
1888 | CONFIG_SYS_NAND_U_BOOT_DST |
1889 | Location in memory to load U-Boot to | |
1890 | ||
1891 | CONFIG_SYS_NAND_U_BOOT_SIZE | |
1892 | Size of image to load | |
95579793 TR |
1893 | |
1894 | CONFIG_SYS_NAND_U_BOOT_START | |
7d4b7955 | 1895 | Entry point in loaded image to jump to |
95579793 TR |
1896 | |
1897 | CONFIG_SYS_NAND_HW_ECC_OOBFIRST | |
1898 | Define this if you need to first read the OOB and then the | |
b445bbb4 | 1899 | data. This is used, for example, on davinci platforms. |
95579793 | 1900 | |
c57b953d PM |
1901 | CONFIG_SPL_RAM_DEVICE |
1902 | Support for running image already present in ram, in SPL binary | |
6a11cf48 | 1903 | |
74752baa | 1904 | CONFIG_SPL_PAD_TO |
6113d3f2 BT |
1905 | Image offset to which the SPL should be padded before appending |
1906 | the SPL payload. By default, this is defined as | |
1907 | CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. | |
1908 | CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL | |
1909 | payload without any padding, or >= CONFIG_SPL_MAX_SIZE. | |
74752baa | 1910 | |
ca2fca22 SW |
1911 | CONFIG_SPL_TARGET |
1912 | Final target image containing SPL and payload. Some SPLs | |
1913 | use an arch-specific makefile fragment instead, for | |
1914 | example if more than one image needs to be produced. | |
1915 | ||
b527b9c6 | 1916 | CONFIG_SPL_FIT_PRINT |
87ebee39 SG |
1917 | Printing information about a FIT image adds quite a bit of |
1918 | code to SPL. So this is normally disabled in SPL. Use this | |
1919 | option to re-enable it. This will affect the output of the | |
1920 | bootm command when booting a FIT image. | |
1921 | ||
3aa29de0 YZ |
1922 | - TPL framework |
1923 | CONFIG_TPL | |
1924 | Enable building of TPL globally. | |
1925 | ||
1926 | CONFIG_TPL_PAD_TO | |
1927 | Image offset to which the TPL should be padded before appending | |
1928 | the TPL payload. By default, this is defined as | |
93e14596 WD |
1929 | CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined. |
1930 | CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL | |
1931 | payload without any padding, or >= CONFIG_SPL_MAX_SIZE. | |
3aa29de0 | 1932 | |
a8c7c708 WD |
1933 | - Interrupt support (PPC): |
1934 | ||
d4ca31c4 WD |
1935 | There are common interrupt_init() and timer_interrupt() |
1936 | for all PPC archs. interrupt_init() calls interrupt_init_cpu() | |
11ccc33f | 1937 | for CPU specific initialization. interrupt_init_cpu() |
d4ca31c4 | 1938 | should set decrementer_count to appropriate value. If |
11ccc33f | 1939 | CPU resets decrementer automatically after interrupt |
d4ca31c4 | 1940 | (ppc4xx) it should set decrementer_count to zero. |
11ccc33f | 1941 | timer_interrupt() calls timer_interrupt_cpu() for CPU |
d4ca31c4 WD |
1942 | specific handling. If board has watchdog / status_led |
1943 | / other_activity_monitor it works automatically from | |
1944 | general timer_interrupt(). | |
a8c7c708 | 1945 | |
c609719b | 1946 | |
9660e442 HR |
1947 | Board initialization settings: |
1948 | ------------------------------ | |
1949 | ||
1950 | During Initialization u-boot calls a number of board specific functions | |
1951 | to allow the preparation of board specific prerequisites, e.g. pin setup | |
1952 | before drivers are initialized. To enable these callbacks the | |
1953 | following configuration macros have to be defined. Currently this is | |
1954 | architecture specific, so please check arch/your_architecture/lib/board.c | |
1955 | typically in board_init_f() and board_init_r(). | |
1956 | ||
1957 | - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f() | |
1958 | - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r() | |
1959 | - CONFIG_BOARD_LATE_INIT: Call board_late_init() | |
c609719b | 1960 | |
c609719b WD |
1961 | Configuration Settings: |
1962 | ----------------------- | |
1963 | ||
4d979bfd | 1964 | - MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit. |
4d1fd7f1 YS |
1965 | Optionally it can be defined to support 64-bit memory commands. |
1966 | ||
6d0f6bcf | 1967 | - CONFIG_SYS_LONGHELP: Defined when you want long help messages included; |
c609719b WD |
1968 | undefine this when you're short of memory. |
1969 | ||
2fb2604d PT |
1970 | - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default |
1971 | width of the commands listed in the 'help' command output. | |
1972 | ||
6d0f6bcf | 1973 | - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to |
c609719b WD |
1974 | prompt for user input. |
1975 | ||
6d0f6bcf | 1976 | - CONFIG_SYS_CBSIZE: Buffer size for input from the Console |
c609719b | 1977 | |
6d0f6bcf | 1978 | - CONFIG_SYS_PBSIZE: Buffer size for Console output |
c609719b | 1979 | |
6d0f6bcf | 1980 | - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands |
c609719b | 1981 | |
6d0f6bcf | 1982 | - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to |
c609719b WD |
1983 | the application (usually a Linux kernel) when it is |
1984 | booted | |
1985 | ||
6d0f6bcf | 1986 | - CONFIG_SYS_BAUDRATE_TABLE: |
c609719b WD |
1987 | List of legal baudrate settings for this board. |
1988 | ||
e8149522 | 1989 | - CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 1990 | Only implemented for ARMv8 for now. |
e8149522 YS |
1991 | If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory |
1992 | is substracted from total RAM and won't be reported to OS. | |
1993 | This memory can be used as secure memory. A variable | |
e61a7534 | 1994 | gd->arch.secure_ram is used to track the location. In systems |
e8149522 YS |
1995 | the RAM base is not zero, or RAM is divided into banks, |
1996 | this variable needs to be recalcuated to get the address. | |
1997 | ||
aabd7ddb | 1998 | - CONFIG_SYS_MEM_TOP_HIDE: |
6d0f6bcf | 1999 | If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, |
14f73ca6 | 2000 | this specified memory area will get subtracted from the top |
11ccc33f | 2001 | (end) of RAM and won't get "touched" at all by U-Boot. By |
14f73ca6 SR |
2002 | fixing up gd->ram_size the Linux kernel should gets passed |
2003 | the now "corrected" memory size and won't touch it either. | |
2004 | This should work for arch/ppc and arch/powerpc. Only Linux | |
5e12e75d | 2005 | board ports in arch/powerpc with bootwrapper support that |
14f73ca6 | 2006 | recalculate the memory size from the SDRAM controller setup |
5e12e75d | 2007 | will have to get fixed in Linux additionally. |
14f73ca6 SR |
2008 | |
2009 | This option can be used as a workaround for the 440EPx/GRx | |
2010 | CHIP 11 errata where the last 256 bytes in SDRAM shouldn't | |
2011 | be touched. | |
2012 | ||
2013 | WARNING: Please make sure that this value is a multiple of | |
2014 | the Linux page size (normally 4k). If this is not the case, | |
2015 | then the end address of the Linux memory will be located at a | |
2016 | non page size aligned address and this could cause major | |
2017 | problems. | |
2018 | ||
6d0f6bcf | 2019 | - CONFIG_SYS_LOADS_BAUD_CHANGE: |
c609719b WD |
2020 | Enable temporary baudrate change while serial download |
2021 | ||
6d0f6bcf | 2022 | - CONFIG_SYS_SDRAM_BASE: |
c609719b WD |
2023 | Physical start address of SDRAM. _Must_ be 0 here. |
2024 | ||
6d0f6bcf | 2025 | - CONFIG_SYS_FLASH_BASE: |
c609719b WD |
2026 | Physical start address of Flash memory. |
2027 | ||
6d0f6bcf | 2028 | - CONFIG_SYS_MONITOR_BASE: |
c609719b WD |
2029 | Physical start address of boot monitor code (set by |
2030 | make config files to be same as the text base address | |
14d0a02a | 2031 | (CONFIG_SYS_TEXT_BASE) used when linking) - same as |
6d0f6bcf | 2032 | CONFIG_SYS_FLASH_BASE when booting from flash. |
c609719b | 2033 | |
6d0f6bcf | 2034 | - CONFIG_SYS_MONITOR_LEN: |
8bde7f77 WD |
2035 | Size of memory reserved for monitor code, used to |
2036 | determine _at_compile_time_ (!) if the environment is | |
2037 | embedded within the U-Boot image, or in a separate | |
2038 | flash sector. | |
c609719b | 2039 | |
6d0f6bcf | 2040 | - CONFIG_SYS_MALLOC_LEN: |
c609719b WD |
2041 | Size of DRAM reserved for malloc() use. |
2042 | ||
d59476b6 SG |
2043 | - CONFIG_SYS_MALLOC_F_LEN |
2044 | Size of the malloc() pool for use before relocation. If | |
2045 | this is defined, then a very simple malloc() implementation | |
2046 | will become available before relocation. The address is just | |
2047 | below the global data, and the stack is moved down to make | |
2048 | space. | |
2049 | ||
2050 | This feature allocates regions with increasing addresses | |
2051 | within the region. calloc() is supported, but realloc() | |
2052 | is not available. free() is supported but does nothing. | |
b445bbb4 | 2053 | The memory will be freed (or in fact just forgotten) when |
d59476b6 SG |
2054 | U-Boot relocates itself. |
2055 | ||
38687ae6 SG |
2056 | - CONFIG_SYS_MALLOC_SIMPLE |
2057 | Provides a simple and small malloc() and calloc() for those | |
2058 | boards which do not use the full malloc in SPL (which is | |
2059 | enabled with CONFIG_SYS_SPL_MALLOC_START). | |
2060 | ||
1dfdd9ba TR |
2061 | - CONFIG_SYS_NONCACHED_MEMORY: |
2062 | Size of non-cached memory area. This area of memory will be | |
2063 | typically located right below the malloc() area and mapped | |
2064 | uncached in the MMU. This is useful for drivers that would | |
2065 | otherwise require a lot of explicit cache maintenance. For | |
2066 | some drivers it's also impossible to properly maintain the | |
2067 | cache. For example if the regions that need to be flushed | |
2068 | are not a multiple of the cache-line size, *and* padding | |
2069 | cannot be allocated between the regions to align them (i.e. | |
2070 | if the HW requires a contiguous array of regions, and the | |
2071 | size of each region is not cache-aligned), then a flush of | |
2072 | one region may result in overwriting data that hardware has | |
2073 | written to another region in the same cache-line. This can | |
2074 | happen for example in network drivers where descriptors for | |
2075 | buffers are typically smaller than the CPU cache-line (e.g. | |
2076 | 16 bytes vs. 32 or 64 bytes). | |
2077 | ||
2078 | Non-cached memory is only supported on 32-bit ARM at present. | |
2079 | ||
6d0f6bcf | 2080 | - CONFIG_SYS_BOOTM_LEN: |
15940c9a SR |
2081 | Normally compressed uImages are limited to an |
2082 | uncompressed size of 8 MBytes. If this is not enough, | |
6d0f6bcf | 2083 | you can define CONFIG_SYS_BOOTM_LEN in your board config file |
15940c9a SR |
2084 | to adjust this setting to your needs. |
2085 | ||
6d0f6bcf | 2086 | - CONFIG_SYS_BOOTMAPSZ: |
c609719b WD |
2087 | Maximum size of memory mapped by the startup code of |
2088 | the Linux kernel; all data that must be processed by | |
7d721e34 BS |
2089 | the Linux kernel (bd_info, boot arguments, FDT blob if |
2090 | used) must be put below this limit, unless "bootm_low" | |
1bce2aeb | 2091 | environment variable is defined and non-zero. In such case |
7d721e34 | 2092 | all data for the Linux kernel must be between "bootm_low" |
c0f40859 | 2093 | and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment |
c3624e6e GL |
2094 | variable "bootm_mapsize" will override the value of |
2095 | CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, | |
2096 | then the value in "bootm_size" will be used instead. | |
c609719b | 2097 | |
fca43cc8 JR |
2098 | - CONFIG_SYS_BOOT_RAMDISK_HIGH: |
2099 | Enable initrd_high functionality. If defined then the | |
2100 | initrd_high feature is enabled and the bootm ramdisk subcommand | |
2101 | is enabled. | |
2102 | ||
2103 | - CONFIG_SYS_BOOT_GET_CMDLINE: | |
2104 | Enables allocating and saving kernel cmdline in space between | |
2105 | "bootm_low" and "bootm_low" + BOOTMAPSZ. | |
2106 | ||
2107 | - CONFIG_SYS_BOOT_GET_KBD: | |
2108 | Enables allocating and saving a kernel copy of the bd_info in | |
2109 | space between "bootm_low" and "bootm_low" + BOOTMAPSZ. | |
2110 | ||
6d0f6bcf | 2111 | - CONFIG_SYS_MAX_FLASH_SECT: |
c609719b WD |
2112 | Max number of sectors on a Flash chip |
2113 | ||
6d0f6bcf | 2114 | - CONFIG_SYS_FLASH_ERASE_TOUT: |
c609719b WD |
2115 | Timeout for Flash erase operations (in ms) |
2116 | ||
6d0f6bcf | 2117 | - CONFIG_SYS_FLASH_WRITE_TOUT: |
c609719b WD |
2118 | Timeout for Flash write operations (in ms) |
2119 | ||
6d0f6bcf | 2120 | - CONFIG_SYS_FLASH_LOCK_TOUT |
8564acf9 WD |
2121 | Timeout for Flash set sector lock bit operation (in ms) |
2122 | ||
6d0f6bcf | 2123 | - CONFIG_SYS_FLASH_UNLOCK_TOUT |
8564acf9 WD |
2124 | Timeout for Flash clear lock bits operation (in ms) |
2125 | ||
6d0f6bcf | 2126 | - CONFIG_SYS_FLASH_PROTECTION |
8564acf9 WD |
2127 | If defined, hardware flash sectors protection is used |
2128 | instead of U-Boot software protection. | |
2129 | ||
6d0f6bcf | 2130 | - CONFIG_SYS_DIRECT_FLASH_TFTP: |
c609719b WD |
2131 | |
2132 | Enable TFTP transfers directly to flash memory; | |
2133 | without this option such a download has to be | |
2134 | performed in two steps: (1) download to RAM, and (2) | |
2135 | copy from RAM to flash. | |
2136 | ||
2137 | The two-step approach is usually more reliable, since | |
2138 | you can check if the download worked before you erase | |
11ccc33f MZ |
2139 | the flash, but in some situations (when system RAM is |
2140 | too limited to allow for a temporary copy of the | |
c609719b WD |
2141 | downloaded image) this option may be very useful. |
2142 | ||
6d0f6bcf | 2143 | - CONFIG_SYS_FLASH_CFI: |
43d9616c | 2144 | Define if the flash driver uses extra elements in the |
5653fc33 WD |
2145 | common flash structure for storing flash geometry. |
2146 | ||
00b1883a | 2147 | - CONFIG_FLASH_CFI_DRIVER |
5653fc33 WD |
2148 | This option also enables the building of the cfi_flash driver |
2149 | in the drivers directory | |
c609719b | 2150 | |
91809ed5 PZ |
2151 | - CONFIG_FLASH_CFI_MTD |
2152 | This option enables the building of the cfi_mtd driver | |
2153 | in the drivers directory. The driver exports CFI flash | |
2154 | to the MTD layer. | |
2155 | ||
6d0f6bcf | 2156 | - CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
96ef831f GL |
2157 | Use buffered writes to flash. |
2158 | ||
2159 | - CONFIG_FLASH_SPANSION_S29WS_N | |
2160 | s29ws-n MirrorBit flash has non-standard addresses for buffered | |
2161 | write commands. | |
2162 | ||
6d0f6bcf | 2163 | - CONFIG_SYS_FLASH_QUIET_TEST |
5568e613 SR |
2164 | If this option is defined, the common CFI flash doesn't |
2165 | print it's warning upon not recognized FLASH banks. This | |
2166 | is useful, if some of the configured banks are only | |
2167 | optionally available. | |
2168 | ||
9a042e9c JVB |
2169 | - CONFIG_FLASH_SHOW_PROGRESS |
2170 | If defined (must be an integer), print out countdown | |
2171 | digits and dots. Recommended value: 45 (9..1) for 80 | |
2172 | column displays, 15 (3..1) for 40 column displays. | |
2173 | ||
352ef3f1 SR |
2174 | - CONFIG_FLASH_VERIFY |
2175 | If defined, the content of the flash (destination) is compared | |
2176 | against the source after the write operation. An error message | |
2177 | will be printed when the contents are not identical. | |
2178 | Please note that this option is useless in nearly all cases, | |
2179 | since such flash programming errors usually are detected earlier | |
2180 | while unprotecting/erasing/programming. Please only enable | |
2181 | this option if you really know what you are doing. | |
2182 | ||
6d0f6bcf | 2183 | - CONFIG_SYS_RX_ETH_BUFFER: |
11ccc33f MZ |
2184 | Defines the number of Ethernet receive buffers. On some |
2185 | Ethernet controllers it is recommended to set this value | |
53cf9435 SR |
2186 | to 8 or even higher (EEPRO100 or 405 EMAC), since all |
2187 | buffers can be full shortly after enabling the interface | |
11ccc33f | 2188 | on high Ethernet traffic. |
53cf9435 SR |
2189 | Defaults to 4 if not defined. |
2190 | ||
ea882baf WD |
2191 | - CONFIG_ENV_MAX_ENTRIES |
2192 | ||
071bc923 WD |
2193 | Maximum number of entries in the hash table that is used |
2194 | internally to store the environment settings. The default | |
2195 | setting is supposed to be generous and should work in most | |
2196 | cases. This setting can be used to tune behaviour; see | |
2197 | lib/hashtable.c for details. | |
ea882baf | 2198 | |
2598090b JH |
2199 | - CONFIG_ENV_FLAGS_LIST_DEFAULT |
2200 | - CONFIG_ENV_FLAGS_LIST_STATIC | |
1bce2aeb | 2201 | Enable validation of the values given to environment variables when |
2598090b JH |
2202 | calling env set. Variables can be restricted to only decimal, |
2203 | hexadecimal, or boolean. If CONFIG_CMD_NET is also defined, | |
2204 | the variables can also be restricted to IP address or MAC address. | |
2205 | ||
2206 | The format of the list is: | |
2207 | type_attribute = [s|d|x|b|i|m] | |
b445bbb4 JM |
2208 | access_attribute = [a|r|o|c] |
2209 | attributes = type_attribute[access_attribute] | |
2598090b JH |
2210 | entry = variable_name[:attributes] |
2211 | list = entry[,list] | |
2212 | ||
2213 | The type attributes are: | |
2214 | s - String (default) | |
2215 | d - Decimal | |
2216 | x - Hexadecimal | |
2217 | b - Boolean ([1yYtT|0nNfF]) | |
2218 | i - IP address | |
2219 | m - MAC address | |
2220 | ||
267541f7 JH |
2221 | The access attributes are: |
2222 | a - Any (default) | |
2223 | r - Read-only | |
2224 | o - Write-once | |
2225 | c - Change-default | |
2226 | ||
2598090b JH |
2227 | - CONFIG_ENV_FLAGS_LIST_DEFAULT |
2228 | Define this to a list (string) to define the ".flags" | |
b445bbb4 | 2229 | environment variable in the default or embedded environment. |
2598090b JH |
2230 | |
2231 | - CONFIG_ENV_FLAGS_LIST_STATIC | |
2232 | Define this to a list (string) to define validation that | |
2233 | should be done if an entry is not found in the ".flags" | |
2234 | environment variable. To override a setting in the static | |
2235 | list, simply add an entry for the same variable name to the | |
2236 | ".flags" variable. | |
2237 | ||
bdf1fe4e JH |
2238 | If CONFIG_REGEX is defined, the variable_name above is evaluated as a |
2239 | regular expression. This allows multiple variables to define the same | |
2240 | flags without explicitly listing them for each variable. | |
2241 | ||
c609719b WD |
2242 | The following definitions that deal with the placement and management |
2243 | of environment data (variable area); in general, we support the | |
2244 | following configurations: | |
2245 | ||
c3eb3fe4 MF |
2246 | - CONFIG_BUILD_ENVCRC: |
2247 | ||
2248 | Builds up envcrc with the target environment so that external utils | |
2249 | may easily extract it and embed it in final U-Boot images. | |
2250 | ||
c609719b | 2251 | BE CAREFUL! The first access to the environment happens quite early |
b445bbb4 | 2252 | in U-Boot initialization (when we try to get the setting of for the |
11ccc33f | 2253 | console baudrate). You *MUST* have mapped your NVRAM area then, or |
c609719b WD |
2254 | U-Boot will hang. |
2255 | ||
2256 | Please note that even with NVRAM we still use a copy of the | |
2257 | environment in RAM: we could work on NVRAM directly, but we want to | |
2258 | keep settings there always unmodified except somebody uses "saveenv" | |
2259 | to save the current settings. | |
2260 | ||
0a85a9e7 LG |
2261 | BE CAREFUL! For some special cases, the local device can not use |
2262 | "saveenv" command. For example, the local device will get the | |
fc54c7fa LG |
2263 | environment stored in a remote NOR flash by SRIO or PCIE link, |
2264 | but it can not erase, write this NOR flash by SRIO or PCIE interface. | |
0a85a9e7 | 2265 | |
b74ab737 GL |
2266 | - CONFIG_NAND_ENV_DST |
2267 | ||
2268 | Defines address in RAM to which the nand_spl code should copy the | |
2269 | environment. If redundant environment is used, it will be copied to | |
2270 | CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. | |
2271 | ||
e881cb56 | 2272 | Please note that the environment is read-only until the monitor |
c609719b | 2273 | has been relocated to RAM and a RAM copy of the environment has been |
00caae6d | 2274 | created; also, when using EEPROM you will have to use env_get_f() |
c609719b WD |
2275 | until then to read environment variables. |
2276 | ||
85ec0bcc WD |
2277 | The environment is protected by a CRC32 checksum. Before the monitor |
2278 | is relocated into RAM, as a result of a bad CRC you will be working | |
2279 | with the compiled-in default environment - *silently*!!! [This is | |
2280 | necessary, because the first environment variable we need is the | |
2281 | "baudrate" setting for the console - if we have a bad CRC, we don't | |
2282 | have any device yet where we could complain.] | |
c609719b WD |
2283 | |
2284 | Note: once the monitor has been relocated, then it will complain if | |
2285 | the default environment is used; a new CRC is computed as soon as you | |
85ec0bcc | 2286 | use the "saveenv" command to store a valid environment. |
c609719b | 2287 | |
6d0f6bcf | 2288 | - CONFIG_SYS_FAULT_ECHO_LINK_DOWN: |
42d1f039 | 2289 | Echo the inverted Ethernet link state to the fault LED. |
fc3e2165 | 2290 | |
6d0f6bcf | 2291 | Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR |
fc3e2165 WD |
2292 | also needs to be defined. |
2293 | ||
6d0f6bcf | 2294 | - CONFIG_SYS_FAULT_MII_ADDR: |
42d1f039 | 2295 | MII address of the PHY to check for the Ethernet link state. |
c609719b | 2296 | |
f5675aa5 RM |
2297 | - CONFIG_NS16550_MIN_FUNCTIONS: |
2298 | Define this if you desire to only have use of the NS16550_init | |
2299 | and NS16550_putc functions for the serial driver located at | |
2300 | drivers/serial/ns16550.c. This option is useful for saving | |
2301 | space for already greatly restricted images, including but not | |
2302 | limited to NAND_SPL configurations. | |
2303 | ||
b2b92f53 SG |
2304 | - CONFIG_DISPLAY_BOARDINFO |
2305 | Display information about the board that U-Boot is running on | |
2306 | when U-Boot starts up. The board function checkboard() is called | |
2307 | to do this. | |
2308 | ||
e2e3e2b1 SG |
2309 | - CONFIG_DISPLAY_BOARDINFO_LATE |
2310 | Similar to the previous option, but display this information | |
2311 | later, once stdio is running and output goes to the LCD, if | |
2312 | present. | |
2313 | ||
feb85801 SS |
2314 | - CONFIG_BOARD_SIZE_LIMIT: |
2315 | Maximum size of the U-Boot image. When defined, the | |
2316 | build system checks that the actual size does not | |
2317 | exceed it. | |
2318 | ||
c609719b | 2319 | Low Level (hardware related) configuration options: |
dc7c9a1a | 2320 | --------------------------------------------------- |
c609719b | 2321 | |
6d0f6bcf | 2322 | - CONFIG_SYS_CACHELINE_SIZE: |
c609719b WD |
2323 | Cache Line Size of the CPU. |
2324 | ||
e46fedfe TT |
2325 | - CONFIG_SYS_CCSRBAR_DEFAULT: |
2326 | Default (power-on reset) physical address of CCSR on Freescale | |
2327 | PowerPC SOCs. | |
2328 | ||
2329 | - CONFIG_SYS_CCSRBAR: | |
2330 | Virtual address of CCSR. On a 32-bit build, this is typically | |
2331 | the same value as CONFIG_SYS_CCSRBAR_DEFAULT. | |
2332 | ||
e46fedfe TT |
2333 | - CONFIG_SYS_CCSRBAR_PHYS: |
2334 | Physical address of CCSR. CCSR can be relocated to a new | |
2335 | physical address, if desired. In this case, this macro should | |
c0f40859 | 2336 | be set to that address. Otherwise, it should be set to the |
e46fedfe TT |
2337 | same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR |
2338 | is typically relocated on 36-bit builds. It is recommended | |
2339 | that this macro be defined via the _HIGH and _LOW macros: | |
2340 | ||
2341 | #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH | |
2342 | * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) | |
2343 | ||
2344 | - CONFIG_SYS_CCSRBAR_PHYS_HIGH: | |
4cf2609b WD |
2345 | Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically |
2346 | either 0 (32-bit build) or 0xF (36-bit build). This macro is | |
e46fedfe TT |
2347 | used in assembly code, so it must not contain typecasts or |
2348 | integer size suffixes (e.g. "ULL"). | |
2349 | ||
2350 | - CONFIG_SYS_CCSRBAR_PHYS_LOW: | |
2351 | Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is | |
2352 | used in assembly code, so it must not contain typecasts or | |
2353 | integer size suffixes (e.g. "ULL"). | |
2354 | ||
2355 | - CONFIG_SYS_CCSR_DO_NOT_RELOCATE: | |
2356 | If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be | |
2357 | forced to a value that ensures that CCSR is not relocated. | |
2358 | ||
6d0f6bcf | 2359 | - CONFIG_SYS_IMMR: Physical address of the Internal Memory. |
efe2a4d5 | 2360 | DO NOT CHANGE unless you know exactly what you're |
907208c4 | 2361 | doing! (11-4) [MPC8xx systems only] |
c609719b | 2362 | |
6d0f6bcf | 2363 | - CONFIG_SYS_INIT_RAM_ADDR: |
c609719b | 2364 | |
7152b1d0 | 2365 | Start address of memory area that can be used for |
c609719b WD |
2366 | initial data and stack; please note that this must be |
2367 | writable memory that is working WITHOUT special | |
2368 | initialization, i. e. you CANNOT use normal RAM which | |
2369 | will become available only after programming the | |
2370 | memory controller and running certain initialization | |
2371 | sequences. | |
2372 | ||
2373 | U-Boot uses the following memory types: | |
907208c4 | 2374 | - MPC8xx: IMMR (internal memory of the CPU) |
c609719b | 2375 | |
6d0f6bcf | 2376 | - CONFIG_SYS_GBL_DATA_OFFSET: |
c609719b WD |
2377 | |
2378 | Offset of the initial data structure in the memory | |
6d0f6bcf JCPV |
2379 | area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually |
2380 | CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial | |
c609719b | 2381 | data is located at the end of the available space |
553f0982 | 2382 | (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - |
acd51f9d | 2383 | GENERATED_GBL_DATA_SIZE), and the initial stack is just |
6d0f6bcf JCPV |
2384 | below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + |
2385 | CONFIG_SYS_GBL_DATA_OFFSET) downward. | |
c609719b WD |
2386 | |
2387 | Note: | |
2388 | On the MPC824X (or other systems that use the data | |
2389 | cache for initial memory) the address chosen for | |
6d0f6bcf | 2390 | CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must |
c609719b WD |
2391 | point to an otherwise UNUSED address space between |
2392 | the top of RAM and the start of the PCI space. | |
2393 | ||
6d0f6bcf | 2394 | - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) |
c609719b | 2395 | |
6d0f6bcf | 2396 | - CONFIG_SYS_OR_TIMING_SDRAM: |
c609719b WD |
2397 | SDRAM timing |
2398 | ||
6d0f6bcf | 2399 | - CONFIG_SYS_MAMR_PTA: |
c609719b WD |
2400 | periodic timer for refresh |
2401 | ||
a09b9b68 KG |
2402 | - CONFIG_SYS_SRIO: |
2403 | Chip has SRIO or not | |
2404 | ||
2405 | - CONFIG_SRIO1: | |
2406 | Board has SRIO 1 port available | |
2407 | ||
2408 | - CONFIG_SRIO2: | |
2409 | Board has SRIO 2 port available | |
2410 | ||
c8b28152 LG |
2411 | - CONFIG_SRIO_PCIE_BOOT_MASTER |
2412 | Board can support master function for Boot from SRIO and PCIE | |
2413 | ||
a09b9b68 KG |
2414 | - CONFIG_SYS_SRIOn_MEM_VIRT: |
2415 | Virtual Address of SRIO port 'n' memory region | |
2416 | ||
62f9b654 | 2417 | - CONFIG_SYS_SRIOn_MEM_PHYxS: |
a09b9b68 KG |
2418 | Physical Address of SRIO port 'n' memory region |
2419 | ||
2420 | - CONFIG_SYS_SRIOn_MEM_SIZE: | |
2421 | Size of SRIO port 'n' memory region | |
2422 | ||
66bd1846 FE |
2423 | - CONFIG_SYS_NAND_BUSWIDTH_16BIT |
2424 | Defined to tell the NAND controller that the NAND chip is using | |
2425 | a 16 bit bus. | |
2426 | Not all NAND drivers use this symbol. | |
a430e916 | 2427 | Example of drivers that use it: |
a430fa06 MR |
2428 | - drivers/mtd/nand/raw/ndfc.c |
2429 | - drivers/mtd/nand/raw/mxc_nand.c | |
eced4626 AW |
2430 | |
2431 | - CONFIG_SYS_NDFC_EBC0_CFG | |
2432 | Sets the EBC0_CFG register for the NDFC. If not defined | |
2433 | a default value will be used. | |
2434 | ||
bb99ad6d | 2435 | - CONFIG_SPD_EEPROM |
218ca724 WD |
2436 | Get DDR timing information from an I2C EEPROM. Common |
2437 | with pluggable memory modules such as SODIMMs | |
2438 | ||
bb99ad6d BW |
2439 | SPD_EEPROM_ADDRESS |
2440 | I2C address of the SPD EEPROM | |
2441 | ||
6d0f6bcf | 2442 | - CONFIG_SYS_SPD_BUS_NUM |
218ca724 WD |
2443 | If SPD EEPROM is on an I2C bus other than the first |
2444 | one, specify here. Note that the value must resolve | |
2445 | to something your driver can deal with. | |
bb99ad6d | 2446 | |
1b3e3c4f YS |
2447 | - CONFIG_SYS_DDR_RAW_TIMING |
2448 | Get DDR timing information from other than SPD. Common with | |
2449 | soldered DDR chips onboard without SPD. DDR raw timing | |
2450 | parameters are extracted from datasheet and hard-coded into | |
2451 | header files or board specific files. | |
2452 | ||
6f5e1dc5 YS |
2453 | - CONFIG_FSL_DDR_INTERACTIVE |
2454 | Enable interactive DDR debugging. See doc/README.fsl-ddr. | |
2455 | ||
e32d59a2 YS |
2456 | - CONFIG_FSL_DDR_SYNC_REFRESH |
2457 | Enable sync of refresh for multiple controllers. | |
2458 | ||
4516ff81 YS |
2459 | - CONFIG_FSL_DDR_BIST |
2460 | Enable built-in memory test for Freescale DDR controllers. | |
2461 | ||
6d0f6bcf | 2462 | - CONFIG_SYS_83XX_DDR_USES_CS0 |
218ca724 WD |
2463 | Only for 83xx systems. If specified, then DDR should |
2464 | be configured using CS0 and CS1 instead of CS2 and CS3. | |
2ad6b513 | 2465 | |
c26e454d WD |
2466 | - CONFIG_RMII |
2467 | Enable RMII mode for all FECs. | |
2468 | Note that this is a global option, we can't | |
2469 | have one FEC in standard MII mode and another in RMII mode. | |
2470 | ||
5cf91d6b WD |
2471 | - CONFIG_CRC32_VERIFY |
2472 | Add a verify option to the crc32 command. | |
2473 | The syntax is: | |
2474 | ||
2475 | => crc32 -v <address> <count> <crc32> | |
2476 | ||
2477 | Where address/count indicate a memory area | |
2478 | and crc32 is the correct crc32 which the | |
2479 | area should have. | |
2480 | ||
56523f12 WD |
2481 | - CONFIG_LOOPW |
2482 | Add the "loopw" memory command. This only takes effect if | |
493f420e | 2483 | the memory commands are activated globally (CONFIG_CMD_MEMORY). |
56523f12 | 2484 | |
72732318 | 2485 | - CONFIG_CMD_MX_CYCLIC |
7b466641 SR |
2486 | Add the "mdc" and "mwc" memory commands. These are cyclic |
2487 | "md/mw" commands. | |
2488 | Examples: | |
2489 | ||
efe2a4d5 | 2490 | => mdc.b 10 4 500 |
7b466641 SR |
2491 | This command will print 4 bytes (10,11,12,13) each 500 ms. |
2492 | ||
efe2a4d5 | 2493 | => mwc.l 100 12345678 10 |
7b466641 SR |
2494 | This command will write 12345678 to address 100 all 10 ms. |
2495 | ||
efe2a4d5 | 2496 | This only takes effect if the memory commands are activated |
493f420e | 2497 | globally (CONFIG_CMD_MEMORY). |
7b466641 | 2498 | |
401bb30b | 2499 | - CONFIG_SPL_BUILD |
32f2ca2a TH |
2500 | Set when the currently-running compilation is for an artifact |
2501 | that will end up in the SPL (as opposed to the TPL or U-Boot | |
2502 | proper). Code that needs stage-specific behavior should check | |
2503 | this. | |
400558b5 | 2504 | |
3aa29de0 | 2505 | - CONFIG_TPL_BUILD |
32f2ca2a TH |
2506 | Set when the currently-running compilation is for an artifact |
2507 | that will end up in the TPL (as opposed to the SPL or U-Boot | |
2508 | proper). Code that needs stage-specific behavior should check | |
2509 | this. | |
3aa29de0 | 2510 | |
5df572f0 YZ |
2511 | - CONFIG_SYS_MPC85XX_NO_RESETVEC |
2512 | Only for 85xx systems. If this variable is specified, the section | |
2513 | .resetvec is not kept and the section .bootpg is placed in the | |
2514 | previous 4k of the .text section. | |
2515 | ||
4213fc29 SG |
2516 | - CONFIG_ARCH_MAP_SYSMEM |
2517 | Generally U-Boot (and in particular the md command) uses | |
2518 | effective address. It is therefore not necessary to regard | |
2519 | U-Boot address as virtual addresses that need to be translated | |
2520 | to physical addresses. However, sandbox requires this, since | |
2521 | it maintains its own little RAM buffer which contains all | |
2522 | addressable memory. This option causes some memory accesses | |
2523 | to be mapped through map_sysmem() / unmap_sysmem(). | |
2524 | ||
588a13f7 SG |
2525 | - CONFIG_X86_RESET_VECTOR |
2526 | If defined, the x86 reset vector code is included. This is not | |
2527 | needed when U-Boot is running from Coreboot. | |
b16f521a | 2528 | |
999d7d32 KM |
2529 | - CONFIG_SYS_NAND_NO_SUBPAGE_WRITE |
2530 | Option to disable subpage write in NAND driver | |
2531 | driver that uses this: | |
a430fa06 | 2532 | drivers/mtd/nand/raw/davinci_nand.c |
999d7d32 | 2533 | |
f2717b47 TT |
2534 | Freescale QE/FMAN Firmware Support: |
2535 | ----------------------------------- | |
2536 | ||
2537 | The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the | |
2538 | loading of "firmware", which is encoded in the QE firmware binary format. | |
2539 | This firmware often needs to be loaded during U-Boot booting, so macros | |
2540 | are used to identify the storage device (NOR flash, SPI, etc) and the address | |
2541 | within that device. | |
2542 | ||
dcf1d774 ZQ |
2543 | - CONFIG_SYS_FMAN_FW_ADDR |
2544 | The address in the storage device where the FMAN microcode is located. The | |
cc1e98b5 | 2545 | meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro |
dcf1d774 ZQ |
2546 | is also specified. |
2547 | ||
2548 | - CONFIG_SYS_QE_FW_ADDR | |
2549 | The address in the storage device where the QE microcode is located. The | |
cc1e98b5 | 2550 | meaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro |
f2717b47 TT |
2551 | is also specified. |
2552 | ||
2553 | - CONFIG_SYS_QE_FMAN_FW_LENGTH | |
2554 | The maximum possible size of the firmware. The firmware binary format | |
2555 | has a field that specifies the actual size of the firmware, but it | |
2556 | might not be possible to read any part of the firmware unless some | |
2557 | local storage is allocated to hold the entire firmware first. | |
2558 | ||
2559 | - CONFIG_SYS_QE_FMAN_FW_IN_NOR | |
2560 | Specifies that QE/FMAN firmware is located in NOR flash, mapped as | |
2561 | normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the | |
2562 | virtual address in NOR flash. | |
2563 | ||
2564 | - CONFIG_SYS_QE_FMAN_FW_IN_NAND | |
2565 | Specifies that QE/FMAN firmware is located in NAND flash. | |
2566 | CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash. | |
2567 | ||
2568 | - CONFIG_SYS_QE_FMAN_FW_IN_MMC | |
2569 | Specifies that QE/FMAN firmware is located on the primary SD/MMC | |
2570 | device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. | |
2571 | ||
292dc6c5 LG |
2572 | - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE |
2573 | Specifies that QE/FMAN firmware is located in the remote (master) | |
2574 | memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which | |
fc54c7fa LG |
2575 | can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound |
2576 | window->master inbound window->master LAW->the ucode address in | |
2577 | master's memory space. | |
f2717b47 | 2578 | |
b940ca64 GR |
2579 | Freescale Layerscape Management Complex Firmware Support: |
2580 | --------------------------------------------------------- | |
2581 | The Freescale Layerscape Management Complex (MC) supports the loading of | |
2582 | "firmware". | |
2583 | This firmware often needs to be loaded during U-Boot booting, so macros | |
2584 | are used to identify the storage device (NOR flash, SPI, etc) and the address | |
2585 | within that device. | |
2586 | ||
2587 | - CONFIG_FSL_MC_ENET | |
2588 | Enable the MC driver for Layerscape SoCs. | |
2589 | ||
5c055089 PK |
2590 | Freescale Layerscape Debug Server Support: |
2591 | ------------------------------------------- | |
2592 | The Freescale Layerscape Debug Server Support supports the loading of | |
2593 | "Debug Server firmware" and triggering SP boot-rom. | |
2594 | This firmware often needs to be loaded during U-Boot booting. | |
2595 | ||
c0492141 YS |
2596 | - CONFIG_SYS_MC_RSV_MEM_ALIGN |
2597 | Define alignment of reserved memory MC requires | |
5c055089 | 2598 | |
f3f431a7 PK |
2599 | Reproducible builds |
2600 | ------------------- | |
2601 | ||
2602 | In order to achieve reproducible builds, timestamps used in the U-Boot build | |
2603 | process have to be set to a fixed value. | |
2604 | ||
2605 | This is done using the SOURCE_DATE_EPOCH environment variable. | |
2606 | SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration | |
2607 | option for U-Boot or an environment variable in U-Boot. | |
2608 | ||
2609 | SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC. | |
2610 | ||
c609719b WD |
2611 | Building the Software: |
2612 | ====================== | |
2613 | ||
218ca724 WD |
2614 | Building U-Boot has been tested in several native build environments |
2615 | and in many different cross environments. Of course we cannot support | |
2616 | all possibly existing versions of cross development tools in all | |
2617 | (potentially obsolete) versions. In case of tool chain problems we | |
047f6ec0 | 2618 | recommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK) |
218ca724 | 2619 | which is extensively used to build and test U-Boot. |
c609719b | 2620 | |
218ca724 WD |
2621 | If you are not using a native environment, it is assumed that you |
2622 | have GNU cross compiling tools available in your path. In this case, | |
2623 | you must set the environment variable CROSS_COMPILE in your shell. | |
2624 | Note that no changes to the Makefile or any other source files are | |
2625 | necessary. For example using the ELDK on a 4xx CPU, please enter: | |
c609719b | 2626 | |
218ca724 WD |
2627 | $ CROSS_COMPILE=ppc_4xx- |
2628 | $ export CROSS_COMPILE | |
c609719b | 2629 | |
218ca724 WD |
2630 | U-Boot is intended to be simple to build. After installing the |
2631 | sources you must configure U-Boot for one specific board type. This | |
c609719b WD |
2632 | is done by typing: |
2633 | ||
ab584d67 | 2634 | make NAME_defconfig |
c609719b | 2635 | |
ab584d67 | 2636 | where "NAME_defconfig" is the name of one of the existing configu- |
ecb3a0a1 | 2637 | rations; see configs/*_defconfig for supported names. |
db01a2ea | 2638 | |
ecb3a0a1 | 2639 | Note: for some boards special configuration names may exist; check if |
2729af9d WD |
2640 | additional information is available from the board vendor; for |
2641 | instance, the TQM823L systems are available without (standard) | |
2642 | or with LCD support. You can select such additional "features" | |
11ccc33f | 2643 | when choosing the configuration, i. e. |
2729af9d | 2644 | |
ab584d67 | 2645 | make TQM823L_defconfig |
2729af9d WD |
2646 | - will configure for a plain TQM823L, i. e. no LCD support |
2647 | ||
ab584d67 | 2648 | make TQM823L_LCD_defconfig |
2729af9d WD |
2649 | - will configure for a TQM823L with U-Boot console on LCD |
2650 | ||
2651 | etc. | |
2652 | ||
2653 | ||
2654 | Finally, type "make all", and you should get some working U-Boot | |
2655 | images ready for download to / installation on your system: | |
2656 | ||
2657 | - "u-boot.bin" is a raw binary image | |
2658 | - "u-boot" is an image in ELF binary format | |
2659 | - "u-boot.srec" is in Motorola S-Record format | |
2660 | ||
baf31249 MB |
2661 | By default the build is performed locally and the objects are saved |
2662 | in the source directory. One of the two methods can be used to change | |
2663 | this behavior and build U-Boot to some external directory: | |
2664 | ||
2665 | 1. Add O= to the make command line invocations: | |
2666 | ||
2667 | make O=/tmp/build distclean | |
ab584d67 | 2668 | make O=/tmp/build NAME_defconfig |
baf31249 MB |
2669 | make O=/tmp/build all |
2670 | ||
adbba996 | 2671 | 2. Set environment variable KBUILD_OUTPUT to point to the desired location: |
baf31249 | 2672 | |
adbba996 | 2673 | export KBUILD_OUTPUT=/tmp/build |
baf31249 | 2674 | make distclean |
ab584d67 | 2675 | make NAME_defconfig |
baf31249 MB |
2676 | make all |
2677 | ||
adbba996 | 2678 | Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment |
baf31249 MB |
2679 | variable. |
2680 | ||
215bb1c1 DS |
2681 | User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by |
2682 | setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS. | |
2683 | For example to treat all compiler warnings as errors: | |
2684 | ||
2685 | make KCFLAGS=-Werror | |
2729af9d WD |
2686 | |
2687 | Please be aware that the Makefiles assume you are using GNU make, so | |
2688 | for instance on NetBSD you might need to use "gmake" instead of | |
2689 | native "make". | |
2690 | ||
2691 | ||
2692 | If the system board that you have is not listed, then you will need | |
2693 | to port U-Boot to your hardware platform. To do this, follow these | |
2694 | steps: | |
2695 | ||
3c1496cd | 2696 | 1. Create a new directory to hold your board specific code. Add any |
2729af9d | 2697 | files you need. In your board directory, you will need at least |
3c1496cd PS |
2698 | the "Makefile" and a "<board>.c". |
2699 | 2. Create a new configuration file "include/configs/<board>.h" for | |
2700 | your board. | |
2729af9d WD |
2701 | 3. If you're porting U-Boot to a new CPU, then also create a new |
2702 | directory to hold your CPU specific code. Add any files you need. | |
ab584d67 | 2703 | 4. Run "make <board>_defconfig" with your new name. |
2729af9d WD |
2704 | 5. Type "make", and you should get a working "u-boot.srec" file |
2705 | to be installed on your target system. | |
2706 | 6. Debug and solve any problems that might arise. | |
2707 | [Of course, this last step is much harder than it sounds.] | |
2708 | ||
2709 | ||
2710 | Testing of U-Boot Modifications, Ports to New Hardware, etc.: | |
2711 | ============================================================== | |
2712 | ||
218ca724 WD |
2713 | If you have modified U-Boot sources (for instance added a new board |
2714 | or support for new devices, a new CPU, etc.) you are expected to | |
2729af9d | 2715 | provide feedback to the other developers. The feedback normally takes |
32f2ca2a | 2716 | the form of a "patch", i.e. a context diff against a certain (latest |
218ca724 | 2717 | official or latest in the git repository) version of U-Boot sources. |
2729af9d | 2718 | |
218ca724 WD |
2719 | But before you submit such a patch, please verify that your modifi- |
2720 | cation did not break existing code. At least make sure that *ALL* of | |
2729af9d | 2721 | the supported boards compile WITHOUT ANY compiler warnings. To do so, |
6de80f21 SG |
2722 | just run the buildman script (tools/buildman/buildman), which will |
2723 | configure and build U-Boot for ALL supported system. Be warned, this | |
2724 | will take a while. Please see the buildman README, or run 'buildman -H' | |
2725 | for documentation. | |
baf31249 MB |
2726 | |
2727 | ||
2729af9d WD |
2728 | See also "U-Boot Porting Guide" below. |
2729 | ||
2730 | ||
2731 | Monitor Commands - Overview: | |
2732 | ============================ | |
2733 | ||
2734 | go - start application at address 'addr' | |
2735 | run - run commands in an environment variable | |
2736 | bootm - boot application image from memory | |
2737 | bootp - boot image via network using BootP/TFTP protocol | |
44f074c7 | 2738 | bootz - boot zImage from memory |
2729af9d WD |
2739 | tftpboot- boot image via network using TFTP protocol |
2740 | and env variables "ipaddr" and "serverip" | |
2741 | (and eventually "gatewayip") | |
1fb7cd49 | 2742 | tftpput - upload a file via network using TFTP protocol |
2729af9d WD |
2743 | rarpboot- boot image via network using RARP/TFTP protocol |
2744 | diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd' | |
2745 | loads - load S-Record file over serial line | |
2746 | loadb - load binary file over serial line (kermit mode) | |
2747 | md - memory display | |
2748 | mm - memory modify (auto-incrementing) | |
2749 | nm - memory modify (constant address) | |
2750 | mw - memory write (fill) | |
bdded201 | 2751 | ms - memory search |
2729af9d WD |
2752 | cp - memory copy |
2753 | cmp - memory compare | |
2754 | crc32 - checksum calculation | |
0f89c54b | 2755 | i2c - I2C sub-system |
2729af9d WD |
2756 | sspi - SPI utility commands |
2757 | base - print or set address offset | |
2758 | printenv- print environment variables | |
9e9a530a | 2759 | pwm - control pwm channels |
2729af9d WD |
2760 | setenv - set environment variables |
2761 | saveenv - save environment variables to persistent storage | |
2762 | protect - enable or disable FLASH write protection | |
2763 | erase - erase FLASH memory | |
2764 | flinfo - print FLASH memory information | |
10635afa | 2765 | nand - NAND memory operations (see doc/README.nand) |
2729af9d WD |
2766 | bdinfo - print Board Info structure |
2767 | iminfo - print header information for application image | |
2768 | coninfo - print console devices and informations | |
2769 | ide - IDE sub-system | |
2770 | loop - infinite loop on address range | |
56523f12 | 2771 | loopw - infinite write loop on address range |
2729af9d WD |
2772 | mtest - simple RAM test |
2773 | icache - enable or disable instruction cache | |
2774 | dcache - enable or disable data cache | |
2775 | reset - Perform RESET of the CPU | |
2776 | echo - echo args to console | |
2777 | version - print monitor version | |
2778 | help - print online help | |
2779 | ? - alias for 'help' | |
2780 | ||
2781 | ||
2782 | Monitor Commands - Detailed Description: | |
2783 | ======================================== | |
2784 | ||
2785 | TODO. | |
2786 | ||
2787 | For now: just type "help <command>". | |
2788 | ||
2789 | ||
2729af9d WD |
2790 | Note for Redundant Ethernet Interfaces: |
2791 | ======================================= | |
c609719b | 2792 | |
11ccc33f | 2793 | Some boards come with redundant Ethernet interfaces; U-Boot supports |
2729af9d WD |
2794 | such configurations and is capable of automatic selection of a |
2795 | "working" interface when needed. MAC assignment works as follows: | |
c609719b | 2796 | |
2729af9d WD |
2797 | Network interfaces are numbered eth0, eth1, eth2, ... Corresponding |
2798 | MAC addresses can be stored in the environment as "ethaddr" (=>eth0), | |
2799 | "eth1addr" (=>eth1), "eth2addr", ... | |
c609719b | 2800 | |
2729af9d WD |
2801 | If the network interface stores some valid MAC address (for instance |
2802 | in SROM), this is used as default address if there is NO correspon- | |
2803 | ding setting in the environment; if the corresponding environment | |
2804 | variable is set, this overrides the settings in the card; that means: | |
c609719b | 2805 | |
2729af9d WD |
2806 | o If the SROM has a valid MAC address, and there is no address in the |
2807 | environment, the SROM's address is used. | |
c609719b | 2808 | |
2729af9d WD |
2809 | o If there is no valid address in the SROM, and a definition in the |
2810 | environment exists, then the value from the environment variable is | |
2811 | used. | |
c609719b | 2812 | |
2729af9d WD |
2813 | o If both the SROM and the environment contain a MAC address, and |
2814 | both addresses are the same, this MAC address is used. | |
c609719b | 2815 | |
2729af9d WD |
2816 | o If both the SROM and the environment contain a MAC address, and the |
2817 | addresses differ, the value from the environment is used and a | |
2818 | warning is printed. | |
c609719b | 2819 | |
2729af9d | 2820 | o If neither SROM nor the environment contain a MAC address, an error |
bef1014b JH |
2821 | is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case |
2822 | a random, locally-assigned MAC is used. | |
c609719b | 2823 | |
ecee9324 | 2824 | If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses |
c0f40859 | 2825 | will be programmed into hardware as part of the initialization process. This |
ecee9324 BW |
2826 | may be skipped by setting the appropriate 'ethmacskip' environment variable. |
2827 | The naming convention is as follows: | |
2828 | "ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc. | |
c609719b | 2829 | |
2729af9d WD |
2830 | Image Formats: |
2831 | ============== | |
c609719b | 2832 | |
3310c549 MB |
2833 | U-Boot is capable of booting (and performing other auxiliary operations on) |
2834 | images in two formats: | |
2835 | ||
2836 | New uImage format (FIT) | |
2837 | ----------------------- | |
2838 | ||
2839 | Flexible and powerful format based on Flattened Image Tree -- FIT (similar | |
2840 | to Flattened Device Tree). It allows the use of images with multiple | |
2841 | components (several kernels, ramdisks, etc.), with contents protected by | |
2842 | SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory. | |
2843 | ||
2844 | ||
2845 | Old uImage format | |
2846 | ----------------- | |
2847 | ||
2848 | Old image format is based on binary files which can be basically anything, | |
2849 | preceded by a special header; see the definitions in include/image.h for | |
2850 | details; basically, the header defines the following image properties: | |
c609719b | 2851 | |
2729af9d WD |
2852 | * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD, |
2853 | 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks, | |
f5ed9e39 | 2854 | LynxOS, pSOS, QNX, RTEMS, INTEGRITY; |
0797e736 | 2855 | Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY). |
daab59ac | 2856 | * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86, |
afc1ce82 | 2857 | IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; |
daab59ac | 2858 | Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC). |
2729af9d WD |
2859 | * Compression Type (uncompressed, gzip, bzip2) |
2860 | * Load Address | |
2861 | * Entry Point | |
2862 | * Image Name | |
2863 | * Image Timestamp | |
c609719b | 2864 | |
2729af9d WD |
2865 | The header is marked by a special Magic Number, and both the header |
2866 | and the data portions of the image are secured against corruption by | |
2867 | CRC32 checksums. | |
c609719b WD |
2868 | |
2869 | ||
2729af9d WD |
2870 | Linux Support: |
2871 | ============== | |
c609719b | 2872 | |
2729af9d WD |
2873 | Although U-Boot should support any OS or standalone application |
2874 | easily, the main focus has always been on Linux during the design of | |
2875 | U-Boot. | |
c609719b | 2876 | |
2729af9d WD |
2877 | U-Boot includes many features that so far have been part of some |
2878 | special "boot loader" code within the Linux kernel. Also, any | |
2879 | "initrd" images to be used are no longer part of one big Linux image; | |
2880 | instead, kernel and "initrd" are separate images. This implementation | |
2881 | serves several purposes: | |
c609719b | 2882 | |
2729af9d WD |
2883 | - the same features can be used for other OS or standalone |
2884 | applications (for instance: using compressed images to reduce the | |
2885 | Flash memory footprint) | |
c609719b | 2886 | |
2729af9d WD |
2887 | - it becomes much easier to port new Linux kernel versions because |
2888 | lots of low-level, hardware dependent stuff are done by U-Boot | |
c609719b | 2889 | |
2729af9d WD |
2890 | - the same Linux kernel image can now be used with different "initrd" |
2891 | images; of course this also means that different kernel images can | |
2892 | be run with the same "initrd". This makes testing easier (you don't | |
2893 | have to build a new "zImage.initrd" Linux image when you just | |
2894 | change a file in your "initrd"). Also, a field-upgrade of the | |
2895 | software is easier now. | |
c609719b | 2896 | |
c609719b | 2897 | |
2729af9d WD |
2898 | Linux HOWTO: |
2899 | ============ | |
c609719b | 2900 | |
2729af9d WD |
2901 | Porting Linux to U-Boot based systems: |
2902 | --------------------------------------- | |
c609719b | 2903 | |
2729af9d WD |
2904 | U-Boot cannot save you from doing all the necessary modifications to |
2905 | configure the Linux device drivers for use with your target hardware | |
2906 | (no, we don't intend to provide a full virtual machine interface to | |
2907 | Linux :-). | |
c609719b | 2908 | |
a47a12be | 2909 | But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot). |
24ee89b9 | 2910 | |
2729af9d WD |
2911 | Just make sure your machine specific header file (for instance |
2912 | include/asm-ppc/tqm8xx.h) includes the same definition of the Board | |
1dc30693 MH |
2913 | Information structure as we define in include/asm-<arch>/u-boot.h, |
2914 | and make sure that your definition of IMAP_ADDR uses the same value | |
6d0f6bcf | 2915 | as your U-Boot configuration in CONFIG_SYS_IMMR. |
24ee89b9 | 2916 | |
2eb31b13 SG |
2917 | Note that U-Boot now has a driver model, a unified model for drivers. |
2918 | If you are adding a new driver, plumb it into driver model. If there | |
2919 | is no uclass available, you are encouraged to create one. See | |
2920 | doc/driver-model. | |
2921 | ||
c609719b | 2922 | |
2729af9d WD |
2923 | Configuring the Linux kernel: |
2924 | ----------------------------- | |
c609719b | 2925 | |
2729af9d WD |
2926 | No specific requirements for U-Boot. Make sure you have some root |
2927 | device (initial ramdisk, NFS) for your target system. | |
2928 | ||
2929 | ||
2930 | Building a Linux Image: | |
2931 | ----------------------- | |
c609719b | 2932 | |
2729af9d WD |
2933 | With U-Boot, "normal" build targets like "zImage" or "bzImage" are |
2934 | not used. If you use recent kernel source, a new build target | |
2935 | "uImage" will exist which automatically builds an image usable by | |
2936 | U-Boot. Most older kernels also have support for a "pImage" target, | |
2937 | which was introduced for our predecessor project PPCBoot and uses a | |
2938 | 100% compatible format. | |
2939 | ||
2940 | Example: | |
2941 | ||
ab584d67 | 2942 | make TQM850L_defconfig |
2729af9d WD |
2943 | make oldconfig |
2944 | make dep | |
2945 | make uImage | |
2946 | ||
2947 | The "uImage" build target uses a special tool (in 'tools/mkimage') to | |
2948 | encapsulate a compressed Linux kernel image with header information, | |
2949 | CRC32 checksum etc. for use with U-Boot. This is what we are doing: | |
2950 | ||
2951 | * build a standard "vmlinux" kernel image (in ELF binary format): | |
2952 | ||
2953 | * convert the kernel into a raw binary image: | |
2954 | ||
2955 | ${CROSS_COMPILE}-objcopy -O binary \ | |
2956 | -R .note -R .comment \ | |
2957 | -S vmlinux linux.bin | |
2958 | ||
2959 | * compress the binary image: | |
2960 | ||
2961 | gzip -9 linux.bin | |
2962 | ||
2963 | * package compressed binary image for U-Boot: | |
2964 | ||
2965 | mkimage -A ppc -O linux -T kernel -C gzip \ | |
2966 | -a 0 -e 0 -n "Linux Kernel Image" \ | |
2967 | -d linux.bin.gz uImage | |
c609719b | 2968 | |
c609719b | 2969 | |
2729af9d WD |
2970 | The "mkimage" tool can also be used to create ramdisk images for use |
2971 | with U-Boot, either separated from the Linux kernel image, or | |
2972 | combined into one file. "mkimage" encapsulates the images with a 64 | |
2973 | byte header containing information about target architecture, | |
2974 | operating system, image type, compression method, entry points, time | |
2975 | stamp, CRC32 checksums, etc. | |
2976 | ||
2977 | "mkimage" can be called in two ways: to verify existing images and | |
2978 | print the header information, or to build new images. | |
2979 | ||
2980 | In the first form (with "-l" option) mkimage lists the information | |
2981 | contained in the header of an existing U-Boot image; this includes | |
2982 | checksum verification: | |
c609719b | 2983 | |
2729af9d WD |
2984 | tools/mkimage -l image |
2985 | -l ==> list image header information | |
2986 | ||
2987 | The second form (with "-d" option) is used to build a U-Boot image | |
2988 | from a "data file" which is used as image payload: | |
2989 | ||
2990 | tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \ | |
2991 | -n name -d data_file image | |
2992 | -A ==> set architecture to 'arch' | |
2993 | -O ==> set operating system to 'os' | |
2994 | -T ==> set image type to 'type' | |
2995 | -C ==> set compression type 'comp' | |
2996 | -a ==> set load address to 'addr' (hex) | |
2997 | -e ==> set entry point to 'ep' (hex) | |
2998 | -n ==> set image name to 'name' | |
2999 | -d ==> use image data from 'datafile' | |
3000 | ||
69459791 WD |
3001 | Right now, all Linux kernels for PowerPC systems use the same load |
3002 | address (0x00000000), but the entry point address depends on the | |
3003 | kernel version: | |
2729af9d WD |
3004 | |
3005 | - 2.2.x kernels have the entry point at 0x0000000C, | |
3006 | - 2.3.x and later kernels have the entry point at 0x00000000. | |
3007 | ||
3008 | So a typical call to build a U-Boot image would read: | |
3009 | ||
3010 | -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ | |
3011 | > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \ | |
a47a12be | 3012 | > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \ |
2729af9d WD |
3013 | > examples/uImage.TQM850L |
3014 | Image Name: 2.4.4 kernel for TQM850L | |
3015 | Created: Wed Jul 19 02:34:59 2000 | |
3016 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3017 | Data Size: 335725 Bytes = 327.86 kB = 0.32 MB | |
3018 | Load Address: 0x00000000 | |
3019 | Entry Point: 0x00000000 | |
3020 | ||
3021 | To verify the contents of the image (or check for corruption): | |
3022 | ||
3023 | -> tools/mkimage -l examples/uImage.TQM850L | |
3024 | Image Name: 2.4.4 kernel for TQM850L | |
3025 | Created: Wed Jul 19 02:34:59 2000 | |
3026 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3027 | Data Size: 335725 Bytes = 327.86 kB = 0.32 MB | |
3028 | Load Address: 0x00000000 | |
3029 | Entry Point: 0x00000000 | |
3030 | ||
3031 | NOTE: for embedded systems where boot time is critical you can trade | |
3032 | speed for memory and install an UNCOMPRESSED image instead: this | |
3033 | needs more space in Flash, but boots much faster since it does not | |
3034 | need to be uncompressed: | |
3035 | ||
a47a12be | 3036 | -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz |
2729af9d WD |
3037 | -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ |
3038 | > -A ppc -O linux -T kernel -C none -a 0 -e 0 \ | |
a47a12be | 3039 | > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \ |
2729af9d WD |
3040 | > examples/uImage.TQM850L-uncompressed |
3041 | Image Name: 2.4.4 kernel for TQM850L | |
3042 | Created: Wed Jul 19 02:34:59 2000 | |
3043 | Image Type: PowerPC Linux Kernel Image (uncompressed) | |
3044 | Data Size: 792160 Bytes = 773.59 kB = 0.76 MB | |
3045 | Load Address: 0x00000000 | |
3046 | Entry Point: 0x00000000 | |
3047 | ||
3048 | ||
3049 | Similar you can build U-Boot images from a 'ramdisk.image.gz' file | |
3050 | when your kernel is intended to use an initial ramdisk: | |
3051 | ||
3052 | -> tools/mkimage -n 'Simple Ramdisk Image' \ | |
3053 | > -A ppc -O linux -T ramdisk -C gzip \ | |
3054 | > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd | |
3055 | Image Name: Simple Ramdisk Image | |
3056 | Created: Wed Jan 12 14:01:50 2000 | |
3057 | Image Type: PowerPC Linux RAMDisk Image (gzip compressed) | |
3058 | Data Size: 566530 Bytes = 553.25 kB = 0.54 MB | |
3059 | Load Address: 0x00000000 | |
3060 | Entry Point: 0x00000000 | |
3061 | ||
e157a111 TH |
3062 | The "dumpimage" tool can be used to disassemble or list the contents of images |
3063 | built by mkimage. See dumpimage's help output (-h) for details. | |
2729af9d WD |
3064 | |
3065 | Installing a Linux Image: | |
3066 | ------------------------- | |
3067 | ||
3068 | To downloading a U-Boot image over the serial (console) interface, | |
3069 | you must convert the image to S-Record format: | |
3070 | ||
3071 | objcopy -I binary -O srec examples/image examples/image.srec | |
3072 | ||
3073 | The 'objcopy' does not understand the information in the U-Boot | |
3074 | image header, so the resulting S-Record file will be relative to | |
3075 | address 0x00000000. To load it to a given address, you need to | |
3076 | specify the target address as 'offset' parameter with the 'loads' | |
3077 | command. | |
3078 | ||
3079 | Example: install the image to address 0x40100000 (which on the | |
3080 | TQM8xxL is in the first Flash bank): | |
3081 | ||
3082 | => erase 40100000 401FFFFF | |
3083 | ||
3084 | .......... done | |
3085 | Erased 8 sectors | |
3086 | ||
3087 | => loads 40100000 | |
3088 | ## Ready for S-Record download ... | |
3089 | ~>examples/image.srec | |
3090 | 1 2 3 4 5 6 7 8 9 10 11 12 13 ... | |
3091 | ... | |
3092 | 15989 15990 15991 15992 | |
3093 | [file transfer complete] | |
3094 | [connected] | |
3095 | ## Start Addr = 0x00000000 | |
3096 | ||
3097 | ||
3098 | You can check the success of the download using the 'iminfo' command; | |
218ca724 | 3099 | this includes a checksum verification so you can be sure no data |
2729af9d WD |
3100 | corruption happened: |
3101 | ||
3102 | => imi 40100000 | |
3103 | ||
3104 | ## Checking Image at 40100000 ... | |
3105 | Image Name: 2.2.13 for initrd on TQM850L | |
3106 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3107 | Data Size: 335725 Bytes = 327 kB = 0 MB | |
3108 | Load Address: 00000000 | |
3109 | Entry Point: 0000000c | |
3110 | Verifying Checksum ... OK | |
3111 | ||
3112 | ||
3113 | Boot Linux: | |
3114 | ----------- | |
3115 | ||
3116 | The "bootm" command is used to boot an application that is stored in | |
3117 | memory (RAM or Flash). In case of a Linux kernel image, the contents | |
3118 | of the "bootargs" environment variable is passed to the kernel as | |
3119 | parameters. You can check and modify this variable using the | |
3120 | "printenv" and "setenv" commands: | |
3121 | ||
3122 | ||
3123 | => printenv bootargs | |
3124 | bootargs=root=/dev/ram | |
3125 | ||
3126 | => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 | |
3127 | ||
3128 | => printenv bootargs | |
3129 | bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 | |
3130 | ||
3131 | => bootm 40020000 | |
3132 | ## Booting Linux kernel at 40020000 ... | |
3133 | Image Name: 2.2.13 for NFS on TQM850L | |
3134 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3135 | Data Size: 381681 Bytes = 372 kB = 0 MB | |
3136 | Load Address: 00000000 | |
3137 | Entry Point: 0000000c | |
3138 | Verifying Checksum ... OK | |
3139 | Uncompressing Kernel Image ... OK | |
3140 | Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000 | |
3141 | Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 | |
3142 | time_init: decrementer frequency = 187500000/60 | |
3143 | Calibrating delay loop... 49.77 BogoMIPS | |
3144 | Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000] | |
3145 | ... | |
3146 | ||
11ccc33f | 3147 | If you want to boot a Linux kernel with initial RAM disk, you pass |
2729af9d WD |
3148 | the memory addresses of both the kernel and the initrd image (PPBCOOT |
3149 | format!) to the "bootm" command: | |
3150 | ||
3151 | => imi 40100000 40200000 | |
3152 | ||
3153 | ## Checking Image at 40100000 ... | |
3154 | Image Name: 2.2.13 for initrd on TQM850L | |
3155 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3156 | Data Size: 335725 Bytes = 327 kB = 0 MB | |
3157 | Load Address: 00000000 | |
3158 | Entry Point: 0000000c | |
3159 | Verifying Checksum ... OK | |
3160 | ||
3161 | ## Checking Image at 40200000 ... | |
3162 | Image Name: Simple Ramdisk Image | |
3163 | Image Type: PowerPC Linux RAMDisk Image (gzip compressed) | |
3164 | Data Size: 566530 Bytes = 553 kB = 0 MB | |
3165 | Load Address: 00000000 | |
3166 | Entry Point: 00000000 | |
3167 | Verifying Checksum ... OK | |
3168 | ||
3169 | => bootm 40100000 40200000 | |
3170 | ## Booting Linux kernel at 40100000 ... | |
3171 | Image Name: 2.2.13 for initrd on TQM850L | |
3172 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3173 | Data Size: 335725 Bytes = 327 kB = 0 MB | |
3174 | Load Address: 00000000 | |
3175 | Entry Point: 0000000c | |
3176 | Verifying Checksum ... OK | |
3177 | Uncompressing Kernel Image ... OK | |
3178 | ## Loading RAMDisk Image at 40200000 ... | |
3179 | Image Name: Simple Ramdisk Image | |
3180 | Image Type: PowerPC Linux RAMDisk Image (gzip compressed) | |
3181 | Data Size: 566530 Bytes = 553 kB = 0 MB | |
3182 | Load Address: 00000000 | |
3183 | Entry Point: 00000000 | |
3184 | Verifying Checksum ... OK | |
3185 | Loading Ramdisk ... OK | |
3186 | Linux version 2.2.13 ([email protected]) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000 | |
3187 | Boot arguments: root=/dev/ram | |
3188 | time_init: decrementer frequency = 187500000/60 | |
3189 | Calibrating delay loop... 49.77 BogoMIPS | |
3190 | ... | |
3191 | RAMDISK: Compressed image found at block 0 | |
3192 | VFS: Mounted root (ext2 filesystem). | |
3193 | ||
3194 | bash# | |
3195 | ||
0267768e MM |
3196 | Boot Linux and pass a flat device tree: |
3197 | ----------- | |
3198 | ||
3199 | First, U-Boot must be compiled with the appropriate defines. See the section | |
3200 | titled "Linux Kernel Interface" above for a more in depth explanation. The | |
3201 | following is an example of how to start a kernel and pass an updated | |
3202 | flat device tree: | |
3203 | ||
3204 | => print oftaddr | |
3205 | oftaddr=0x300000 | |
3206 | => print oft | |
3207 | oft=oftrees/mpc8540ads.dtb | |
3208 | => tftp $oftaddr $oft | |
3209 | Speed: 1000, full duplex | |
3210 | Using TSEC0 device | |
3211 | TFTP from server 192.168.1.1; our IP address is 192.168.1.101 | |
3212 | Filename 'oftrees/mpc8540ads.dtb'. | |
3213 | Load address: 0x300000 | |
3214 | Loading: # | |
3215 | done | |
3216 | Bytes transferred = 4106 (100a hex) | |
3217 | => tftp $loadaddr $bootfile | |
3218 | Speed: 1000, full duplex | |
3219 | Using TSEC0 device | |
3220 | TFTP from server 192.168.1.1; our IP address is 192.168.1.2 | |
3221 | Filename 'uImage'. | |
3222 | Load address: 0x200000 | |
3223 | Loading:############ | |
3224 | done | |
3225 | Bytes transferred = 1029407 (fb51f hex) | |
3226 | => print loadaddr | |
3227 | loadaddr=200000 | |
3228 | => print oftaddr | |
3229 | oftaddr=0x300000 | |
3230 | => bootm $loadaddr - $oftaddr | |
3231 | ## Booting image at 00200000 ... | |
a9398e01 WD |
3232 | Image Name: Linux-2.6.17-dirty |
3233 | Image Type: PowerPC Linux Kernel Image (gzip compressed) | |
3234 | Data Size: 1029343 Bytes = 1005.2 kB | |
0267768e | 3235 | Load Address: 00000000 |
a9398e01 | 3236 | Entry Point: 00000000 |
0267768e MM |
3237 | Verifying Checksum ... OK |
3238 | Uncompressing Kernel Image ... OK | |
3239 | Booting using flat device tree at 0x300000 | |
3240 | Using MPC85xx ADS machine description | |
3241 | Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb | |
3242 | [snip] | |
3243 | ||
3244 | ||
2729af9d WD |
3245 | More About U-Boot Image Types: |
3246 | ------------------------------ | |
3247 | ||
3248 | U-Boot supports the following image types: | |
3249 | ||
3250 | "Standalone Programs" are directly runnable in the environment | |
3251 | provided by U-Boot; it is expected that (if they behave | |
3252 | well) you can continue to work in U-Boot after return from | |
3253 | the Standalone Program. | |
3254 | "OS Kernel Images" are usually images of some Embedded OS which | |
3255 | will take over control completely. Usually these programs | |
3256 | will install their own set of exception handlers, device | |
3257 | drivers, set up the MMU, etc. - this means, that you cannot | |
3258 | expect to re-enter U-Boot except by resetting the CPU. | |
3259 | "RAMDisk Images" are more or less just data blocks, and their | |
3260 | parameters (address, size) are passed to an OS kernel that is | |
3261 | being started. | |
3262 | "Multi-File Images" contain several images, typically an OS | |
3263 | (Linux) kernel image and one or more data images like | |
3264 | RAMDisks. This construct is useful for instance when you want | |
3265 | to boot over the network using BOOTP etc., where the boot | |
3266 | server provides just a single image file, but you want to get | |
3267 | for instance an OS kernel and a RAMDisk image. | |
3268 | ||
3269 | "Multi-File Images" start with a list of image sizes, each | |
3270 | image size (in bytes) specified by an "uint32_t" in network | |
3271 | byte order. This list is terminated by an "(uint32_t)0". | |
3272 | Immediately after the terminating 0 follow the images, one by | |
3273 | one, all aligned on "uint32_t" boundaries (size rounded up to | |
3274 | a multiple of 4 bytes). | |
3275 | ||
3276 | "Firmware Images" are binary images containing firmware (like | |
3277 | U-Boot or FPGA images) which usually will be programmed to | |
3278 | flash memory. | |
3279 | ||
3280 | "Script files" are command sequences that will be executed by | |
3281 | U-Boot's command interpreter; this feature is especially | |
3282 | useful when you configure U-Boot to use a real shell (hush) | |
3283 | as command interpreter. | |
3284 | ||
44f074c7 MV |
3285 | Booting the Linux zImage: |
3286 | ------------------------- | |
3287 | ||
3288 | On some platforms, it's possible to boot Linux zImage. This is done | |
3289 | using the "bootz" command. The syntax of "bootz" command is the same | |
3290 | as the syntax of "bootm" command. | |
3291 | ||
8ac28563 | 3292 | Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply |
017e1f3f MV |
3293 | kernel with raw initrd images. The syntax is slightly different, the |
3294 | address of the initrd must be augmented by it's size, in the following | |
3295 | format: "<initrd addres>:<initrd size>". | |
3296 | ||
2729af9d WD |
3297 | |
3298 | Standalone HOWTO: | |
3299 | ================= | |
3300 | ||
3301 | One of the features of U-Boot is that you can dynamically load and | |
3302 | run "standalone" applications, which can use some resources of | |
3303 | U-Boot like console I/O functions or interrupt services. | |
3304 | ||
3305 | Two simple examples are included with the sources: | |
3306 | ||
3307 | "Hello World" Demo: | |
3308 | ------------------- | |
3309 | ||
3310 | 'examples/hello_world.c' contains a small "Hello World" Demo | |
3311 | application; it is automatically compiled when you build U-Boot. | |
3312 | It's configured to run at address 0x00040004, so you can play with it | |
3313 | like that: | |
3314 | ||
3315 | => loads | |
3316 | ## Ready for S-Record download ... | |
3317 | ~>examples/hello_world.srec | |
3318 | 1 2 3 4 5 6 7 8 9 10 11 ... | |
3319 | [file transfer complete] | |
3320 | [connected] | |
3321 | ## Start Addr = 0x00040004 | |
3322 | ||
3323 | => go 40004 Hello World! This is a test. | |
3324 | ## Starting application at 0x00040004 ... | |
3325 | Hello World | |
3326 | argc = 7 | |
3327 | argv[0] = "40004" | |
3328 | argv[1] = "Hello" | |
3329 | argv[2] = "World!" | |
3330 | argv[3] = "This" | |
3331 | argv[4] = "is" | |
3332 | argv[5] = "a" | |
3333 | argv[6] = "test." | |
3334 | argv[7] = "<NULL>" | |
3335 | Hit any key to exit ... | |
3336 | ||
3337 | ## Application terminated, rc = 0x0 | |
3338 | ||
3339 | Another example, which demonstrates how to register a CPM interrupt | |
3340 | handler with the U-Boot code, can be found in 'examples/timer.c'. | |
3341 | Here, a CPM timer is set up to generate an interrupt every second. | |
3342 | The interrupt service routine is trivial, just printing a '.' | |
3343 | character, but this is just a demo program. The application can be | |
3344 | controlled by the following keys: | |
3345 | ||
3346 | ? - print current values og the CPM Timer registers | |
3347 | b - enable interrupts and start timer | |
3348 | e - stop timer and disable interrupts | |
3349 | q - quit application | |
3350 | ||
3351 | => loads | |
3352 | ## Ready for S-Record download ... | |
3353 | ~>examples/timer.srec | |
3354 | 1 2 3 4 5 6 7 8 9 10 11 ... | |
3355 | [file transfer complete] | |
3356 | [connected] | |
3357 | ## Start Addr = 0x00040004 | |
3358 | ||
3359 | => go 40004 | |
3360 | ## Starting application at 0x00040004 ... | |
3361 | TIMERS=0xfff00980 | |
3362 | Using timer 1 | |
3363 | tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0 | |
3364 | ||
3365 | Hit 'b': | |
3366 | [q, b, e, ?] Set interval 1000000 us | |
3367 | Enabling timer | |
3368 | Hit '?': | |
3369 | [q, b, e, ?] ........ | |
3370 | tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0 | |
3371 | Hit '?': | |
3372 | [q, b, e, ?] . | |
3373 | tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0 | |
3374 | Hit '?': | |
3375 | [q, b, e, ?] . | |
3376 | tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0 | |
3377 | Hit '?': | |
3378 | [q, b, e, ?] . | |
3379 | tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0 | |
3380 | Hit 'e': | |
3381 | [q, b, e, ?] ...Stopping timer | |
3382 | Hit 'q': | |
3383 | [q, b, e, ?] ## Application terminated, rc = 0x0 | |
3384 | ||
3385 | ||
3386 | Minicom warning: | |
3387 | ================ | |
3388 | ||
3389 | Over time, many people have reported problems when trying to use the | |
3390 | "minicom" terminal emulation program for serial download. I (wd) | |
3391 | consider minicom to be broken, and recommend not to use it. Under | |
3392 | Unix, I recommend to use C-Kermit for general purpose use (and | |
3393 | especially for kermit binary protocol download ("loadb" command), and | |
e53515a2 | 3394 | use "cu" for S-Record download ("loads" command). See |
047f6ec0 | 3395 | https://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3. |
e53515a2 KP |
3396 | for help with kermit. |
3397 | ||
2729af9d WD |
3398 | |
3399 | Nevertheless, if you absolutely want to use it try adding this | |
3400 | configuration to your "File transfer protocols" section: | |
3401 | ||
3402 | Name Program Name U/D FullScr IO-Red. Multi | |
3403 | X kermit /usr/bin/kermit -i -l %l -s Y U Y N N | |
3404 | Y kermit /usr/bin/kermit -i -l %l -r N D Y N N | |
3405 | ||
3406 | ||
3407 | NetBSD Notes: | |
3408 | ============= | |
3409 | ||
3410 | Starting at version 0.9.2, U-Boot supports NetBSD both as host | |
3411 | (build U-Boot) and target system (boots NetBSD/mpc8xx). | |
3412 | ||
3413 | Building requires a cross environment; it is known to work on | |
3414 | NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also | |
3415 | need gmake since the Makefiles are not compatible with BSD make). | |
3416 | Note that the cross-powerpc package does not install include files; | |
3417 | attempting to build U-Boot will fail because <machine/ansi.h> is | |
3418 | missing. This file has to be installed and patched manually: | |
3419 | ||
3420 | # cd /usr/pkg/cross/powerpc-netbsd/include | |
3421 | # mkdir powerpc | |
3422 | # ln -s powerpc machine | |
3423 | # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h | |
3424 | # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST | |
3425 | ||
3426 | Native builds *don't* work due to incompatibilities between native | |
3427 | and U-Boot include files. | |
3428 | ||
3429 | Booting assumes that (the first part of) the image booted is a | |
3430 | stage-2 loader which in turn loads and then invokes the kernel | |
3431 | proper. Loader sources will eventually appear in the NetBSD source | |
3432 | tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the | |
2a8af187 | 3433 | meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz |
2729af9d WD |
3434 | |
3435 | ||
3436 | Implementation Internals: | |
3437 | ========================= | |
3438 | ||
3439 | The following is not intended to be a complete description of every | |
3440 | implementation detail. However, it should help to understand the | |
3441 | inner workings of U-Boot and make it easier to port it to custom | |
3442 | hardware. | |
3443 | ||
3444 | ||
3445 | Initial Stack, Global Data: | |
3446 | --------------------------- | |
3447 | ||
3448 | The implementation of U-Boot is complicated by the fact that U-Boot | |
3449 | starts running out of ROM (flash memory), usually without access to | |
3450 | system RAM (because the memory controller is not initialized yet). | |
3451 | This means that we don't have writable Data or BSS segments, and BSS | |
3452 | is not initialized as zero. To be able to get a C environment working | |
3453 | at all, we have to allocate at least a minimal stack. Implementation | |
3454 | options for this are defined and restricted by the CPU used: Some CPU | |
3455 | models provide on-chip memory (like the IMMR area on MPC8xx and | |
3456 | MPC826x processors), on others (parts of) the data cache can be | |
3457 | locked as (mis-) used as memory, etc. | |
3458 | ||
218ca724 | 3459 | Chris Hallinan posted a good summary of these issues to the |
0668236b | 3460 | U-Boot mailing list: |
2729af9d WD |
3461 | |
3462 | Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)? | |
3463 | From: "Chris Hallinan" <[email protected]> | |
3464 | Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET) | |
3465 | ... | |
3466 | ||
3467 | Correct me if I'm wrong, folks, but the way I understand it | |
3468 | is this: Using DCACHE as initial RAM for Stack, etc, does not | |
3469 | require any physical RAM backing up the cache. The cleverness | |
3470 | is that the cache is being used as a temporary supply of | |
3471 | necessary storage before the SDRAM controller is setup. It's | |
11ccc33f | 3472 | beyond the scope of this list to explain the details, but you |
2729af9d WD |
3473 | can see how this works by studying the cache architecture and |
3474 | operation in the architecture and processor-specific manuals. | |
3475 | ||
3476 | OCM is On Chip Memory, which I believe the 405GP has 4K. It | |
3477 | is another option for the system designer to use as an | |
11ccc33f | 3478 | initial stack/RAM area prior to SDRAM being available. Either |
2729af9d WD |
3479 | option should work for you. Using CS 4 should be fine if your |
3480 | board designers haven't used it for something that would | |
3481 | cause you grief during the initial boot! It is frequently not | |
3482 | used. | |
3483 | ||
6d0f6bcf | 3484 | CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere |
2729af9d WD |
3485 | with your processor/board/system design. The default value |
3486 | you will find in any recent u-boot distribution in | |
8a316c9b | 3487 | walnut.h should work for you. I'd set it to a value larger |
2729af9d WD |
3488 | than your SDRAM module. If you have a 64MB SDRAM module, set |
3489 | it above 400_0000. Just make sure your board has no resources | |
3490 | that are supposed to respond to that address! That code in | |
3491 | start.S has been around a while and should work as is when | |
3492 | you get the config right. | |
3493 | ||
3494 | -Chris Hallinan | |
3495 | DS4.COM, Inc. | |
3496 | ||
3497 | It is essential to remember this, since it has some impact on the C | |
3498 | code for the initialization procedures: | |
3499 | ||
3500 | * Initialized global data (data segment) is read-only. Do not attempt | |
3501 | to write it. | |
3502 | ||
b445bbb4 | 3503 | * Do not use any uninitialized global data (or implicitly initialized |
2729af9d WD |
3504 | as zero data - BSS segment) at all - this is undefined, initiali- |
3505 | zation is performed later (when relocating to RAM). | |
3506 | ||
3507 | * Stack space is very limited. Avoid big data buffers or things like | |
3508 | that. | |
3509 | ||
3510 | Having only the stack as writable memory limits means we cannot use | |
b445bbb4 | 3511 | normal global data to share information between the code. But it |
2729af9d WD |
3512 | turned out that the implementation of U-Boot can be greatly |
3513 | simplified by making a global data structure (gd_t) available to all | |
3514 | functions. We could pass a pointer to this data as argument to _all_ | |
3515 | functions, but this would bloat the code. Instead we use a feature of | |
3516 | the GCC compiler (Global Register Variables) to share the data: we | |
3517 | place a pointer (gd) to the global data into a register which we | |
3518 | reserve for this purpose. | |
3519 | ||
3520 | When choosing a register for such a purpose we are restricted by the | |
3521 | relevant (E)ABI specifications for the current architecture, and by | |
3522 | GCC's implementation. | |
3523 | ||
3524 | For PowerPC, the following registers have specific use: | |
3525 | R1: stack pointer | |
e7670f6c | 3526 | R2: reserved for system use |
2729af9d WD |
3527 | R3-R4: parameter passing and return values |
3528 | R5-R10: parameter passing | |
3529 | R13: small data area pointer | |
3530 | R30: GOT pointer | |
3531 | R31: frame pointer | |
3532 | ||
e6bee808 JT |
3533 | (U-Boot also uses R12 as internal GOT pointer. r12 |
3534 | is a volatile register so r12 needs to be reset when | |
3535 | going back and forth between asm and C) | |
2729af9d | 3536 | |
e7670f6c | 3537 | ==> U-Boot will use R2 to hold a pointer to the global data |
2729af9d WD |
3538 | |
3539 | Note: on PPC, we could use a static initializer (since the | |
3540 | address of the global data structure is known at compile time), | |
3541 | but it turned out that reserving a register results in somewhat | |
3542 | smaller code - although the code savings are not that big (on | |
3543 | average for all boards 752 bytes for the whole U-Boot image, | |
3544 | 624 text + 127 data). | |
3545 | ||
3546 | On ARM, the following registers are used: | |
3547 | ||
3548 | R0: function argument word/integer result | |
3549 | R1-R3: function argument word | |
12eba1b4 JH |
3550 | R9: platform specific |
3551 | R10: stack limit (used only if stack checking is enabled) | |
2729af9d WD |
3552 | R11: argument (frame) pointer |
3553 | R12: temporary workspace | |
3554 | R13: stack pointer | |
3555 | R14: link register | |
3556 | R15: program counter | |
3557 | ||
12eba1b4 JH |
3558 | ==> U-Boot will use R9 to hold a pointer to the global data |
3559 | ||
3560 | Note: on ARM, only R_ARM_RELATIVE relocations are supported. | |
2729af9d | 3561 | |
0df01fd3 | 3562 | On Nios II, the ABI is documented here: |
047f6ec0 | 3563 | https://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf |
0df01fd3 TC |
3564 | |
3565 | ==> U-Boot will use gp to hold a pointer to the global data | |
3566 | ||
3567 | Note: on Nios II, we give "-G0" option to gcc and don't use gp | |
3568 | to access small data sections, so gp is free. | |
3569 | ||
afc1ce82 ML |
3570 | On NDS32, the following registers are used: |
3571 | ||
3572 | R0-R1: argument/return | |
3573 | R2-R5: argument | |
3574 | R15: temporary register for assembler | |
3575 | R16: trampoline register | |
3576 | R28: frame pointer (FP) | |
3577 | R29: global pointer (GP) | |
3578 | R30: link register (LP) | |
3579 | R31: stack pointer (SP) | |
3580 | PC: program counter (PC) | |
3581 | ||
3582 | ==> U-Boot will use R10 to hold a pointer to the global data | |
3583 | ||
d87080b7 WD |
3584 | NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope, |
3585 | or current versions of GCC may "optimize" the code too much. | |
2729af9d | 3586 | |
3fafced7 RC |
3587 | On RISC-V, the following registers are used: |
3588 | ||
3589 | x0: hard-wired zero (zero) | |
3590 | x1: return address (ra) | |
3591 | x2: stack pointer (sp) | |
3592 | x3: global pointer (gp) | |
3593 | x4: thread pointer (tp) | |
3594 | x5: link register (t0) | |
3595 | x8: frame pointer (fp) | |
3596 | x10-x11: arguments/return values (a0-1) | |
3597 | x12-x17: arguments (a2-7) | |
3598 | x28-31: temporaries (t3-6) | |
3599 | pc: program counter (pc) | |
3600 | ||
3601 | ==> U-Boot will use gp to hold a pointer to the global data | |
3602 | ||
2729af9d WD |
3603 | Memory Management: |
3604 | ------------------ | |
3605 | ||
3606 | U-Boot runs in system state and uses physical addresses, i.e. the | |
3607 | MMU is not used either for address mapping nor for memory protection. | |
3608 | ||
3609 | The available memory is mapped to fixed addresses using the memory | |
3610 | controller. In this process, a contiguous block is formed for each | |
3611 | memory type (Flash, SDRAM, SRAM), even when it consists of several | |
3612 | physical memory banks. | |
3613 | ||
3614 | U-Boot is installed in the first 128 kB of the first Flash bank (on | |
3615 | TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After | |
3616 | booting and sizing and initializing DRAM, the code relocates itself | |
3617 | to the upper end of DRAM. Immediately below the U-Boot code some | |
6d0f6bcf | 3618 | memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN |
2729af9d WD |
3619 | configuration setting]. Below that, a structure with global Board |
3620 | Info data is placed, followed by the stack (growing downward). | |
3621 | ||
3622 | Additionally, some exception handler code is copied to the low 8 kB | |
3623 | of DRAM (0x00000000 ... 0x00001FFF). | |
3624 | ||
3625 | So a typical memory configuration with 16 MB of DRAM could look like | |
3626 | this: | |
3627 | ||
3628 | 0x0000 0000 Exception Vector code | |
3629 | : | |
3630 | 0x0000 1FFF | |
3631 | 0x0000 2000 Free for Application Use | |
3632 | : | |
3633 | : | |
3634 | ||
3635 | : | |
3636 | : | |
3637 | 0x00FB FF20 Monitor Stack (Growing downward) | |
3638 | 0x00FB FFAC Board Info Data and permanent copy of global data | |
3639 | 0x00FC 0000 Malloc Arena | |
3640 | : | |
3641 | 0x00FD FFFF | |
3642 | 0x00FE 0000 RAM Copy of Monitor Code | |
3643 | ... eventually: LCD or video framebuffer | |
3644 | ... eventually: pRAM (Protected RAM - unchanged by reset) | |
3645 | 0x00FF FFFF [End of RAM] | |
3646 | ||
3647 | ||
3648 | System Initialization: | |
3649 | ---------------------- | |
c609719b | 3650 | |
2729af9d | 3651 | In the reset configuration, U-Boot starts at the reset entry point |
11ccc33f | 3652 | (on most PowerPC systems at address 0x00000100). Because of the reset |
b445bbb4 | 3653 | configuration for CS0# this is a mirror of the on board Flash memory. |
2729af9d WD |
3654 | To be able to re-map memory U-Boot then jumps to its link address. |
3655 | To be able to implement the initialization code in C, a (small!) | |
3656 | initial stack is set up in the internal Dual Ported RAM (in case CPUs | |
2eb48ff7 HS |
3657 | which provide such a feature like), or in a locked part of the data |
3658 | cache. After that, U-Boot initializes the CPU core, the caches and | |
3659 | the SIU. | |
2729af9d WD |
3660 | |
3661 | Next, all (potentially) available memory banks are mapped using a | |
3662 | preliminary mapping. For example, we put them on 512 MB boundaries | |
3663 | (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash | |
3664 | on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is | |
3665 | programmed for SDRAM access. Using the temporary configuration, a | |
3666 | simple memory test is run that determines the size of the SDRAM | |
3667 | banks. | |
3668 | ||
3669 | When there is more than one SDRAM bank, and the banks are of | |
3670 | different size, the largest is mapped first. For equal size, the first | |
3671 | bank (CS2#) is mapped first. The first mapping is always for address | |
3672 | 0x00000000, with any additional banks following immediately to create | |
3673 | contiguous memory starting from 0. | |
3674 | ||
3675 | Then, the monitor installs itself at the upper end of the SDRAM area | |
3676 | and allocates memory for use by malloc() and for the global Board | |
3677 | Info data; also, the exception vector code is copied to the low RAM | |
3678 | pages, and the final stack is set up. | |
3679 | ||
3680 | Only after this relocation will you have a "normal" C environment; | |
3681 | until that you are restricted in several ways, mostly because you are | |
3682 | running from ROM, and because the code will have to be relocated to a | |
3683 | new address in RAM. | |
3684 | ||
3685 | ||
3686 | U-Boot Porting Guide: | |
3687 | ---------------------- | |
c609719b | 3688 | |
2729af9d WD |
3689 | [Based on messages by Jerry Van Baren in the U-Boot-Users mailing |
3690 | list, October 2002] | |
c609719b WD |
3691 | |
3692 | ||
6c3fef28 | 3693 | int main(int argc, char *argv[]) |
2729af9d WD |
3694 | { |
3695 | sighandler_t no_more_time; | |
c609719b | 3696 | |
6c3fef28 JVB |
3697 | signal(SIGALRM, no_more_time); |
3698 | alarm(PROJECT_DEADLINE - toSec (3 * WEEK)); | |
c609719b | 3699 | |
2729af9d | 3700 | if (available_money > available_manpower) { |
6c3fef28 | 3701 | Pay consultant to port U-Boot; |
c609719b WD |
3702 | return 0; |
3703 | } | |
3704 | ||
2729af9d WD |
3705 | Download latest U-Boot source; |
3706 | ||
0668236b | 3707 | Subscribe to u-boot mailing list; |
2729af9d | 3708 | |
6c3fef28 JVB |
3709 | if (clueless) |
3710 | email("Hi, I am new to U-Boot, how do I get started?"); | |
2729af9d WD |
3711 | |
3712 | while (learning) { | |
3713 | Read the README file in the top level directory; | |
047f6ec0 | 3714 | Read https://www.denx.de/wiki/bin/view/DULG/Manual; |
24bcaec7 | 3715 | Read applicable doc/README.*; |
2729af9d | 3716 | Read the source, Luke; |
6c3fef28 | 3717 | /* find . -name "*.[chS]" | xargs grep -i <keyword> */ |
2729af9d WD |
3718 | } |
3719 | ||
6c3fef28 JVB |
3720 | if (available_money > toLocalCurrency ($2500)) |
3721 | Buy a BDI3000; | |
3722 | else | |
2729af9d | 3723 | Add a lot of aggravation and time; |
2729af9d | 3724 | |
6c3fef28 JVB |
3725 | if (a similar board exists) { /* hopefully... */ |
3726 | cp -a board/<similar> board/<myboard> | |
3727 | cp include/configs/<similar>.h include/configs/<myboard>.h | |
3728 | } else { | |
3729 | Create your own board support subdirectory; | |
3730 | Create your own board include/configs/<myboard>.h file; | |
3731 | } | |
3732 | Edit new board/<myboard> files | |
3733 | Edit new include/configs/<myboard>.h | |
3734 | ||
3735 | while (!accepted) { | |
3736 | while (!running) { | |
3737 | do { | |
3738 | Add / modify source code; | |
3739 | } until (compiles); | |
3740 | Debug; | |
3741 | if (clueless) | |
3742 | email("Hi, I am having problems..."); | |
3743 | } | |
3744 | Send patch file to the U-Boot email list; | |
3745 | if (reasonable critiques) | |
3746 | Incorporate improvements from email list code review; | |
3747 | else | |
3748 | Defend code as written; | |
2729af9d | 3749 | } |
2729af9d WD |
3750 | |
3751 | return 0; | |
3752 | } | |
3753 | ||
3754 | void no_more_time (int sig) | |
3755 | { | |
3756 | hire_a_guru(); | |
3757 | } | |
3758 | ||
c609719b | 3759 | |
2729af9d WD |
3760 | Coding Standards: |
3761 | ----------------- | |
c609719b | 3762 | |
2729af9d | 3763 | All contributions to U-Boot should conform to the Linux kernel |
659208da BS |
3764 | coding style; see the kernel coding style guide at |
3765 | https://www.kernel.org/doc/html/latest/process/coding-style.html, and the | |
3766 | script "scripts/Lindent" in your Linux kernel source directory. | |
2c051651 DZ |
3767 | |
3768 | Source files originating from a different project (for example the | |
3769 | MTD subsystem) are generally exempt from these guidelines and are not | |
b445bbb4 | 3770 | reformatted to ease subsequent migration to newer versions of those |
2c051651 DZ |
3771 | sources. |
3772 | ||
3773 | Please note that U-Boot is implemented in C (and to some small parts in | |
3774 | Assembler); no C++ is used, so please do not use C++ style comments (//) | |
3775 | in your code. | |
c609719b | 3776 | |
2729af9d WD |
3777 | Please also stick to the following formatting rules: |
3778 | - remove any trailing white space | |
7ca9296e | 3779 | - use TAB characters for indentation and vertical alignment, not spaces |
2729af9d | 3780 | - make sure NOT to use DOS '\r\n' line feeds |
7ca9296e | 3781 | - do not add more than 2 consecutive empty lines to source files |
2729af9d | 3782 | - do not add trailing empty lines to source files |
180d3f74 | 3783 | |
2729af9d WD |
3784 | Submissions which do not conform to the standards may be returned |
3785 | with a request to reformat the changes. | |
c609719b WD |
3786 | |
3787 | ||
2729af9d WD |
3788 | Submitting Patches: |
3789 | ------------------- | |
c609719b | 3790 | |
2729af9d WD |
3791 | Since the number of patches for U-Boot is growing, we need to |
3792 | establish some rules. Submissions which do not conform to these rules | |
3793 | may be rejected, even when they contain important and valuable stuff. | |
c609719b | 3794 | |
047f6ec0 | 3795 | Please see https://www.denx.de/wiki/U-Boot/Patches for details. |
218ca724 | 3796 | |
0668236b | 3797 | Patches shall be sent to the u-boot mailing list <[email protected]>; |
1dade18e | 3798 | see https://lists.denx.de/listinfo/u-boot |
0668236b | 3799 | |
2729af9d WD |
3800 | When you send a patch, please include the following information with |
3801 | it: | |
c609719b | 3802 | |
2729af9d WD |
3803 | * For bug fixes: a description of the bug and how your patch fixes |
3804 | this bug. Please try to include a way of demonstrating that the | |
3805 | patch actually fixes something. | |
c609719b | 3806 | |
2729af9d WD |
3807 | * For new features: a description of the feature and your |
3808 | implementation. | |
c609719b | 3809 | |
7207b366 RD |
3810 | * For major contributions, add a MAINTAINERS file with your |
3811 | information and associated file and directory references. | |
c609719b | 3812 | |
27af930e AA |
3813 | * When you add support for a new board, don't forget to add a |
3814 | maintainer e-mail address to the boards.cfg file, too. | |
c609719b | 3815 | |
2729af9d WD |
3816 | * If your patch adds new configuration options, don't forget to |
3817 | document these in the README file. | |
c609719b | 3818 | |
218ca724 WD |
3819 | * The patch itself. If you are using git (which is *strongly* |
3820 | recommended) you can easily generate the patch using the | |
7ca9296e | 3821 | "git format-patch". If you then use "git send-email" to send it to |
218ca724 WD |
3822 | the U-Boot mailing list, you will avoid most of the common problems |
3823 | with some other mail clients. | |
3824 | ||
3825 | If you cannot use git, use "diff -purN OLD NEW". If your version of | |
3826 | diff does not support these options, then get the latest version of | |
3827 | GNU diff. | |
c609719b | 3828 | |
218ca724 WD |
3829 | The current directory when running this command shall be the parent |
3830 | directory of the U-Boot source tree (i. e. please make sure that | |
3831 | your patch includes sufficient directory information for the | |
3832 | affected files). | |
6dff5529 | 3833 | |
218ca724 WD |
3834 | We prefer patches as plain text. MIME attachments are discouraged, |
3835 | and compressed attachments must not be used. | |
c609719b | 3836 | |
2729af9d WD |
3837 | * If one logical set of modifications affects or creates several |
3838 | files, all these changes shall be submitted in a SINGLE patch file. | |
52f52c14 | 3839 | |
2729af9d WD |
3840 | * Changesets that contain different, unrelated modifications shall be |
3841 | submitted as SEPARATE patches, one patch per changeset. | |
8bde7f77 | 3842 | |
52f52c14 | 3843 | |
2729af9d | 3844 | Notes: |
c609719b | 3845 | |
6de80f21 | 3846 | * Before sending the patch, run the buildman script on your patched |
2729af9d WD |
3847 | source tree and make sure that no errors or warnings are reported |
3848 | for any of the boards. | |
c609719b | 3849 | |
2729af9d WD |
3850 | * Keep your modifications to the necessary minimum: A patch |
3851 | containing several unrelated changes or arbitrary reformats will be | |
3852 | returned with a request to re-formatting / split it. | |
c609719b | 3853 | |
2729af9d WD |
3854 | * If you modify existing code, make sure that your new code does not |
3855 | add to the memory footprint of the code ;-) Small is beautiful! | |
3856 | When adding new features, these should compile conditionally only | |
3857 | (using #ifdef), and the resulting code with the new feature | |
3858 | disabled must not need more memory than the old code without your | |
3859 | modification. | |
90dc6704 | 3860 | |
0668236b WD |
3861 | * Remember that there is a size limit of 100 kB per message on the |
3862 | u-boot mailing list. Bigger patches will be moderated. If they are | |
3863 | reasonable and not too big, they will be acknowledged. But patches | |
3864 | bigger than the size limit should be avoided. |