]> Git Repo - J-u-boot.git/blame - cmd/mmc.c
Merge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"
[J-u-boot.git] / cmd / mmc.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
71f95118
WD
2/*
3 * (C) Copyright 2003
4 * Kyle Harris, [email protected]
71f95118
WD
5 */
6
e6f6f9e6 7#include <blk.h>
71f95118 8#include <command.h>
24b852a7 9#include <console.h>
4e4bf944 10#include <display_options.h>
cc6a1b69 11#include <mapmem.h>
d581076a 12#include <memalign.h>
71f95118 13#include <mmc.h>
e6f6f9e6 14#include <part.h>
732bc7ce
JB
15#include <sparse_format.h>
16#include <image-sparse.h>
03de305e 17#include <vsprintf.h>
150481e5 18#include <linux/ctype.h>
71f95118 19
02e22c2d 20static int curr_device = -1;
272cc70b
AF
21
22static void print_mmcinfo(struct mmc *mmc)
23{
c5f0d3f1
DSC
24 int i;
25
93bfd616 26 printf("Device: %s\n", mmc->cfg->name);
272cc70b 27 printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24);
84191f73
MM
28 if (IS_SD(mmc)) {
29 printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xffff);
30 printf("Name: %c%c%c%c%c \n", mmc->cid[0] & 0xff,
31 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
32 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
33 } else {
34 printf("OEM: %x\n", (mmc->cid[0] >> 8) & 0xff);
35 printf("Name: %c%c%c%c%c%c \n", mmc->cid[0] & 0xff,
36 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
37 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
38 (mmc->cid[2] >> 24));
39 }
272cc70b 40
7a96ec74 41 printf("Bus Speed: %d\n", mmc->clock);
52d241df 42#if CONFIG_IS_ENABLED(MMC_VERBOSE)
41e30dcf 43 printf("Mode: %s\n", mmc_mode_name(mmc->selected_mode));
52d241df
JJH
44 mmc_dump_capabilities("card capabilities", mmc->card_caps);
45 mmc_dump_capabilities("host capabilities", mmc->host_caps);
46#endif
272cc70b
AF
47 printf("Rd Block Len: %d\n", mmc->read_bl_len);
48
4b7cee53
PA
49 printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC",
50 EXTRACT_SDMMC_MAJOR_VERSION(mmc->version),
51 EXTRACT_SDMMC_MINOR_VERSION(mmc->version));
52 if (EXTRACT_SDMMC_CHANGE_VERSION(mmc->version) != 0)
53 printf(".%d", EXTRACT_SDMMC_CHANGE_VERSION(mmc->version));
54 printf("\n");
272cc70b
AF
55
56 printf("High Capacity: %s\n", mmc->high_capacity ? "Yes" : "No");
940e0782
MK
57 puts("Capacity: ");
58 print_size(mmc->capacity, "\n");
272cc70b 59
786e8f81
AG
60 printf("Bus Width: %d-bit%s\n", mmc->bus_width,
61 mmc->ddr_mode ? " DDR" : "");
c5f0d3f1 62
e6fa5a54 63#if CONFIG_IS_ENABLED(MMC_WRITE)
b0361526
DSC
64 puts("Erase Group Size: ");
65 print_size(((u64)mmc->erase_grp_size) << 9, "\n");
e6fa5a54 66#endif
b0361526 67
525ada21 68 if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) {
c3dbb4f9 69 bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0;
beb98a14 70 bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR);
d581076a
MV
71 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
72 u8 wp;
d5210e45 73 int ret;
b0361526 74
b7a6e2c9 75#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
b0361526
DSC
76 puts("HC WP Group Size: ");
77 print_size(((u64)mmc->hc_wp_grp_size) << 9, "\n");
b7a6e2c9 78#endif
b0361526 79
c5f0d3f1 80 puts("User Capacity: ");
9e41a00b
DSC
81 print_size(mmc->capacity_user, usr_enh ? " ENH" : "");
82 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_USR)
83 puts(" WRREL\n");
84 else
85 putc('\n');
beb98a14
DSC
86 if (usr_enh) {
87 puts("User Enhanced Start: ");
88 print_size(mmc->enh_user_start, "\n");
89 puts("User Enhanced Size: ");
90 print_size(mmc->enh_user_size, "\n");
91 }
c5f0d3f1 92 puts("Boot Capacity: ");
c3dbb4f9 93 print_size(mmc->capacity_boot, has_enh ? " ENH\n" : "\n");
c5f0d3f1 94 puts("RPMB Capacity: ");
c3dbb4f9 95 print_size(mmc->capacity_rpmb, has_enh ? " ENH\n" : "\n");
b0361526 96
c5f0d3f1 97 for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) {
c3dbb4f9
DSC
98 bool is_enh = has_enh &&
99 (mmc->part_attr & EXT_CSD_ENH_GP(i));
c5f0d3f1 100 if (mmc->capacity_gp[i]) {
f289fd73 101 printf("GP%i Capacity: ", i+1);
c3dbb4f9 102 print_size(mmc->capacity_gp[i],
9e41a00b
DSC
103 is_enh ? " ENH" : "");
104 if (mmc->wr_rel_set & EXT_CSD_WR_DATA_REL_GP(i))
105 puts(" WRREL\n");
106 else
107 putc('\n');
c5f0d3f1
DSC
108 }
109 }
d5210e45
HS
110 ret = mmc_send_ext_csd(mmc, ext_csd);
111 if (ret)
112 return;
113 wp = ext_csd[EXT_CSD_BOOT_WP_STATUS];
114 for (i = 0; i < 2; ++i) {
115 printf("Boot area %d is ", i);
116 switch (wp & 3) {
117 case 0:
118 printf("not write protected\n");
119 break;
120 case 1:
121 printf("power on protected\n");
122 break;
123 case 2:
124 printf("permanently protected\n");
125 break;
126 default:
127 printf("in reserved protection state\n");
128 break;
129 }
130 wp >>= 2;
131 }
c5f0d3f1 132 }
272cc70b 133}
19f7a34a
AG
134
135static struct mmc *__init_mmc_device(int dev, bool force_init,
136 enum bus_mode speed_mode)
1fd93c6e
PA
137{
138 struct mmc *mmc;
139 mmc = find_mmc_device(dev);
140 if (!mmc) {
141 printf("no mmc device at slot %x\n", dev);
142 return NULL;
143 }
bcfde7ff 144
d2a08369
MV
145 if (!mmc_getcd(mmc))
146 force_init = true;
147
1ae24a50
SW
148 if (force_init)
149 mmc->has_init = 0;
19f7a34a
AG
150
151 if (IS_ENABLED(CONFIG_MMC_SPEED_MODE_SET))
152 mmc->user_speed_mode = speed_mode;
153
1fd93c6e
PA
154 if (mmc_init(mmc))
155 return NULL;
1d044d32
MV
156
157#ifdef CONFIG_BLOCK_CACHE
158 struct blk_desc *bd = mmc_get_blk_desc(mmc);
8149b150 159 blkcache_invalidate(bd->uclass_id, bd->devnum);
1d044d32
MV
160#endif
161
1fd93c6e
PA
162 return mmc;
163}
09140113 164
19f7a34a
AG
165static struct mmc *init_mmc_device(int dev, bool force_init)
166{
167 return __init_mmc_device(dev, force_init, MMC_MODES_END);
168}
169
09140113
SG
170static int do_mmcinfo(struct cmd_tbl *cmdtp, int flag, int argc,
171 char *const argv[])
272cc70b
AF
172{
173 struct mmc *mmc;
272cc70b 174
ea6ebe21
LW
175 if (curr_device < 0) {
176 if (get_mmc_num() > 0)
177 curr_device = 0;
178 else {
179 puts("No MMC device available\n");
fbf368f1 180 return CMD_RET_FAILURE;
ea6ebe21
LW
181 }
182 }
272cc70b 183
1ae24a50 184 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
185 if (!mmc)
186 return CMD_RET_FAILURE;
272cc70b 187
1fd93c6e
PA
188 print_mmcinfo(mmc);
189 return CMD_RET_SUCCESS;
190}
272cc70b 191
5a7b11e6 192#if CONFIG_IS_ENABLED(CMD_MMC_RPMB)
1fd93c6e
PA
193static int confirm_key_prog(void)
194{
195 puts("Warning: Programming authentication key can be done only once !\n"
196 " Use this command only if you are sure of what you are doing,\n"
197 "Really perform the key programming? <y/N> ");
198 if (confirm_yesno())
ea6ebe21 199 return 1;
1fd93c6e
PA
200
201 puts("Authentication key programming aborted\n");
202 return 0;
203}
09140113
SG
204
205static int do_mmcrpmb_key(struct cmd_tbl *cmdtp, int flag,
206 int argc, char *const argv[])
1fd93c6e
PA
207{
208 void *key_addr;
209 struct mmc *mmc = find_mmc_device(curr_device);
210
211 if (argc != 2)
212 return CMD_RET_USAGE;
213
7e5f460e 214 key_addr = (void *)hextoul(argv[1], NULL);
1fd93c6e
PA
215 if (!confirm_key_prog())
216 return CMD_RET_FAILURE;
217 if (mmc_rpmb_set_key(mmc, key_addr)) {
218 printf("ERROR - Key already programmed ?\n");
219 return CMD_RET_FAILURE;
272cc70b 220 }
1fd93c6e 221 return CMD_RET_SUCCESS;
272cc70b 222}
09140113
SG
223
224static int do_mmcrpmb_read(struct cmd_tbl *cmdtp, int flag,
225 int argc, char *const argv[])
1fd93c6e
PA
226{
227 u16 blk, cnt;
228 void *addr;
229 int n;
230 void *key_addr = NULL;
231 struct mmc *mmc = find_mmc_device(curr_device);
272cc70b 232
1fd93c6e
PA
233 if (argc < 4)
234 return CMD_RET_USAGE;
272cc70b 235
7e5f460e
SG
236 addr = (void *)hextoul(argv[1], NULL);
237 blk = hextoul(argv[2], NULL);
238 cnt = hextoul(argv[3], NULL);
1fd93c6e
PA
239
240 if (argc == 5)
7e5f460e 241 key_addr = (void *)hextoul(argv[4], NULL);
1fd93c6e 242
eccd4ca3 243 printf("MMC RPMB read: dev # %d, block # %d, count %d ... ",
1fd93c6e
PA
244 curr_device, blk, cnt);
245 n = mmc_rpmb_read(mmc, addr, blk, cnt, key_addr);
246
247 printf("%d RPMB blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
248 if (n != cnt)
249 return CMD_RET_FAILURE;
250 return CMD_RET_SUCCESS;
251}
09140113
SG
252
253static int do_mmcrpmb_write(struct cmd_tbl *cmdtp, int flag,
254 int argc, char *const argv[])
272cc70b 255{
1fd93c6e
PA
256 u16 blk, cnt;
257 void *addr;
258 int n;
259 void *key_addr;
260 struct mmc *mmc = find_mmc_device(curr_device);
6be95ccf 261
1fd93c6e 262 if (argc != 5)
4c12eeb8 263 return CMD_RET_USAGE;
272cc70b 264
7e5f460e
SG
265 addr = (void *)hextoul(argv[1], NULL);
266 blk = hextoul(argv[2], NULL);
267 cnt = hextoul(argv[3], NULL);
268 key_addr = (void *)hextoul(argv[4], NULL);
1fd93c6e 269
eccd4ca3 270 printf("MMC RPMB write: dev # %d, block # %d, count %d ... ",
1fd93c6e
PA
271 curr_device, blk, cnt);
272 n = mmc_rpmb_write(mmc, addr, blk, cnt, key_addr);
273
274 printf("%d RPMB blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR");
275 if (n != cnt)
276 return CMD_RET_FAILURE;
277 return CMD_RET_SUCCESS;
278}
09140113
SG
279
280static int do_mmcrpmb_counter(struct cmd_tbl *cmdtp, int flag,
281 int argc, char *const argv[])
1fd93c6e
PA
282{
283 unsigned long counter;
284 struct mmc *mmc = find_mmc_device(curr_device);
285
286 if (mmc_rpmb_get_counter(mmc, &counter))
287 return CMD_RET_FAILURE;
288 printf("RPMB Write counter= %lx\n", counter);
289 return CMD_RET_SUCCESS;
290}
291
09140113 292static struct cmd_tbl cmd_rpmb[] = {
1fd93c6e
PA
293 U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""),
294 U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""),
295 U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""),
296 U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""),
297};
298
09140113
SG
299static int do_mmcrpmb(struct cmd_tbl *cmdtp, int flag,
300 int argc, char *const argv[])
1fd93c6e 301{
09140113 302 struct cmd_tbl *cp;
1fd93c6e
PA
303 struct mmc *mmc;
304 char original_part;
305 int ret;
306
307 cp = find_cmd_tbl(argv[1], cmd_rpmb, ARRAY_SIZE(cmd_rpmb));
308
309 /* Drop the rpmb subcommand */
310 argc--;
311 argv++;
312
313 if (cp == NULL || argc > cp->maxargs)
314 return CMD_RET_USAGE;
80a48dd4 315 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp))
1fd93c6e
PA
316 return CMD_RET_SUCCESS;
317
1ae24a50 318 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
319 if (!mmc)
320 return CMD_RET_FAILURE;
321
322 if (!(mmc->version & MMC_VERSION_MMC)) {
71a3e5c5 323 printf("It is not an eMMC device\n");
1fd93c6e
PA
324 return CMD_RET_FAILURE;
325 }
326 if (mmc->version < MMC_VERSION_4_41) {
327 printf("RPMB not supported before version 4.41\n");
328 return CMD_RET_FAILURE;
ea6ebe21 329 }
1fd93c6e 330 /* Switch to the RPMB partition */
4dc80c87 331#ifndef CONFIG_BLK
b955e42b 332 original_part = mmc->block_dev.hwpart;
4dc80c87
KY
333#else
334 original_part = mmc_get_blk_desc(mmc)->hwpart;
335#endif
e33a5c6b 336 if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, MMC_PART_RPMB) !=
69f45cd5 337 0)
873cc1d7 338 return CMD_RET_FAILURE;
1fd93c6e 339 ret = cp->cmd(cmdtp, flag, argc, argv);
272cc70b 340
1fd93c6e 341 /* Return to original partition */
e33a5c6b 342 if (blk_select_hwpart_devnum(UCLASS_MMC, curr_device, original_part) !=
69f45cd5 343 0)
873cc1d7 344 return CMD_RET_FAILURE;
1fd93c6e
PA
345 return ret;
346}
347#endif
9fd38372 348
09140113
SG
349static int do_mmc_read(struct cmd_tbl *cmdtp, int flag,
350 int argc, char *const argv[])
1fd93c6e
PA
351{
352 struct mmc *mmc;
353 u32 blk, cnt, n;
cc6a1b69 354 void *ptr;
e85649c7 355
1fd93c6e
PA
356 if (argc != 4)
357 return CMD_RET_USAGE;
ea6ebe21 358
cc6a1b69 359 ptr = map_sysmem(hextoul(argv[1], NULL), 0);
7e5f460e
SG
360 blk = hextoul(argv[2], NULL);
361 cnt = hextoul(argv[3], NULL);
272cc70b 362
1ae24a50 363 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
364 if (!mmc)
365 return CMD_RET_FAILURE;
ea6ebe21 366
eccd4ca3 367 printf("MMC read: dev # %d, block # %d, count %d ... ",
1fd93c6e 368 curr_device, blk, cnt);
9fd38372 369
cc6a1b69 370 n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ptr);
1fd93c6e 371 printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
cc6a1b69 372 unmap_sysmem(ptr);
8f3b9642 373
1fd93c6e
PA
374 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
375}
e6fa5a54 376
c232d14d 377#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE)
732bc7ce
JB
378static lbaint_t mmc_sparse_write(struct sparse_storage *info, lbaint_t blk,
379 lbaint_t blkcnt, const void *buffer)
380{
381 struct blk_desc *dev_desc = info->priv;
382
383 return blk_dwrite(dev_desc, blk, blkcnt, buffer);
384}
385
386static lbaint_t mmc_sparse_reserve(struct sparse_storage *info,
387 lbaint_t blk, lbaint_t blkcnt)
388{
389 return blkcnt;
390}
391
09140113
SG
392static int do_mmc_sparse_write(struct cmd_tbl *cmdtp, int flag,
393 int argc, char *const argv[])
732bc7ce
JB
394{
395 struct sparse_storage sparse;
396 struct blk_desc *dev_desc;
397 struct mmc *mmc;
398 char dest[11];
399 void *addr;
400 u32 blk;
401
402 if (argc != 3)
403 return CMD_RET_USAGE;
404
7e5f460e
SG
405 addr = (void *)hextoul(argv[1], NULL);
406 blk = hextoul(argv[2], NULL);
732bc7ce
JB
407
408 if (!is_sparse_image(addr)) {
409 printf("Not a sparse image\n");
410 return CMD_RET_FAILURE;
411 }
412
413 mmc = init_mmc_device(curr_device, false);
414 if (!mmc)
415 return CMD_RET_FAILURE;
416
eccd4ca3 417 printf("MMC Sparse write: dev # %d, block # %d ... ",
732bc7ce
JB
418 curr_device, blk);
419
420 if (mmc_getwp(mmc) == 1) {
421 printf("Error: card is write protected!\n");
422 return CMD_RET_FAILURE;
423 }
424
425 dev_desc = mmc_get_blk_desc(mmc);
426 sparse.priv = dev_desc;
427 sparse.blksz = 512;
428 sparse.start = blk;
429 sparse.size = dev_desc->lba - blk;
430 sparse.write = mmc_sparse_write;
431 sparse.reserve = mmc_sparse_reserve;
432 sparse.mssg = NULL;
433 sprintf(dest, "0x" LBAF, sparse.start * sparse.blksz);
434
c4ded03e 435 if (write_sparse_image(&sparse, dest, addr, NULL))
732bc7ce
JB
436 return CMD_RET_FAILURE;
437 else
438 return CMD_RET_SUCCESS;
439}
440#endif
441
c232d14d 442#if CONFIG_IS_ENABLED(MMC_WRITE)
09140113
SG
443static int do_mmc_write(struct cmd_tbl *cmdtp, int flag,
444 int argc, char *const argv[])
1fd93c6e
PA
445{
446 struct mmc *mmc;
447 u32 blk, cnt, n;
cc6a1b69 448 void *ptr;
8f3b9642 449
1fd93c6e
PA
450 if (argc != 4)
451 return CMD_RET_USAGE;
272cc70b 452
cc6a1b69 453 ptr = map_sysmem(hextoul(argv[1], NULL), 0);
7e5f460e
SG
454 blk = hextoul(argv[2], NULL);
455 cnt = hextoul(argv[3], NULL);
bc897b1d 456
1ae24a50 457 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
458 if (!mmc)
459 return CMD_RET_FAILURE;
bc897b1d 460
eccd4ca3 461 printf("MMC write: dev # %d, block # %d, count %d ... ",
1fd93c6e 462 curr_device, blk, cnt);
272cc70b 463
1fd93c6e
PA
464 if (mmc_getwp(mmc) == 1) {
465 printf("Error: card is write protected!\n");
466 return CMD_RET_FAILURE;
467 }
cc6a1b69 468 n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, ptr);
1fd93c6e 469 printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR");
cc6a1b69 470 unmap_sysmem(ptr);
792970b0 471
1fd93c6e
PA
472 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
473}
09140113
SG
474
475static int do_mmc_erase(struct cmd_tbl *cmdtp, int flag,
476 int argc, char *const argv[])
1fd93c6e
PA
477{
478 struct mmc *mmc;
6c0943ff 479 struct disk_partition info;
1fd93c6e 480 u32 blk, cnt, n;
2a91c913 481
6c0943ff 482 if (argc < 2 || argc > 3)
1fd93c6e 483 return CMD_RET_USAGE;
792970b0 484
1ae24a50 485 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
486 if (!mmc)
487 return CMD_RET_FAILURE;
5a99b9de 488
6c0943ff
TP
489 if (argc == 3) {
490 blk = hextoul(argv[1], NULL);
491 cnt = hextoul(argv[2], NULL);
492 } else if (part_get_info_by_name(mmc_get_blk_desc(mmc), argv[1], &info) >= 0) {
493 blk = info.start;
494 cnt = info.size;
495 } else {
496 return CMD_RET_FAILURE;
497 }
498
eccd4ca3 499 printf("MMC erase: dev # %d, block # %d, count %d ... ",
1fd93c6e 500 curr_device, blk, cnt);
5a99b9de 501
1fd93c6e
PA
502 if (mmc_getwp(mmc) == 1) {
503 printf("Error: card is write protected!\n");
504 return CMD_RET_FAILURE;
505 }
c40fdca6 506 n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt);
1fd93c6e 507 printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR");
b01e6fe6 508
1fd93c6e
PA
509 return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
510}
e6fa5a54
JJH
511#endif
512
09140113
SG
513static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag,
514 int argc, char *const argv[])
1fd93c6e
PA
515{
516 struct mmc *mmc;
19f7a34a
AG
517
518 if (argc == 1) {
519 mmc = init_mmc_device(curr_device, true);
520 } else if (argc == 2) {
27434703
HS
521 enum bus_mode speed_mode;
522
19f7a34a
AG
523 speed_mode = (int)dectoul(argv[1], NULL);
524 mmc = __init_mmc_device(curr_device, true, speed_mode);
525 } else {
526 return CMD_RET_USAGE;
527 }
2a91c913 528
941944e4 529 if (!mmc)
1fd93c6e 530 return CMD_RET_FAILURE;
2a91c913 531
1fd93c6e
PA
532 return CMD_RET_SUCCESS;
533}
09140113
SG
534
535static int do_mmc_part(struct cmd_tbl *cmdtp, int flag,
536 int argc, char *const argv[])
1fd93c6e 537{
4101f687 538 struct blk_desc *mmc_dev;
1fd93c6e
PA
539 struct mmc *mmc;
540
1ae24a50 541 mmc = init_mmc_device(curr_device, false);
1fd93c6e
PA
542 if (!mmc)
543 return CMD_RET_FAILURE;
544
8149b150 545 mmc_dev = blk_get_devnum_by_uclass_id(UCLASS_MMC, curr_device);
1fd93c6e 546 if (mmc_dev != NULL && mmc_dev->type != DEV_TYPE_UNKNOWN) {
3e8bd469 547 part_print(mmc_dev);
1fd93c6e
PA
548 return CMD_RET_SUCCESS;
549 }
550
551 puts("get mmc type error!\n");
552 return CMD_RET_FAILURE;
553}
09140113
SG
554
555static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag,
556 int argc, char *const argv[])
1fd93c6e 557{
60dc58f7 558 int dev, part = 0, ret;
1fd93c6e
PA
559 struct mmc *mmc;
560
561 if (argc == 1) {
562 dev = curr_device;
19f7a34a 563 mmc = init_mmc_device(dev, true);
1fd93c6e 564 } else if (argc == 2) {
19f7a34a
AG
565 dev = (int)dectoul(argv[1], NULL);
566 mmc = init_mmc_device(dev, true);
1fd93c6e 567 } else if (argc == 3) {
0b1284eb
SG
568 dev = (int)dectoul(argv[1], NULL);
569 part = (int)dectoul(argv[2], NULL);
1fd93c6e
PA
570 if (part > PART_ACCESS_MASK) {
571 printf("#part_num shouldn't be larger than %d\n",
572 PART_ACCESS_MASK);
573 return CMD_RET_FAILURE;
33ace362 574 }
19f7a34a
AG
575 mmc = init_mmc_device(dev, true);
576 } else if (argc == 4) {
27434703
HS
577 enum bus_mode speed_mode;
578
19f7a34a
AG
579 dev = (int)dectoul(argv[1], NULL);
580 part = (int)dectoul(argv[2], NULL);
581 if (part > PART_ACCESS_MASK) {
582 printf("#part_num shouldn't be larger than %d\n",
583 PART_ACCESS_MASK);
584 return CMD_RET_FAILURE;
585 }
586 speed_mode = (int)dectoul(argv[3], NULL);
587 mmc = __init_mmc_device(dev, true, speed_mode);
1fd93c6e
PA
588 } else {
589 return CMD_RET_USAGE;
590 }
33ace362 591
1fd93c6e
PA
592 if (!mmc)
593 return CMD_RET_FAILURE;
594
e33a5c6b 595 ret = blk_select_hwpart_devnum(UCLASS_MMC, dev, part);
60dc58f7
SW
596 printf("switch to partitions #%d, %s\n",
597 part, (!ret) ? "OK" : "ERROR");
598 if (ret)
599 return 1;
600
1fd93c6e
PA
601 curr_device = dev;
602 if (mmc->part_config == MMCPART_NOAVAILABLE)
603 printf("mmc%d is current device\n", curr_device);
604 else
605 printf("mmc%d(part %d) is current device\n",
c40fdca6 606 curr_device, mmc_get_blk_desc(mmc)->hwpart);
33ace362 607
1fd93c6e
PA
608 return CMD_RET_SUCCESS;
609}
09140113
SG
610
611static int do_mmc_list(struct cmd_tbl *cmdtp, int flag,
612 int argc, char *const argv[])
1fd93c6e
PA
613{
614 print_mmc_devices('\n');
615 return CMD_RET_SUCCESS;
616}
c599f53b 617
cf17789e 618#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
f702dc1e
MV
619static void parse_hwpart_user_enh_size(struct mmc *mmc,
620 struct mmc_hwpart_conf *pconf,
621 char *argv)
622{
1d4b3b2f 623 int i, ret;
f702dc1e
MV
624
625 pconf->user.enh_size = 0;
626
627 if (!strcmp(argv, "-")) { /* The rest of eMMC */
628 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
629 ret = mmc_send_ext_csd(mmc, ext_csd);
630 if (ret)
631 return;
1d4b3b2f 632 /* The enh_size value is in 512B block units */
f702dc1e
MV
633 pconf->user.enh_size =
634 ((ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 2] << 16) +
635 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT + 1] << 8) +
636 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]) * 1024 *
637 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
638 ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
639 pconf->user.enh_size -= pconf->user.enh_start;
1d4b3b2f
MV
640 for (i = 0; i < ARRAY_SIZE(mmc->capacity_gp); i++) {
641 /*
642 * If the eMMC already has GP partitions set,
643 * subtract their size from the maximum USER
644 * partition size.
645 *
646 * Else, if the command was used to configure new
647 * GP partitions, subtract their size from maximum
648 * USER partition size.
649 */
650 if (mmc->capacity_gp[i]) {
651 /* The capacity_gp is in 1B units */
652 pconf->user.enh_size -= mmc->capacity_gp[i] >> 9;
653 } else if (pconf->gp_part[i].size) {
654 /* The gp_part[].size is in 512B units */
655 pconf->user.enh_size -= pconf->gp_part[i].size;
656 }
657 }
f702dc1e
MV
658 } else {
659 pconf->user.enh_size = dectoul(argv, NULL);
660 }
661}
662
663static int parse_hwpart_user(struct mmc *mmc, struct mmc_hwpart_conf *pconf,
09140113 664 int argc, char *const argv[])
189f963a
DSC
665{
666 int i = 0;
667
668 memset(&pconf->user, 0, sizeof(pconf->user));
669
670 while (i < argc) {
671 if (!strcmp(argv[i], "enh")) {
672 if (i + 2 >= argc)
673 return -1;
674 pconf->user.enh_start =
0b1284eb 675 dectoul(argv[i + 1], NULL);
f702dc1e 676 parse_hwpart_user_enh_size(mmc, pconf, argv[i + 2]);
189f963a
DSC
677 i += 3;
678 } else if (!strcmp(argv[i], "wrrel")) {
679 if (i + 1 >= argc)
680 return -1;
681 pconf->user.wr_rel_change = 1;
682 if (!strcmp(argv[i+1], "on"))
683 pconf->user.wr_rel_set = 1;
684 else if (!strcmp(argv[i+1], "off"))
685 pconf->user.wr_rel_set = 0;
686 else
687 return -1;
688 i += 2;
689 } else {
690 break;
691 }
692 }
693 return i;
694}
695
696static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx,
09140113 697 int argc, char *const argv[])
189f963a
DSC
698{
699 int i;
700
701 memset(&pconf->gp_part[pidx], 0, sizeof(pconf->gp_part[pidx]));
702
703 if (1 >= argc)
704 return -1;
0b1284eb 705 pconf->gp_part[pidx].size = dectoul(argv[0], NULL);
189f963a
DSC
706
707 i = 1;
708 while (i < argc) {
709 if (!strcmp(argv[i], "enh")) {
710 pconf->gp_part[pidx].enhanced = 1;
711 i += 1;
712 } else if (!strcmp(argv[i], "wrrel")) {
713 if (i + 1 >= argc)
714 return -1;
715 pconf->gp_part[pidx].wr_rel_change = 1;
716 if (!strcmp(argv[i+1], "on"))
717 pconf->gp_part[pidx].wr_rel_set = 1;
718 else if (!strcmp(argv[i+1], "off"))
719 pconf->gp_part[pidx].wr_rel_set = 0;
720 else
721 return -1;
722 i += 2;
723 } else {
724 break;
725 }
726 }
727 return i;
728}
729
09140113
SG
730static int do_mmc_hwpartition(struct cmd_tbl *cmdtp, int flag,
731 int argc, char *const argv[])
c599f53b
DSC
732{
733 struct mmc *mmc;
734 struct mmc_hwpart_conf pconf = { };
735 enum mmc_hwpart_conf_mode mode = MMC_HWPART_CONF_CHECK;
189f963a 736 int i, r, pidx;
c599f53b
DSC
737
738 mmc = init_mmc_device(curr_device, false);
739 if (!mmc)
740 return CMD_RET_FAILURE;
741
0d453c84
JC
742 if (IS_SD(mmc)) {
743 puts("SD doesn't support partitioning\n");
744 return CMD_RET_FAILURE;
745 }
746
c599f53b
DSC
747 if (argc < 1)
748 return CMD_RET_USAGE;
749 i = 1;
750 while (i < argc) {
189f963a
DSC
751 if (!strcmp(argv[i], "user")) {
752 i++;
f702dc1e 753 r = parse_hwpart_user(mmc, &pconf, argc - i, &argv[i]);
189f963a 754 if (r < 0)
c599f53b 755 return CMD_RET_USAGE;
189f963a 756 i += r;
c599f53b
DSC
757 } else if (!strncmp(argv[i], "gp", 2) &&
758 strlen(argv[i]) == 3 &&
759 argv[i][2] >= '1' && argv[i][2] <= '4') {
c599f53b 760 pidx = argv[i][2] - '1';
189f963a
DSC
761 i++;
762 r = parse_hwpart_gp(&pconf, pidx, argc-i, &argv[i]);
763 if (r < 0)
764 return CMD_RET_USAGE;
765 i += r;
c599f53b
DSC
766 } else if (!strcmp(argv[i], "check")) {
767 mode = MMC_HWPART_CONF_CHECK;
768 i++;
769 } else if (!strcmp(argv[i], "set")) {
770 mode = MMC_HWPART_CONF_SET;
771 i++;
772 } else if (!strcmp(argv[i], "complete")) {
773 mode = MMC_HWPART_CONF_COMPLETE;
774 i++;
775 } else {
776 return CMD_RET_USAGE;
777 }
778 }
779
780 puts("Partition configuration:\n");
781 if (pconf.user.enh_size) {
782 puts("\tUser Enhanced Start: ");
783 print_size(((u64)pconf.user.enh_start) << 9, "\n");
784 puts("\tUser Enhanced Size: ");
785 print_size(((u64)pconf.user.enh_size) << 9, "\n");
786 } else {
787 puts("\tNo enhanced user data area\n");
788 }
189f963a
DSC
789 if (pconf.user.wr_rel_change)
790 printf("\tUser partition write reliability: %s\n",
791 pconf.user.wr_rel_set ? "on" : "off");
c599f53b
DSC
792 for (pidx = 0; pidx < 4; pidx++) {
793 if (pconf.gp_part[pidx].size) {
794 printf("\tGP%i Capacity: ", pidx+1);
795 print_size(((u64)pconf.gp_part[pidx].size) << 9,
796 pconf.gp_part[pidx].enhanced ?
797 " ENH\n" : "\n");
798 } else {
799 printf("\tNo GP%i partition\n", pidx+1);
800 }
189f963a
DSC
801 if (pconf.gp_part[pidx].wr_rel_change)
802 printf("\tGP%i write reliability: %s\n", pidx+1,
803 pconf.gp_part[pidx].wr_rel_set ? "on" : "off");
c599f53b
DSC
804 }
805
806 if (!mmc_hwpart_config(mmc, &pconf, mode)) {
807 if (mode == MMC_HWPART_CONF_COMPLETE)
808 puts("Partitioning successful, "
809 "power-cycle to make effective\n");
810 return CMD_RET_SUCCESS;
811 } else {
189f963a 812 puts("Failed!\n");
c599f53b
DSC
813 return CMD_RET_FAILURE;
814 }
815}
cf17789e 816#endif
c599f53b 817
1fd93c6e 818#ifdef CONFIG_SUPPORT_EMMC_BOOT
09140113
SG
819static int do_mmc_bootbus(struct cmd_tbl *cmdtp, int flag,
820 int argc, char *const argv[])
1fd93c6e
PA
821{
822 int dev;
823 struct mmc *mmc;
824 u8 width, reset, mode;
825
826 if (argc != 5)
827 return CMD_RET_USAGE;
0b1284eb
SG
828 dev = dectoul(argv[1], NULL);
829 width = dectoul(argv[2], NULL);
830 reset = dectoul(argv[3], NULL);
831 mode = dectoul(argv[4], NULL);
1fd93c6e 832
1ae24a50 833 mmc = init_mmc_device(dev, false);
1fd93c6e
PA
834 if (!mmc)
835 return CMD_RET_FAILURE;
836
837 if (IS_SD(mmc)) {
838 puts("BOOT_BUS_WIDTH only exists on eMMC\n");
839 return CMD_RET_FAILURE;
2a91c913 840 }
ab71188c 841
e9978b17
JC
842 /*
843 * BOOT_BUS_CONDITIONS[177]
844 * BOOT_MODE[4:3]
845 * 0x0 : Use SDR + Backward compatible timing in boot operation
846 * 0x1 : Use SDR + High Speed Timing in boot operation mode
847 * 0x2 : Use DDR in boot operation
848 * RESET_BOOT_BUS_CONDITIONS
849 * 0x0 : Reset bus width to x1, SDR, Backward compatible
850 * 0x1 : Retain BOOT_BUS_WIDTH and BOOT_MODE
851 * BOOT_BUS_WIDTH
852 * 0x0 : x1(sdr) or x4 (ddr) buswidth
853 * 0x1 : x4(sdr/ddr) buswith
854 * 0x2 : x8(sdr/ddr) buswith
855 *
856 */
857 if (width >= 0x3) {
858 printf("boot_bus_width %d is invalid\n", width);
859 return CMD_RET_FAILURE;
860 }
861
862 if (reset >= 0x2) {
863 printf("reset_boot_bus_width %d is invalid\n", reset);
864 return CMD_RET_FAILURE;
865 }
866
867 if (mode >= 0x3) {
868 printf("reset_boot_bus_width %d is invalid\n", mode);
869 return CMD_RET_FAILURE;
870 }
871
1fd93c6e 872 /* acknowledge to be sent during boot operation */
e9978b17
JC
873 if (mmc_set_boot_bus_width(mmc, width, reset, mode)) {
874 puts("BOOT_BUS_WIDTH is failed to change.\n");
875 return CMD_RET_FAILURE;
876 }
877
878 printf("Set to BOOT_BUS_WIDTH = 0x%x, RESET = 0x%x, BOOT_MODE = 0x%x\n",
879 width, reset, mode);
880 return CMD_RET_SUCCESS;
1fd93c6e 881}
09140113
SG
882
883static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag,
884 int argc, char *const argv[])
1fd93c6e
PA
885{
886 int dev;
887 struct mmc *mmc;
888 u32 bootsize, rpmbsize;
ab71188c 889
1fd93c6e
PA
890 if (argc != 4)
891 return CMD_RET_USAGE;
0b1284eb
SG
892 dev = dectoul(argv[1], NULL);
893 bootsize = dectoul(argv[2], NULL);
894 rpmbsize = dectoul(argv[3], NULL);
1fd93c6e 895
1ae24a50 896 mmc = init_mmc_device(dev, false);
1fd93c6e
PA
897 if (!mmc)
898 return CMD_RET_FAILURE;
899
900 if (IS_SD(mmc)) {
71a3e5c5 901 printf("It is not an eMMC device\n");
1fd93c6e 902 return CMD_RET_FAILURE;
ab71188c
MN
903 }
904
1fd93c6e
PA
905 if (mmc_boot_partition_size_change(mmc, bootsize, rpmbsize)) {
906 printf("EMMC boot partition Size change Failed.\n");
907 return CMD_RET_FAILURE;
908 }
e85649c7 909
1fd93c6e
PA
910 printf("EMMC boot partition Size %d MB\n", bootsize);
911 printf("EMMC RPMB partition Size %d MB\n", rpmbsize);
912 return CMD_RET_SUCCESS;
913}
bdb60996 914
5c2beda5 915static int mmc_partconf_print(struct mmc *mmc, const char *varname)
bdb60996
AD
916{
917 u8 ack, access, part;
918
919 if (mmc->part_config == MMCPART_NOAVAILABLE) {
920 printf("No part_config info for ver. 0x%x\n", mmc->version);
921 return CMD_RET_FAILURE;
922 }
923
924 access = EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config);
925 ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config);
926 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
927
5c2beda5
RD
928 if(varname)
929 env_set_hex(varname, part);
930
bdb60996
AD
931 printf("EXT_CSD[179], PARTITION_CONFIG:\n"
932 "BOOT_ACK: 0x%x\n"
150481e5
TH
933 "BOOT_PARTITION_ENABLE: 0x%x (%s)\n"
934 "PARTITION_ACCESS: 0x%x (%s)\n", ack, part, emmc_boot_part_names[part],
935 access, emmc_hwpart_names[access]);
bdb60996
AD
936
937 return CMD_RET_SUCCESS;
938}
939
09140113
SG
940static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag,
941 int argc, char *const argv[])
1fd93c6e 942{
fbf368f1 943 int ret, dev;
1fd93c6e
PA
944 struct mmc *mmc;
945 u8 ack, part_num, access;
272cc70b 946
5c2beda5 947 if (argc != 2 && argc != 3 && argc != 5)
1fd93c6e 948 return CMD_RET_USAGE;
272cc70b 949
0b1284eb 950 dev = dectoul(argv[1], NULL);
d23d8d7e 951
1ae24a50 952 mmc = init_mmc_device(dev, false);
1fd93c6e
PA
953 if (!mmc)
954 return CMD_RET_FAILURE;
955
956 if (IS_SD(mmc)) {
957 puts("PARTITION_CONFIG only exists on eMMC\n");
958 return CMD_RET_FAILURE;
959 }
960
5c2beda5 961 if (argc == 2 || argc == 3)
8632b36b 962 return mmc_partconf_print(mmc, cmd_arg2(argc, argv));
bdb60996 963
150481e5 964 /* BOOT_ACK */
0b1284eb 965 ack = dectoul(argv[2], NULL);
150481e5
TH
966 /* BOOT_PARTITION_ENABLE */
967 if (!isdigit(*argv[3])) {
968 for (part_num = ARRAY_SIZE(emmc_boot_part_names) - 1; part_num > 0; part_num--) {
969 if (!strcmp(argv[3], emmc_boot_part_names[part_num]))
970 break;
971 }
972 } else {
973 part_num = dectoul(argv[3], NULL);
974 }
975 /* PARTITION_ACCESS */
976 if (!isdigit(*argv[4])) {
977 for (access = ARRAY_SIZE(emmc_hwpart_names) - 1; access > 0; access--) {
978 if (!strcmp(argv[4], emmc_hwpart_names[access]))
979 break;
980 }
981 } else {
982 access = dectoul(argv[4], NULL);
983 }
bdb60996 984
1fd93c6e 985 /* acknowledge to be sent during boot operation */
fbf368f1
T
986 ret = mmc_set_part_conf(mmc, ack, part_num, access);
987 if (ret != 0)
988 return CMD_RET_FAILURE;
989
990 return CMD_RET_SUCCESS;
1fd93c6e 991}
09140113
SG
992
993static int do_mmc_rst_func(struct cmd_tbl *cmdtp, int flag,
994 int argc, char *const argv[])
1fd93c6e 995{
fbf368f1 996 int ret, dev;
1fd93c6e
PA
997 struct mmc *mmc;
998 u8 enable;
999
1000 /*
1001 * Set the RST_n_ENABLE bit of RST_n_FUNCTION
1002 * The only valid values are 0x0, 0x1 and 0x2 and writing
1003 * a value of 0x1 or 0x2 sets the value permanently.
1004 */
1005 if (argc != 3)
1006 return CMD_RET_USAGE;
1007
0b1284eb
SG
1008 dev = dectoul(argv[1], NULL);
1009 enable = dectoul(argv[2], NULL);
1fd93c6e 1010
678e9316 1011 if (enable > 2) {
1fd93c6e
PA
1012 puts("Invalid RST_n_ENABLE value\n");
1013 return CMD_RET_USAGE;
1014 }
1015
1ae24a50 1016 mmc = init_mmc_device(dev, false);
1fd93c6e
PA
1017 if (!mmc)
1018 return CMD_RET_FAILURE;
1019
1020 if (IS_SD(mmc)) {
1021 puts("RST_n_FUNCTION only exists on eMMC\n");
1022 return CMD_RET_FAILURE;
1023 }
272cc70b 1024
fbf368f1
T
1025 ret = mmc_set_rst_n_function(mmc, enable);
1026 if (ret != 0)
1027 return CMD_RET_FAILURE;
1028
1029 return CMD_RET_SUCCESS;
1fd93c6e
PA
1030}
1031#endif
09140113
SG
1032static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int flag,
1033 int argc, char *const argv[])
1fd93c6e
PA
1034{
1035 struct mmc *mmc;
1036 u32 val;
1037 int ret;
1038
1039 if (argc != 2)
1040 return CMD_RET_USAGE;
7e5f460e 1041 val = hextoul(argv[1], NULL);
1fd93c6e
PA
1042
1043 mmc = find_mmc_device(curr_device);
1044 if (!mmc) {
1045 printf("no mmc device at slot %x\n", curr_device);
1046 return CMD_RET_FAILURE;
1047 }
1048 ret = mmc_set_dsr(mmc, val);
1049 printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR");
1050 if (!ret) {
1051 mmc->has_init = 0;
1052 if (mmc_init(mmc))
1053 return CMD_RET_FAILURE;
1054 else
1055 return CMD_RET_SUCCESS;
272cc70b 1056 }
1fd93c6e
PA
1057 return ret;
1058}
1059
cd3d4880 1060#ifdef CONFIG_CMD_BKOPS_ENABLE
cf1f7355 1061static int mmc_bkops_common(char *device, bool autobkops, bool enable)
cd3d4880 1062{
cd3d4880 1063 struct mmc *mmc;
cf1f7355 1064 int dev;
cd3d4880 1065
cf1f7355 1066 dev = dectoul(device, NULL);
cd3d4880
TM
1067
1068 mmc = init_mmc_device(dev, false);
1069 if (!mmc)
1070 return CMD_RET_FAILURE;
1071
1072 if (IS_SD(mmc)) {
1073 puts("BKOPS_EN only exists on eMMC\n");
1074 return CMD_RET_FAILURE;
1075 }
1076
cf1f7355
MV
1077 return mmc_set_bkops_enable(mmc, autobkops, enable);
1078}
1079
1080static int do_mmc_bkops(struct cmd_tbl *cmdtp, int flag,
1081 int argc, char * const argv[])
1082{
1083 bool autobkops, enable;
1084
1085 if (argc != 4)
1086 return CMD_RET_USAGE;
1087
1088 if (!strcmp(argv[2], "manual"))
1089 autobkops = false;
1090 else if (!strcmp(argv[2], "auto"))
1091 autobkops = true;
1092 else
1093 return CMD_RET_FAILURE;
1094
1095 if (!strcmp(argv[3], "disable"))
1096 enable = false;
1097 else if (!strcmp(argv[3], "enable"))
1098 enable = true;
1099 else
1100 return CMD_RET_FAILURE;
1101
1102 return mmc_bkops_common(argv[1], autobkops, enable);
1103}
1104
1105static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
1106 int argc, char * const argv[])
1107{
1108 if (argc != 2)
1109 return CMD_RET_USAGE;
1110
1111 return mmc_bkops_common(argv[1], false, true);
cd3d4880
TM
1112}
1113#endif
1114
09140113 1115static int do_mmc_boot_wp(struct cmd_tbl *cmdtp, int flag,
0469d846
HS
1116 int argc, char * const argv[])
1117{
1118 int err;
1119 struct mmc *mmc;
23366241 1120 int part;
0469d846
HS
1121
1122 mmc = init_mmc_device(curr_device, false);
1123 if (!mmc)
1124 return CMD_RET_FAILURE;
1125 if (IS_SD(mmc)) {
1126 printf("It is not an eMMC device\n");
1127 return CMD_RET_FAILURE;
1128 }
23366241
YCLP
1129
1130 if (argc == 2) {
1131 part = dectoul(argv[1], NULL);
1132 err = mmc_boot_wp_single_partition(mmc, part);
1133 } else {
1134 err = mmc_boot_wp(mmc);
1135 }
1136
0469d846
HS
1137 if (err)
1138 return CMD_RET_FAILURE;
1139 printf("boot areas protected\n");
1140 return CMD_RET_SUCCESS;
1141}
1142
b5f40393
MV
1143#if CONFIG_IS_ENABLED(CMD_MMC_REG)
1144static int do_mmc_reg(struct cmd_tbl *cmdtp, int flag,
1145 int argc, char *const argv[])
1146{
1147 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1148 struct mmc *mmc;
1149 int i, ret;
1150 u32 off;
1151
1152 if (argc < 3 || argc > 5)
1153 return CMD_RET_USAGE;
1154
1155 mmc = find_mmc_device(curr_device);
1156 if (!mmc) {
1157 printf("no mmc device at slot %x\n", curr_device);
1158 return CMD_RET_FAILURE;
1159 }
1160
1161 if (IS_SD(mmc)) {
1162 printf("SD registers are not supported\n");
1163 return CMD_RET_FAILURE;
1164 }
1165
1166 off = simple_strtoul(argv[3], NULL, 10);
1167 if (!strcmp(argv[2], "cid")) {
1168 if (off > 3)
1169 return CMD_RET_USAGE;
1170 printf("CID[%i]: 0x%08x\n", off, mmc->cid[off]);
1171 if (argv[4])
1172 env_set_hex(argv[4], mmc->cid[off]);
1173 return CMD_RET_SUCCESS;
1174 }
1175 if (!strcmp(argv[2], "csd")) {
1176 if (off > 3)
1177 return CMD_RET_USAGE;
1178 printf("CSD[%i]: 0x%08x\n", off, mmc->csd[off]);
1179 if (argv[4])
1180 env_set_hex(argv[4], mmc->csd[off]);
1181 return CMD_RET_SUCCESS;
1182 }
1183 if (!strcmp(argv[2], "dsr")) {
1184 printf("DSR: 0x%08x\n", mmc->dsr);
1185 if (argv[4])
1186 env_set_hex(argv[4], mmc->dsr);
1187 return CMD_RET_SUCCESS;
1188 }
1189 if (!strcmp(argv[2], "ocr")) {
1190 printf("OCR: 0x%08x\n", mmc->ocr);
1191 if (argv[4])
1192 env_set_hex(argv[4], mmc->ocr);
1193 return CMD_RET_SUCCESS;
1194 }
1195 if (!strcmp(argv[2], "rca")) {
1196 printf("RCA: 0x%08x\n", mmc->rca);
1197 if (argv[4])
1198 env_set_hex(argv[4], mmc->rca);
1199 return CMD_RET_SUCCESS;
1200 }
1201 if (!strcmp(argv[2], "extcsd") &&
1202 mmc->version >= MMC_VERSION_4_41) {
1203 ret = mmc_send_ext_csd(mmc, ext_csd);
1204 if (ret)
1205 return CMD_RET_FAILURE;
1206 if (!strcmp(argv[3], "all")) {
1207 /* Dump the entire register */
1208 printf("EXT_CSD:");
1209 for (i = 0; i < MMC_MAX_BLOCK_LEN; i++) {
1210 if (!(i % 10))
1211 printf("\n%03i: ", i);
1212 printf(" %02x", ext_csd[i]);
1213 }
1214 printf("\n");
1215 return CMD_RET_SUCCESS;
1216 }
1217 off = simple_strtoul(argv[3], NULL, 10);
1218 if (off > 512)
1219 return CMD_RET_USAGE;
1220 printf("EXT_CSD[%i]: 0x%02x\n", off, ext_csd[off]);
1221 if (argv[4])
1222 env_set_hex(argv[4], ext_csd[off]);
1223 return CMD_RET_SUCCESS;
1224 }
1225
1226 return CMD_RET_FAILURE;
1227}
1228#endif
1229
09140113 1230static struct cmd_tbl cmd_mmc[] = {
1fd93c6e
PA
1231 U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""),
1232 U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""),
23366241 1233 U_BOOT_CMD_MKENT(wp, 2, 0, do_mmc_boot_wp, "", ""),
e6fa5a54 1234#if CONFIG_IS_ENABLED(MMC_WRITE)
1fd93c6e
PA
1235 U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""),
1236 U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""),
c232d14d
AK
1237#endif
1238#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE)
1239 U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""),
e6fa5a54 1240#endif
19f7a34a 1241 U_BOOT_CMD_MKENT(rescan, 2, 1, do_mmc_rescan, "", ""),
1fd93c6e 1242 U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""),
19f7a34a 1243 U_BOOT_CMD_MKENT(dev, 4, 0, do_mmc_dev, "", ""),
1fd93c6e 1244 U_BOOT_CMD_MKENT(list, 1, 1, do_mmc_list, "", ""),
cf17789e 1245#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
189f963a 1246 U_BOOT_CMD_MKENT(hwpartition, 28, 0, do_mmc_hwpartition, "", ""),
cf17789e 1247#endif
1fd93c6e
PA
1248#ifdef CONFIG_SUPPORT_EMMC_BOOT
1249 U_BOOT_CMD_MKENT(bootbus, 5, 0, do_mmc_bootbus, "", ""),
fa7b8851 1250 U_BOOT_CMD_MKENT(bootpart-resize, 4, 0, do_mmc_boot_resize, "", ""),
1fd93c6e
PA
1251 U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""),
1252 U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
1253#endif
5a7b11e6 1254#if CONFIG_IS_ENABLED(CMD_MMC_RPMB)
1fd93c6e
PA
1255 U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
1256#endif
1257 U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""),
cd3d4880
TM
1258#ifdef CONFIG_CMD_BKOPS_ENABLE
1259 U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""),
cf1f7355 1260 U_BOOT_CMD_MKENT(bkops, 4, 0, do_mmc_bkops, "", ""),
cd3d4880 1261#endif
b5f40393
MV
1262#if CONFIG_IS_ENABLED(CMD_MMC_REG)
1263 U_BOOT_CMD_MKENT(reg, 5, 0, do_mmc_reg, "", ""),
1264#endif
1fd93c6e
PA
1265};
1266
09140113
SG
1267static int do_mmcops(struct cmd_tbl *cmdtp, int flag, int argc,
1268 char *const argv[])
1fd93c6e 1269{
09140113 1270 struct cmd_tbl *cp;
1fd93c6e
PA
1271
1272 cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc));
1273
1274 /* Drop the mmc command */
1275 argc--;
1276 argv++;
1277
1278 if (cp == NULL || argc > cp->maxargs)
1279 return CMD_RET_USAGE;
80a48dd4 1280 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp))
1fd93c6e 1281 return CMD_RET_SUCCESS;
ea6ebe21 1282
1fd93c6e
PA
1283 if (curr_device < 0) {
1284 if (get_mmc_num() > 0) {
1285 curr_device = 0;
1286 } else {
1287 puts("No MMC device available\n");
1288 return CMD_RET_FAILURE;
1289 }
1290 }
1291 return cp->cmd(cmdtp, flag, argc, argv);
272cc70b
AF
1292}
1293
1294U_BOOT_CMD(
189f963a 1295 mmc, 29, 1, do_mmcops,
852dbfdd 1296 "MMC sub system",
1fd93c6e
PA
1297 "info - display info of the current MMC device\n"
1298 "mmc read addr blk# cnt\n"
ea6ebe21 1299 "mmc write addr blk# cnt\n"
c232d14d 1300#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE)
732bc7ce
JB
1301 "mmc swrite addr blk#\n"
1302#endif
e6f99a56 1303 "mmc erase blk# cnt\n"
6c0943ff 1304 "mmc erase partname\n"
19f7a34a 1305 "mmc rescan [mode]\n"
ea6ebe21 1306 "mmc part - lists available partition on current mmc device\n"
19f7a34a
AG
1307 "mmc dev [dev] [part] [mode] - show or set current mmc device [partition] and set mode\n"
1308 " - the required speed mode is passed as the index from the following list\n"
1309 " [MMC_LEGACY, MMC_HS, SD_HS, MMC_HS_52, MMC_DDR_52, UHS_SDR12, UHS_SDR25,\n"
1310 " UHS_SDR50, UHS_DDR50, UHS_SDR104, MMC_HS_200, MMC_HS_400, MMC_HS_400_ES]\n"
2a91c913 1311 "mmc list - lists available devices\n"
23366241
YCLP
1312 "mmc wp [PART] - power on write protect boot partitions\n"
1313 " arguments:\n"
1314 " PART - [0|1]\n"
1315 " : 0 - first boot partition, 1 - second boot partition\n"
1316 " if not assigned, write protect all boot partitions\n"
84593679 1317#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
8ae82c4b 1318 "mmc hwpartition <USER> <GP> <MODE> - does hardware partitioning\n"
c599f53b 1319 " arguments (sizes in 512-byte blocks):\n"
8ae82c4b
JC
1320 " USER - <user> <enh> <start> <cnt> <wrrel> <{on|off}>\n"
1321 " : sets user data area attributes\n"
1322 " GP - <{gp1|gp2|gp3|gp4}> <cnt> <enh> <wrrel> <{on|off}>\n"
1323 " : general purpose partition\n"
1324 " MODE - <{check|set|complete}>\n"
1325 " : mode, complete set partitioning completed\n"
189f963a
DSC
1326 " WARNING: Partitioning is a write-once setting once it is set to complete.\n"
1327 " Power cycling is required to initialize partitions after set to complete.\n"
84593679 1328#endif
2a91c913 1329#ifdef CONFIG_SUPPORT_EMMC_BOOT
1019b196 1330 "mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>\n"
5a99b9de 1331 " - Set the BOOT_BUS_WIDTH field of the specified device\n"
f1fd957e
TR
1332 "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n"
1333 " - Change sizes of boot and RPMB partitions of specified device\n"
5c2beda5 1334 "mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]\n"
bdb60996 1335 " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n"
5c2beda5 1336 " If showing the bits, optionally store the boot_partition field into varname\n"
1019b196 1337 "mmc rst-function <dev> <value>\n"
33ace362
TR
1338 " - Change the RST_n_FUNCTION field of the specified device\n"
1339 " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
3511b4e2 1340#endif
5a7b11e6 1341#if CONFIG_IS_ENABLED(CMD_MMC_RPMB)
1fd93c6e
PA
1342 "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"
1343 "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n"
1344 "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n"
1345 "mmc rpmb counter - read the value of the write counter\n"
1346#endif
1347 "mmc setdsr <value> - set DSR register value\n"
cd3d4880
TM
1348#ifdef CONFIG_CMD_BKOPS_ENABLE
1349 "mmc bkops-enable <dev> - enable background operations handshake on device\n"
1350 " WARNING: This is a write-once setting.\n"
cf1f7355
MV
1351 "mmc bkops <dev> [auto|manual] [enable|disable]\n"
1352 " - configure background operations handshake on device\n"
b5f40393
MV
1353#endif
1354#if CONFIG_IS_ENABLED(CMD_MMC_REG)
1355 "mmc reg read <reg> <offset> [env] - read card register <reg> offset <offset>\n"
1356 " (optionally into [env] variable)\n"
1357 " - reg: cid/csd/dsr/ocr/rca/extcsd\n"
1358 " - offset: for cid/csd [0..3], for extcsd [0..511,all]\n"
cd3d4880 1359#endif
2a91c913 1360 );
1fd93c6e
PA
1361
1362/* Old command kept for compatibility. Same as 'mmc info' */
1363U_BOOT_CMD(
1364 mmcinfo, 1, 0, do_mmcinfo,
1365 "display MMC info",
1366 "- display info of the current MMC device"
1367);
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