projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 8a681f4c | 1 | CONFIG_ARM=y |
| a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 8a681f4c LD |
3 | CONFIG_ARCH_ROCKCHIP=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x00200000 | |
| 83061dbd | 5 | CONFIG_SPL_GPIO=y |
| 554e5514 | 6 | CONFIG_NR_DRAM_BANKS=1 |
| d4271fa2 JT |
7 | CONFIG_ENV_SIZE=0x8000 |
| 8 | CONFIG_ENV_OFFSET=0x3F8000 | |
| e8848592 | 9 | CONFIG_ENV_SECT_SIZE=0x1000 |
| 2bba7807 | 10 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" |
| 052170c6 | 11 | CONFIG_ROCKCHIP_RK3399=y |
| 01892d23 | 12 | CONFIG_TARGET_ROC_PC_RK3399=y |
| 8a681f4c LD |
13 | CONFIG_DEBUG_UART_BASE=0xFF1A0000 |
| 14 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
| 1831191b JT |
15 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 16 | CONFIG_SPL_SPI_SUPPORT=y | |
| 8a681f4c | 17 | CONFIG_DEBUG_UART=y |
| 49c8ef0e | 18 | CONFIG_SYS_LOAD_ADDR=0x800800 |
| cbb8189b | 19 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
| 8a681f4c | 20 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" |
| 8a681f4c | 21 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 58ec0aa3 | 22 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 8a681f4c | 23 | CONFIG_SPL_STACK_R=y |
| 6d06ea6c JT |
24 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 |
| 25 | CONFIG_SPL_ENV_SUPPORT=y | |
| 1831191b | 26 | CONFIG_SPL_SPI_LOAD=y |
| bf17bcc5 | 27 | CONFIG_TPL=y |
| 8a681f4c LD |
28 | CONFIG_CMD_BOOTZ=y |
| 29 | CONFIG_CMD_GPT=y | |
| 30 | CONFIG_CMD_MMC=y | |
| 8a681f4c LD |
31 | CONFIG_CMD_USB=y |
| 32 | # CONFIG_CMD_SETEXPR is not set | |
| 33 | CONFIG_CMD_TIME=y | |
| 34 | CONFIG_SPL_OF_CONTROL=y | |
| 8a681f4c | 35 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| e8848592 | 36 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 8d8ee47e | 37 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 6d06ea6c | 38 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 8a681f4c LD |
39 | CONFIG_ROCKCHIP_GPIO=y |
| 40 | CONFIG_SYS_I2C_ROCKCHIP=y | |
| 2c7cff0d | 41 | CONFIG_MISC=y |
| 8a681f4c LD |
42 | CONFIG_MMC_DW=y |
| 43 | CONFIG_MMC_DW_ROCKCHIP=y | |
| 44 | CONFIG_MMC_SDHCI=y | |
| 45 | CONFIG_MMC_SDHCI_ROCKCHIP=y | |
| acc57ecf | 46 | CONFIG_SF_DEFAULT_BUS=1 |
| 4244429f | 47 | CONFIG_SPI_FLASH_WINBOND=y |
| 8a681f4c LD |
48 | CONFIG_DM_ETH=y |
| 49 | CONFIG_ETH_DESIGNWARE=y | |
| 50 | CONFIG_GMAC_ROCKCHIP=y | |
| 2c7cff0d JT |
51 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 52 | CONFIG_PHY_ROCKCHIP_TYPEC=y | |
| 8a681f4c LD |
53 | CONFIG_PMIC_RK8XX=y |
| 54 | CONFIG_REGULATOR_PWM=y | |
| 55 | CONFIG_REGULATOR_RK8XX=y | |
| 56 | CONFIG_PWM_ROCKCHIP=y | |
| 80632e04 | 57 | # CONFIG_RAM_ROCKCHIP_DEBUG is not set |
| bf17bcc5 | 58 | CONFIG_RAM_RK3399_LPDDR4=y |
| 2c7cff0d | 59 | CONFIG_DM_RESET=y |
| 8a681f4c LD |
60 | CONFIG_BAUDRATE=1500000 |
| 61 | CONFIG_DEBUG_UART_SHIFT=2 | |
| 3d11196c | 62 | CONFIG_ROCKCHIP_SPI=y |
| 4244429f | 63 | CONFIG_SYSRESET=y |
| 8a681f4c LD |
64 | CONFIG_USB=y |
| 65 | CONFIG_USB_XHCI_HCD=y | |
| 66 | CONFIG_USB_XHCI_DWC3=y | |
| 67 | CONFIG_USB_EHCI_HCD=y | |
| 68 | CONFIG_USB_EHCI_GENERIC=y | |
| 2c7cff0d JT |
69 | CONFIG_USB_DWC3=y |
| 70 | CONFIG_USB_DWC3_GENERIC=y | |
| cbb8189b | 71 | CONFIG_ROCKCHIP_USB2_PHY=y |
| 556fd590 | 72 | CONFIG_USB_KEYBOARD=y |
| 8a681f4c LD |
73 | CONFIG_USB_HOST_ETHER=y |
| 74 | CONFIG_USB_ETHER_ASIX=y | |
| 75 | CONFIG_USB_ETHER_ASIX88179=y | |
| 76 | CONFIG_USB_ETHER_MCS7830=y | |
| 77 | CONFIG_USB_ETHER_RTL8152=y | |
| 78 | CONFIG_USB_ETHER_SMSC95XX=y | |
| df59b7d2 | 79 | CONFIG_USB_GADGET=y |
| 9778edae | 80 | CONFIG_DM_VIDEO=y |
| 9778edae JT |
81 | CONFIG_DISPLAY=y |
| 82 | CONFIG_VIDEO_ROCKCHIP=y | |
| 83 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | |
| 556fd590 TR |
84 | CONFIG_SPL_TINY_MEMSET=y |
| 85 | CONFIG_ERRNO_STR=y |