[J-u-boot.git] / include / configs / uniphier.h

/*
 * Copyright (C) 2012-2015 Panasonic Corporation
 * Copyright (C) 2015-2016 Socionext Inc.
 *   Author: Masahiro Yamada <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* U-Boot - Common settings for UniPhier Family */

#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__

#define CONFIG_ARMV7_PSCI_1_0

/*-----------------------------------------------------------------------
 * MMU and Cache Setting
 *----------------------------------------------------------------------*/

/* Comment out the following to enable L1 cache */
/* #define CONFIG_SYS_ICACHE_OFF */
/* #define CONFIG_SYS_DCACHE_OFF */

#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)

#define CONFIG_TIMESTAMP

/* FLASH related */
#define CONFIG_MTD_DEVICE

#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI

#define CONFIG_SYS_MAX_FLASH_SECT	256
#define CONFIG_SYS_MONITOR_BASE		0
#define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
#define CONFIG_SYS_FLASH_BASE		0

/*
 * flash_toggle does not work for our support card.
 * We need to use flash_status_poll.
 */
#define CONFIG_SYS_CFI_FLASH_STATUS_POLL

#define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */

#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1

/* serial console configuration */

#define CONFIG_SYS_LONGHELP		/* undef to save memory */

#define CONFIG_CMDLINE_EDITING		/* add command line history	*/
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

#define CONFIG_CONS_INDEX		1

#define CONFIG_ENV_OFFSET			0x100000
#define CONFIG_ENV_SIZE				0x2000
/* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */

#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_SYS_MMC_ENV_PART		1

#if !defined(CONFIG_ARM64)
/* Time clock 1MHz */
#define CONFIG_SYS_TIMER_RATE			1000000
#endif

#define CONFIG_SYS_MAX_NAND_DEVICE			1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_REGS_BASE			0x68100000
#define CONFIG_SYS_NAND_DATA_BASE			0x68000000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS			0

/* SD/MMC */
#define CONFIG_SUPPORT_EMMC_BOOT

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)

/*
 * Network Configuration
 */
#define CONFIG_SERVERIP			192.168.11.1
#define CONFIG_IPADDR			192.168.11.10
#define CONFIG_GATEWAYIP		192.168.11.1
#define CONFIG_NETMASK			255.255.255.0

#define CONFIG_LOADADDR			0x84000000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_BOOTM_LEN		(32 << 20)

#define CONFIG_CMDLINE_EDITING		/* add command line history	*/

#if defined(CONFIG_ARM64)
/* ARM Trusted Firmware */
#define BOOT_IMAGES \
	"second_image=unph_bl.bin\0" \
	"third_image=fip.bin\0"
#else
#define BOOT_IMAGES \
	"second_image=u-boot-spl.bin\0" \
	"third_image=u-boot.bin\0"
#endif

#define CONFIG_BOOTCOMMAND		"run $bootmode"

#define CONFIG_ROOTPATH			"/nfs/root/path"
#define CONFIG_NFSBOOTCOMMAND						\
	"setenv bootargs $bootargs root=/dev/nfs rw "			\
	"nfsroot=$serverip:$rootpath "					\
	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
		"run __nfsboot"

#ifdef CONFIG_FIT
#define CONFIG_BOOTFILE			"fitImage"
#define LINUXBOOT_ENV_SETTINGS \
	"fit_addr=0x00100000\0" \
	"fit_addr_r=0x84100000\0" \
	"fit_size=0x00f00000\0" \
	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
		"bootm $fit_addr\0" \
	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
		"bootm $fit_addr_r\0" \
	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
		"bootm $fit_addr_r\0" \
	"__nfsboot=run tftpboot\0"
#else
#ifdef CONFIG_ARM64
#define CONFIG_BOOTFILE			"Image.gz"
#define LINUXBOOT_CMD			"booti"
#define KERNEL_ADDR_LOAD		"kernel_addr_load=0x84200000\0"
#define KERNEL_ADDR_R			"kernel_addr_r=0x82080000\0"
#else
#define CONFIG_BOOTFILE			"zImage"
#define LINUXBOOT_CMD			"bootz"
#define KERNEL_ADDR_LOAD		"kernel_addr_load=0x80208000\0"
#define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
#endif
#define LINUXBOOT_ENV_SETTINGS \
	"fdt_addr=0x00100000\0" \
	"fdt_addr_r=0x84100000\0" \
	"fdt_size=0x00008000\0" \
	"kernel_addr=0x00200000\0" \
	KERNEL_ADDR_LOAD \
	KERNEL_ADDR_R \
	"kernel_size=0x00800000\0" \
	"ramdisk_addr=0x00a00000\0" \
	"ramdisk_addr_r=0x84a00000\0" \
	"ramdisk_size=0x00600000\0" \
	"ramdisk_file=rootfs.cpio.uboot\0" \
	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
		"if test $kernel_addr_load = $kernel_addr_r; then " \
			"true; " \
		"else " \
			"unzip $kernel_addr_load $kernel_addr_r; " \
		"fi && " \
		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
		"setexpr kernel_size_div4 $kernel_size / 4 && " \
		"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
		"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
		"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
		"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
		"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
		"setexpr fdt_size_div4 $fdt_size / 4 && " \
		"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
		"run boot_common\0" \
	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
		"run boot_common\0" \
	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
		"tftpboot $fdt_addr_r $fdt_file &&" \
		"run boot_common\0" \
	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
		"tftpboot $fdt_addr_r $fdt_file &&" \
		"setenv ramdisk_addr_r - &&" \
		"run boot_common\0"
#endif

#define	CONFIG_EXTRA_ENV_SETTINGS				\
	"netdev=eth0\0"						\
	"initrd_high=0xffffffffffffffff\0"			\
	"nor_base=0x42000000\0"					\
	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
		"tftpboot $tmp_addr $second_image && " \
		"setexpr tmp_addr $nor_base + 0x70000 && " \
		"tftpboot $tmp_addr $third_image\0" \
	"emmcupdate=mmcsetn &&"					\
		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
		"tftpboot $second_image && " \
		"mmc write $loadaddr 0 100 && " \
		"tftpboot $third_image && " \
		"mmc write $loadaddr 100 700\0" \
	"nandupdate=nand erase 0 0x00100000 &&"			\
		"tftpboot $second_image && " \
		"nand write $loadaddr 0 0x00020000 && " \
		"tftpboot $third_image && " \
		"nand write $loadaddr 0x00020000 0x000e0000\0" \
	"usbupdate=usb start &&" \
		"tftpboot $second_image && " \
		"usb write $loadaddr 0 100 && " \
		"tftpboot $third_image && " \
		"usb write $loadaddr 100 700\0" \
	BOOT_IMAGES \
	LINUXBOOT_ENV_SETTINGS

#define CONFIG_SYS_BOOTMAPSZ			0x20000000

#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_NR_DRAM_BANKS		3
/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
#define CONFIG_SYS_MEM_TOP_HIDE		64

#define CONFIG_PANIC_HANG

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)

/* only for SPL */
#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \
	defined(CONFIG_ARCH_UNIPHIER_SLD8)
#define CONFIG_SPL_TEXT_BASE		0x00040000
#else
#define CONFIG_SPL_TEXT_BASE		0x00100000
#endif

#define CONFIG_SPL_STACK		(0x00100000)

#define CONFIG_SPL_FRAMEWORK

#define CONFIG_SYS_NAND_U_BOOT_OFFS		0x20000

/* subtract sizeof(struct image_header) */
#define CONFIG_SYS_UBOOT_BASE			(0x70000 - 0x40)

#define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
#define CONFIG_SPL_MAX_FOOTPRINT		0x10000
#define CONFIG_SPL_MAX_SIZE			0x10000
#define CONFIG_SPL_BSS_MAX_SIZE			0x2000

#define CONFIG_SPL_PAD_TO			0x20000

#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
Commit	Line	Data
5894ca00	1	/*
e8a92932 MY	2	* Copyright (C) 2012-2015 Panasonic Corporation
	3	* Copyright (C) 2015-2016 Socionext Inc.
	4	* Author: Masahiro Yamada <[email protected]>
5894ca00 MY	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
a187559e	9	/* U-Boot - Common settings for UniPhier Family */
5894ca00 MY	10
	11	#ifndef __CONFIG_UNIPHIER_COMMON_H__
	12	#define __CONFIG_UNIPHIER_COMMON_H__
	13
928f3248	14	#define CONFIG_ARMV7_PSCI_1_0
e8a92932	15
5894ca00 MY	16	/*-----------------------------------------------------------------------
	17	* MMU and Cache Setting
	18	----------------------------------------------------------------------/
	19
	20	/* Comment out the following to enable L1 cache */
	21	/* #define CONFIG_SYS_ICACHE_OFF */
	22	/* #define CONFIG_SYS_DCACHE_OFF */
	23
5894ca00 MY	24	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
	25
	26	#define CONFIG_TIMESTAMP
	27
	28	/* FLASH related */
	29	#define CONFIG_MTD_DEVICE
	30
5894ca00 MY	31	#define CONFIG_FLASH_CFI_DRIVER
	32	#define CONFIG_SYS_FLASH_CFI
	33
	34	#define CONFIG_SYS_MAX_FLASH_SECT 256
	35	#define CONFIG_SYS_MONITOR_BASE 0
d085ecd6	36	#define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */
5894ca00 MY	37	#define CONFIG_SYS_FLASH_BASE 0
	38
	39	/*
66deb91e	40	* flash_toggle does not work for our support card.
5894ca00 MY	41	* We need to use flash_status_poll.
	42	*/
	43	#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
	44
	45	#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
	46
9879842c	47	#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
5894ca00 MY	48
5894ca00 MY	49	/* serial console configuration */
5894ca00	50
5894ca00 MY	51	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	52
	53	#define CONFIG_CMDLINE_EDITING /* add command line history */
5894ca00	54	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
5894ca00 MY	55	/* Boot Argument Buffer Size */
	56	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	57
	58	#define CONFIG_CONS_INDEX 1
	59
0b93e3de	60	#define CONFIG_ENV_OFFSET 0x100000
5894ca00	61	#define CONFIG_ENV_SIZE 0x2000
5894ca00 MY	62	/* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
5894ca00 MY	63
aa8a9348 MY	64	#define CONFIG_SYS_MMC_ENV_DEV 0
	65	#define CONFIG_SYS_MMC_ENV_PART 1
	66
ee8d037c	67	#if !defined(CONFIG_ARM64)
5894ca00 MY	68	/* Time clock 1MHz */
5894ca00 MY	69	#define CONFIG_SYS_TIMER_RATE 1000000
9d0c2ceb MY	70	#endif
9d0c2ceb MY	71
5894ca00	72	#define CONFIG_SYS_MAX_NAND_DEVICE 1
5894ca00	73	#define CONFIG_SYS_NAND_ONFI_DETECTION
5894ca00 MY	74	#define CONFIG_SYS_NAND_REGS_BASE 0x68100000
5894ca00 MY	75	#define CONFIG_SYS_NAND_DATA_BASE 0x68000000
5894ca00 MY	76	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
5894ca00 MY	77
4aceb3f8	78	/* SD/MMC */
a55d9fee	79	#define CONFIG_SUPPORT_EMMC_BOOT
4aceb3f8	80
5894ca00 MY	81	/* memtest works on */
	82	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	83	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
	84
5894ca00 MY	85	/*
	86	* Network Configuration
	87	*/
5894ca00 MY	88	#define CONFIG_SERVERIP 192.168.11.1
	89	#define CONFIG_IPADDR 192.168.11.10
	90	#define CONFIG_GATEWAYIP 192.168.11.1
	91	#define CONFIG_NETMASK 255.255.255.0
	92
	93	#define CONFIG_LOADADDR 0x84000000
	94	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
571e050b	95	#define CONFIG_SYS_BOOTM_LEN (32 << 20)
5894ca00 MY	96
	97	#define CONFIG_CMDLINE_EDITING /* add command line history */
	98
ee8d037c	99	#if defined(CONFIG_ARM64)
b7b43036 MY	100	/* ARM Trusted Firmware */
b7b43036 MY	101	#define BOOT_IMAGES \
7728f0c6	102	"second_image=unph_bl.bin\0" \
b7b43036 MY	103	"third_image=fip.bin\0"
	104	#else
	105	#define BOOT_IMAGES \
	106	"second_image=u-boot-spl.bin\0" \
	107	"third_image=u-boot.bin\0"
	108	#endif
	109
5894ca00 MY	110	#define CONFIG_BOOTCOMMAND "run $bootmode"
	111
	112	#define CONFIG_ROOTPATH "/nfs/root/path"
	113	#define CONFIG_NFSBOOTCOMMAND \
	114	"setenv bootargs $bootargs root=/dev/nfs rw " \
	115	"nfsroot=$serverip:$rootpath " \
	116	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
d566f754	117	"run __nfsboot"
5894ca00	118
421376ae MY	119	#ifdef CONFIG_FIT
	120	#define CONFIG_BOOTFILE "fitImage"
	121	#define LINUXBOOT_ENV_SETTINGS \
	122	"fit_addr=0x00100000\0" \
	123	"fit_addr_r=0x84100000\0" \
	124	"fit_size=0x00f00000\0" \
5451b777	125	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
421376ae	126	"bootm $fit_addr\0" \
5451b777	127	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
e037db0c	128	"bootm $fit_addr_r\0" \
5451b777	129	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
d566f754 MY	130	"bootm $fit_addr_r\0" \
d566f754 MY	131	"__nfsboot=run tftpboot\0"
421376ae	132	#else
9d0c2ceb	133	#ifdef CONFIG_ARM64
99b85170	134	#define CONFIG_BOOTFILE "Image.gz"
9d0c2ceb	135	#define LINUXBOOT_CMD "booti"
99b85170	136	#define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0"
edee114a	137	#define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0"
9d0c2ceb	138	#else
89835b35	139	#define CONFIG_BOOTFILE "zImage"
9d0c2ceb	140	#define LINUXBOOT_CMD "bootz"
99b85170	141	#define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0"
9d0c2ceb	142	#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
9d0c2ceb	143	#endif
421376ae MY	144	#define LINUXBOOT_ENV_SETTINGS \
	145	"fdt_addr=0x00100000\0" \
	146	"fdt_addr_r=0x84100000\0" \
	147	"fdt_size=0x00008000\0" \
	148	"kernel_addr=0x00200000\0" \
99b85170	149	KERNEL_ADDR_LOAD \
9d0c2ceb	150	KERNEL_ADDR_R \
99b85170 MY	151	"kernel_size=0x00800000\0" \
99b85170 MY	152	"ramdisk_addr=0x00a00000\0" \
421376ae MY	153	"ramdisk_addr_r=0x84a00000\0" \
421376ae MY	154	"ramdisk_size=0x00600000\0" \
e037db0c	155	"ramdisk_file=rootfs.cpio.uboot\0" \
99b85170 MY	156	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
	157	"if test $kernel_addr_load = $kernel_addr_r; then " \
	158	"true; " \
	159	"else " \
	160	"unzip $kernel_addr_load $kernel_addr_r; " \
	161	"fi && " \
9d0c2ceb	162	LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
99b85170 MY	163	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
	164	"setexpr kernel_size_div4 $kernel_size / 4 && " \
	165	"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
c0df1faf MY	166	"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
	167	"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
	168	"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
	169	"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
	170	"setexpr fdt_size_div4 $fdt_size / 4 && " \
	171	"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
cd5d9565	172	"run boot_common\0" \
99b85170	173	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
421376ae MY	174	"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
421376ae MY	175	"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
cd5d9565	176	"run boot_common\0" \
99b85170	177	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
e037db0c MY	178	"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
e037db0c MY	179	"tftpboot $fdt_addr_r $fdt_file &&" \
d566f754	180	"run boot_common\0" \
99b85170	181	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
d566f754 MY	182	"tftpboot $fdt_addr_r $fdt_file &&" \
d566f754 MY	183	"setenv ramdisk_addr_r - &&" \
cd5d9565	184	"run boot_common\0"
421376ae MY	185	#endif
	186
	187	#define CONFIG_EXTRA_ENV_SETTINGS \
	188	"netdev=eth0\0" \
c0df1faf	189	"initrd_high=0xffffffffffffffff\0" \
90a6e929	190	"nor_base=0x42000000\0" \
61a4f5bd	191	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
b7b43036	192	"tftpboot $tmp_addr $second_image && " \
c0efc314	193	"setexpr tmp_addr $nor_base + 0x70000 && " \
b7b43036	194	"tftpboot $tmp_addr $third_image\0" \
c231c436 MY	195	"emmcupdate=mmcsetn &&" \
c231c436 MY	196	"mmc partconf $mmc_first_dev 0 1 1 &&" \
b7b43036	197	"tftpboot $second_image && " \
c0efc314	198	"mmc write $loadaddr 0 100 && " \
b7b43036	199	"tftpboot $third_image && " \
c0efc314	200	"mmc write $loadaddr 100 700\0" \
421376ae	201	"nandupdate=nand erase 0 0x00100000 &&" \
b7b43036	202	"tftpboot $second_image && " \
c0efc314	203	"nand write $loadaddr 0 0x00020000 && " \
b7b43036	204	"tftpboot $third_image && " \
c0efc314	205	"nand write $loadaddr 0x00020000 0x000e0000\0" \
8d3064d9 MY	206	"usbupdate=usb start &&" \
	207	"tftpboot $second_image && " \
	208	"usb write $loadaddr 0 100 && " \
	209	"tftpboot $third_image && " \
	210	"usb write $loadaddr 100 700\0" \
b7b43036	211	BOOT_IMAGES \
421376ae	212	LINUXBOOT_ENV_SETTINGS
5894ca00	213
17bd4a21 MY	214	#define CONFIG_SYS_BOOTMAPSZ 0x20000000
17bd4a21 MY	215
cf88affa	216	#define CONFIG_SYS_SDRAM_BASE 0x80000000
3e9952be	217	#define CONFIG_NR_DRAM_BANKS 3
23869698 MY	218	/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
23869698 MY	219	#define CONFIG_SYS_MEM_TOP_HIDE 64
5894ca00	220
3e0cfaa0 MY	221	#define CONFIG_PANIC_HANG
	222
	223	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
	224
	225	/* only for SPL */
00aa453e	226	#if defined(CONFIG_ARCH_UNIPHIER_LD4) \|\| \
ea65c980	227	defined(CONFIG_ARCH_UNIPHIER_SLD8)
f5d0b9b2	228	#define CONFIG_SPL_TEXT_BASE 0x00040000
323d1f9d	229	#else
f5d0b9b2 MY	230	#define CONFIG_SPL_TEXT_BASE 0x00100000
	231	#endif
	232
755c7d9a	233	#define CONFIG_SPL_STACK (0x00100000)
a286039b	234
5894ca00	235	#define CONFIG_SPL_FRAMEWORK
5894ca00	236
c0efc314	237	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
cbbc2d80	238
d085ecd6	239	/* subtract sizeof(struct image_header) */
c0efc314	240	#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40)
5894ca00	241
d085ecd6	242	#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
6a3cffe8	243	#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
86c3345a	244	#define CONFIG_SPL_MAX_SIZE 0x10000
9d0c2ceb	245	#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
6a3cffe8	246
c0efc314 MY	247	#define CONFIG_SPL_PAD_TO 0x20000
c0efc314 MY	248
5894ca00	249	#endif /* __CONFIG_UNIPHIER_COMMON_H__ */