[J-u-boot.git] / include / configs / imx8mq_evk.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2018 NXP
 */

#ifndef __IMX8M_EVK_H
#define __IMX8M_EVK_H

#include <linux/sizes.h>
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>

#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1

#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_WATCHDOG_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK		0x187FF0
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR      0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
#define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000

/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR		0x182000
/* For RAW image gives a error info not panic */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE

#undef CONFIG_DM_MMC
#undef CONFIG_DM_PMIC
#undef CONFIG_DM_PMIC_PFUZE100

#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif

#define CONFIG_REMAKE_ELF

/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME                 "FEC"

#define CONFIG_FEC_MXC
#define CONFIG_FEC_XCV_TYPE             RGMII
#define CONFIG_FEC_MXC_PHYADDR          0
#define FEC_QUIRK_ENET_MAC

#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE			0x30BE0000
#endif

#define CONFIG_MFG_ENV_SETTINGS \
	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
		"rdinit=/linuxrc " \
		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
		"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
		"g_mass_storage.iSerialNumber=\"\" "\
		"clk_ignore_unused "\
		"\0" \
	"initrd_addr=0x43800000\0" \
	"initrd_high=0xffffffff\0" \
	"bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS		\
	CONFIG_MFG_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=Image\0" \
	"console=ttymxc0,115200\0" \
	"fdt_addr=0x43000000\0"			\
	"fdt_high=0xffffffffffffffff\0"		\
	"boot_fdt=try\0" \
	"fdt_file=imx8mq-evk.dtb\0" \
	"initrd_addr=0x43800000\0"		\
	"initrd_high=0xffffffffffffffff\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"booti ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"echo WARN: Cannot load the DT; " \
			"fi; " \
		"else " \
			"echo wait for boot; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console} " \
		"root=/dev/nfs " \
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs;  " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${loadaddr} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"booti ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"echo WARN: Cannot load the DT; " \
			"fi; " \
		"else " \
			"booti; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else booti ${loadaddr} - ${fdt_addr}; fi"

/* Link Definitions */
#define CONFIG_LOADADDR			0x40480000

#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR

#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE        0x80000
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)

#define CONFIG_SYS_SDRAM_BASE           0x40000000
#define PHYS_SDRAM                      0x40000000
#define PHYS_SDRAM_SIZE			0xC0000000 /* 3GB DDR */

#define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR

/* Monitor Command Prompt */
#undef CONFIG_SYS_PROMPT
#define CONFIG_SYS_PROMPT		"u-boot=> "
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_CBSIZE		1024
#define CONFIG_SYS_MAXARGS		64
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_IMX_BOOTAUX

#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_SYS_FSL_ESDHC_ADDR       0

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#define CONFIG_MXC_GPIO

/* I2C Configs */
#define CONFIG_SYS_I2C_SPEED		  100000

#define CONFIG_OF_SYSTEM_SETUP

#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_PMIC
#endif

#endif
Commit	Line	Data
86ac7a9a PF	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	/*
	3	* Copyright 2018 NXP
	4	*/
	5
	6	#ifndef __IMX8M_EVK_H
	7	#define __IMX8M_EVK_H
	8
	9	#include <linux/sizes.h>
1af3c7f4	10	#include <linux/stringify.h>
86ac7a9a PF	11	#include <asm/arch/imx-regs.h>
86ac7a9a PF	12
86ac7a9a PF	13	#define CONFIG_SPL_MAX_SIZE (124 * 1024)
	14	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	15	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
	16	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
	17	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	18
	19	#ifdef CONFIG_SPL_BUILD
	20	/#define CONFIG_ENABLE_DDR_TRAINING_DEBUG/
	21	#define CONFIG_SPL_WATCHDOG_SUPPORT
	22	#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
	23	#define CONFIG_SPL_POWER_SUPPORT
	24	#define CONFIG_SPL_I2C_SUPPORT
	25	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
	26	#define CONFIG_SPL_STACK 0x187FF0
	27	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	28	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	29	#define CONFIG_SPL_GPIO_SUPPORT
	30	#define CONFIG_SPL_MMC_SUPPORT
	31	#define CONFIG_SPL_BSS_START_ADDR 0x00180000
	32	#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
	33	#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
	34	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
	35	#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
86ac7a9a PF	36
	37	/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
	38	#define CONFIG_MALLOC_F_ADDR 0x182000
	39	/* For RAW image gives a error info not panic */
	40	#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
	41
	42	#undef CONFIG_DM_MMC
	43	#undef CONFIG_DM_PMIC
	44	#undef CONFIG_DM_PMIC_PFUZE100
	45
	46	#define CONFIG_SYS_I2C
	47	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	48	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	49	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
	50
	51	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	52
	53	#define CONFIG_POWER
	54	#define CONFIG_POWER_I2C
	55	#define CONFIG_POWER_PFUZE100
	56	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
	57	#endif
	58
	59	#define CONFIG_REMAKE_ELF
	60
86ac7a9a PF	61	/* ENET Config */
	62	/* ENET1 */
	63	#if defined(CONFIG_CMD_NET)
86ac7a9a PF	64	#define CONFIG_MII
	65	#define CONFIG_ETHPRIME "FEC"
	66
	67	#define CONFIG_FEC_MXC
	68	#define CONFIG_FEC_XCV_TYPE RGMII
	69	#define CONFIG_FEC_MXC_PHYADDR 0
	70	#define FEC_QUIRK_ENET_MAC
	71
	72	#define CONFIG_PHY_GIGE
	73	#define IMX_FEC_BASE 0x30BE0000
86ac7a9a PF	74	#endif
	75
	76	#define CONFIG_MFG_ENV_SETTINGS \
	77	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
	78	"rdinit=/linuxrc " \
	79	"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
	80	"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
	81	"g_mass_storage.iSerialNumber=\"\" "\
	82	"clk_ignore_unused "\
	83	"\0" \
	84	"initrd_addr=0x43800000\0" \
	85	"initrd_high=0xffffffff\0" \
	86	"bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
	87	/* Initial environment variables */
	88	#define CONFIG_EXTRA_ENV_SETTINGS \
	89	CONFIG_MFG_ENV_SETTINGS \
	90	"script=boot.scr\0" \
	91	"image=Image\0" \
502f3ca0	92	"console=ttymxc0,115200\0" \
86ac7a9a PF	93	"fdt_addr=0x43000000\0" \
	94	"fdt_high=0xffffffffffffffff\0" \
	95	"boot_fdt=try\0" \
05737f35	96	"fdt_file=imx8mq-evk.dtb\0" \
86ac7a9a PF	97	"initrd_addr=0x43800000\0" \
	98	"initrd_high=0xffffffffffffffff\0" \
	99	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	100	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	101	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	102	"mmcautodetect=yes\0" \
	103	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
	104	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	105	"bootscript=echo Running bootscript from mmc ...; " \
	106	"source\0" \
	107	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	108	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	109	"mmcboot=echo Booting from mmc ...; " \
	110	"run mmcargs; " \
	111	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	112	"if run loadfdt; then " \
	113	"booti ${loadaddr} - ${fdt_addr}; " \
	114	"else " \
	115	"echo WARN: Cannot load the DT; " \
	116	"fi; " \
	117	"else " \
	118	"echo wait for boot; " \
	119	"fi;\0" \
	120	"netargs=setenv bootargs console=${console} " \
	121	"root=/dev/nfs " \
	122	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	123	"netboot=echo Booting from net ...; " \
	124	"run netargs; " \
	125	"if test ${ip_dyn} = yes; then " \
	126	"setenv get_cmd dhcp; " \
	127	"else " \
	128	"setenv get_cmd tftp; " \
	129	"fi; " \
	130	"${get_cmd} ${loadaddr} ${image}; " \
	131	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	132	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	133	"booti ${loadaddr} - ${fdt_addr}; " \
	134	"else " \
	135	"echo WARN: Cannot load the DT; " \
	136	"fi; " \
	137	"else " \
	138	"booti; " \
	139	"fi;\0"
	140
	141	#define CONFIG_BOOTCOMMAND \
	142	"mmc dev ${mmcdev}; if mmc rescan; then " \
	143	"if run loadbootscript; then " \
	144	"run bootscript; " \
	145	"else " \
	146	"if run loadimage; then " \
	147	"run mmcboot; " \
	148	"else run netboot; " \
	149	"fi; " \
	150	"fi; " \
	151	"else booti ${loadaddr} - ${fdt_addr}; fi"
	152
	153	/* Link Definitions */
	154	#define CONFIG_LOADADDR 0x40480000
	155
	156	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	157
	158	#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
	159	#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
	160	#define CONFIG_SYS_INIT_SP_OFFSET \
161	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
162	#define CONFIG_SYS_INIT_SP_ADDR \
163	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
164
165	#define CONFIG_ENV_OVERWRITE
86ac7a9a PF	166	#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
	167	#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
	168
	169	/* Size of malloc() pool */
	170	#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
	171
	172	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	173	#define PHYS_SDRAM 0x40000000
	174	#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
	175
86ac7a9a PF	176	#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
	177
	178	/* Monitor Command Prompt */
	179	#undef CONFIG_SYS_PROMPT
	180	#define CONFIG_SYS_PROMPT "u-boot=> "
	181	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	182	#define CONFIG_SYS_CBSIZE 1024
	183	#define CONFIG_SYS_MAXARGS 64
	184	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	185	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	186	sizeof(CONFIG_SYS_PROMPT) + 16)
	187
	188	#define CONFIG_IMX_BOOTAUX
	189
86ac7a9a PF	190	#define CONFIG_SYS_FSL_USDHC_NUM 2
	191	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	192
86ac7a9a PF	193	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	194
	195	#define CONFIG_MXC_GPIO
	196
86ac7a9a PF	197	/* I2C Configs */
	198	#define CONFIG_SYS_I2C_SPEED 100000
	199
	200	#define CONFIG_OF_SYSTEM_SETUP
	201
	202	#ifndef CONFIG_SPL_BUILD
	203	#define CONFIG_DM_PMIC
	204	#endif
	205
	206	#endif