]>
Commit | Line | Data |
---|---|---|
fe8c2806 | 1 | /* |
4707fb50 | 2 | * (C) Copyright 2000-2006 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
7def6b34 | 38 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
39 | #include <ide.h> |
40 | #endif | |
7def6b34 | 41 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
42 | #include <scsi.h> |
43 | #endif | |
7def6b34 | 44 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
45 | #include <kgdb.h> |
46 | #endif | |
47 | #ifdef CONFIG_STATUS_LED | |
48 | #include <status_led.h> | |
49 | #endif | |
50 | #include <net.h> | |
281e00a3 | 51 | #include <serial.h> |
fe8c2806 | 52 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 53 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
54 | #include <commproc.h> |
55 | #endif | |
7aa78614 | 56 | #endif |
fe8c2806 WD |
57 | #include <version.h> |
58 | #if defined(CONFIG_BAB7xx) | |
59 | #include <w83c553f.h> | |
60 | #endif | |
61 | #include <dtt.h> | |
62 | #if defined(CONFIG_POST) | |
63 | #include <post.h> | |
64 | #endif | |
56f94be3 WD |
65 | #if defined(CONFIG_LOGBUFFER) |
66 | #include <logbuff.h> | |
67 | #endif | |
42d1f039 WD |
68 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
69 | #include <asm/cache.h> | |
70 | #endif | |
1c43771b WD |
71 | #ifdef CONFIG_PS2KBD |
72 | #include <keyboard.h> | |
73 | #endif | |
fe8c2806 | 74 | |
fa230445 HS |
75 | #ifdef CFG_UPDATE_FLASH_SIZE |
76 | extern int update_flash_size (int flash_size); | |
77 | #endif | |
78 | ||
9045f33c | 79 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
80 | extern void sc3_read_eeprom(void); |
81 | #endif | |
82 | ||
7def6b34 | 83 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
84 | void doc_init (void); |
85 | #endif | |
86 | #if defined(CONFIG_HARD_I2C) || \ | |
87 | defined(CONFIG_SOFT_I2C) | |
88 | #include <i2c.h> | |
89 | #endif | |
7def6b34 | 90 | #if defined(CONFIG_CMD_NAND) |
bedc4970 SR |
91 | void nand_init (void); |
92 | #endif | |
fe8c2806 WD |
93 | |
94 | static char *failed = "*** failed ***\n"; | |
95 | ||
17d704eb | 96 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 97 | extern flash_info_t flash_info[]; |
17d704eb | 98 | #endif |
fe8c2806 | 99 | |
ca43ba18 HS |
100 | #if defined(CONFIG_START_IDE) |
101 | extern int board_start_ide(void); | |
102 | #endif | |
fe8c2806 | 103 | #include <environment.h> |
d87080b7 | 104 | |
bce84c4d | 105 | DECLARE_GLOBAL_DATA_PTR; |
fe8c2806 | 106 | |
7e780369 WD |
107 | #if defined(CFG_ENV_IS_EMBEDDED) |
108 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
109 | #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \ | |
04a85b3b | 110 | (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ |
7e780369 | 111 | defined(CFG_ENV_IS_IN_NVRAM) |
fe8c2806 WD |
112 | #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE) |
113 | #else | |
114 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
115 | #endif | |
116 | ||
3b57fe0a WD |
117 | extern ulong __init_end; |
118 | extern ulong _end; | |
3b57fe0a WD |
119 | ulong monitor_flash_len; |
120 | ||
7def6b34 | 121 | #if defined(CONFIG_CMD_BEDBUG) |
8bde7f77 WD |
122 | #include <bedbug/type.h> |
123 | #endif | |
124 | ||
fe8c2806 WD |
125 | /* |
126 | * Begin and End of memory area for malloc(), and current "brk" | |
127 | */ | |
128 | static ulong mem_malloc_start = 0; | |
129 | static ulong mem_malloc_end = 0; | |
130 | static ulong mem_malloc_brk = 0; | |
131 | ||
132 | /************************************************************************ | |
133 | * Utilities * | |
134 | ************************************************************************ | |
135 | */ | |
136 | ||
137 | /* | |
138 | * The Malloc area is immediately below the monitor copy in DRAM | |
139 | */ | |
140 | static void mem_malloc_init (void) | |
141 | { | |
e9514751 SR |
142 | #if !defined(CONFIG_RELOC_FIXUP_WORKS) |
143 | mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off; | |
144 | #endif | |
145 | mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN; | |
fe8c2806 WD |
146 | mem_malloc_brk = mem_malloc_start; |
147 | ||
148 | memset ((void *) mem_malloc_start, | |
149 | 0, | |
150 | mem_malloc_end - mem_malloc_start); | |
151 | } | |
152 | ||
153 | void *sbrk (ptrdiff_t increment) | |
154 | { | |
155 | ulong old = mem_malloc_brk; | |
156 | ulong new = old + increment; | |
157 | ||
158 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
159 | return (NULL); | |
160 | } | |
161 | mem_malloc_brk = new; | |
162 | return ((void *) old); | |
163 | } | |
164 | ||
165 | char *strmhz (char *buf, long hz) | |
166 | { | |
167 | long l, n; | |
168 | long m; | |
169 | ||
170 | n = hz / 1000000L; | |
171 | l = sprintf (buf, "%ld", n); | |
172 | m = (hz % 1000000L) / 1000L; | |
173 | if (m != 0) | |
174 | sprintf (buf + l, ".%03ld", m); | |
175 | return (buf); | |
176 | } | |
177 | ||
fe8c2806 WD |
178 | /* |
179 | * All attempts to come up with a "common" initialization sequence | |
180 | * that works for all boards and architectures failed: some of the | |
181 | * requirements are just _too_ different. To get rid of the resulting | |
182 | * mess of board dependend #ifdef'ed code we now make the whole | |
183 | * initialization sequence configurable to the user. | |
184 | * | |
185 | * The requirements for any new initalization function is simple: it | |
186 | * receives a pointer to the "global data" structure as it's only | |
187 | * argument, and returns an integer return code, where 0 means | |
188 | * "continue" and != 0 means "fatal error, hang the system". | |
189 | */ | |
190 | typedef int (init_fnc_t) (void); | |
191 | ||
192 | /************************************************************************ | |
193 | * Init Utilities * | |
194 | ************************************************************************ | |
195 | * Some of this code should be moved into the core functions, | |
196 | * but let's get it working (again) first... | |
197 | */ | |
198 | ||
199 | static int init_baudrate (void) | |
200 | { | |
77ddac94 | 201 | char tmp[64]; /* long enough for environment variables */ |
fe8c2806 WD |
202 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); |
203 | ||
204 | gd->baudrate = (i > 0) | |
205 | ? (int) simple_strtoul (tmp, NULL, 10) | |
206 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
207 | return (0); |
208 | } | |
209 | ||
210 | /***********************************************************************/ | |
211 | ||
79f240f7 KP |
212 | void __board_add_ram_info(int use_default) |
213 | { | |
214 | /* please define platform specific board_add_ram_info() */ | |
215 | } | |
216 | void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); | |
217 | ||
d96f41e0 | 218 | |
fe8c2806 WD |
219 | static int init_func_ram (void) |
220 | { | |
fe8c2806 WD |
221 | #ifdef CONFIG_BOARD_TYPES |
222 | int board_type = gd->board_type; | |
223 | #else | |
224 | int board_type = 0; /* use dummy arg */ | |
225 | #endif | |
226 | puts ("DRAM: "); | |
227 | ||
228 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
d96f41e0 | 229 | print_size (gd->ram_size, ""); |
d96f41e0 | 230 | board_add_ram_info(0); |
d96f41e0 | 231 | putc('\n'); |
fe8c2806 WD |
232 | return (0); |
233 | } | |
234 | puts (failed); | |
235 | return (1); | |
236 | } | |
237 | ||
238 | /***********************************************************************/ | |
239 | ||
240 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
241 | static int init_func_i2c (void) | |
242 | { | |
243 | puts ("I2C: "); | |
244 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); | |
245 | puts ("ready\n"); | |
246 | return (0); | |
247 | } | |
248 | #endif | |
249 | ||
250 | /***********************************************************************/ | |
251 | ||
252 | #if defined(CONFIG_WATCHDOG) | |
253 | static int init_func_watchdog_init (void) | |
254 | { | |
255 | puts (" Watchdog enabled\n"); | |
256 | WATCHDOG_RESET (); | |
257 | return (0); | |
258 | } | |
259 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
260 | ||
261 | static int init_func_watchdog_reset (void) | |
262 | { | |
263 | WATCHDOG_RESET (); | |
264 | return (0); | |
265 | } | |
266 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
267 | #else | |
268 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
269 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
270 | #endif /* CONFIG_WATCHDOG */ | |
271 | ||
272 | /************************************************************************ | |
273 | * Initialization sequence * | |
274 | ************************************************************************ | |
275 | */ | |
276 | ||
277 | init_fnc_t *init_sequence[] = { | |
278 | ||
c837dcb1 WD |
279 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
280 | board_early_init_f, | |
fe8c2806 | 281 | #endif |
c178d3da | 282 | |
66ca92a5 | 283 | #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
fe8c2806 | 284 | get_clocks, /* get CPU and bus clocks (etc.) */ |
090eb735 MK |
285 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ |
286 | && !defined(CONFIG_TQM885D) | |
e9132ea9 WD |
287 | adjust_sdram_tbs_8xx, |
288 | #endif | |
fe8c2806 | 289 | init_timebase, |
c178d3da | 290 | #endif |
fe8c2806 | 291 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 292 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
293 | dpram_init, |
294 | #endif | |
7aa78614 | 295 | #endif |
fe8c2806 WD |
296 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
297 | board_postclk_init, | |
298 | #endif | |
299 | env_init, | |
66ca92a5 | 300 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
c178d3da WD |
301 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ |
302 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
303 | init_timebase, | |
304 | #endif | |
fe8c2806 WD |
305 | init_baudrate, |
306 | serial_init, | |
307 | console_init_f, | |
308 | display_options, | |
309 | #if defined(CONFIG_8260) | |
310 | prt_8260_rsr, | |
311 | prt_8260_clks, | |
312 | #endif /* CONFIG_8260 */ | |
9be39a67 DL |
313 | #if defined(CONFIG_MPC83XX) |
314 | prt_83xx_rsr, | |
315 | #endif | |
fe8c2806 | 316 | checkcpu, |
cbd8a35c | 317 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 318 | prt_mpc5xxx_clks, |
cbd8a35c | 319 | #endif /* CONFIG_MPC5xxx */ |
983fda83 WD |
320 | #if defined(CONFIG_MPC8220) |
321 | prt_mpc8220_clks, | |
322 | #endif | |
fe8c2806 WD |
323 | checkboard, |
324 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 325 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
326 | misc_init_f, |
327 | #endif | |
328 | INIT_FUNC_WATCHDOG_RESET | |
329 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
330 | init_func_i2c, | |
331 | #endif | |
332 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ | |
333 | dtt_init, | |
4532cb69 WD |
334 | #endif |
335 | #ifdef CONFIG_POST | |
336 | post_init_f, | |
fe8c2806 WD |
337 | #endif |
338 | INIT_FUNC_WATCHDOG_RESET | |
339 | init_func_ram, | |
340 | #if defined(CFG_DRAM_TEST) | |
341 | testdram, | |
342 | #endif /* CFG_DRAM_TEST */ | |
343 | INIT_FUNC_WATCHDOG_RESET | |
344 | ||
345 | NULL, /* Terminate this list */ | |
346 | }; | |
347 | ||
348 | /************************************************************************ | |
349 | * | |
350 | * This is the first part of the initialization sequence that is | |
351 | * implemented in C, but still running from ROM. | |
352 | * | |
353 | * The main purpose is to provide a (serial) console interface as | |
354 | * soon as possible (so we can see any error messages), and to | |
355 | * initialize the RAM so that we can relocate the monitor code to | |
356 | * RAM. | |
357 | * | |
358 | * Be aware of the restrictions: global data is read-only, BSS is not | |
359 | * initialized, and stack space is limited to a few kB. | |
360 | * | |
361 | ************************************************************************ | |
362 | */ | |
363 | ||
364 | void board_init_f (ulong bootflag) | |
365 | { | |
fe8c2806 WD |
366 | bd_t *bd; |
367 | ulong len, addr, addr_sp; | |
7bc5ee07 | 368 | ulong *s; |
fe8c2806 WD |
369 | gd_t *id; |
370 | init_fnc_t **init_fnc_ptr; | |
371 | #ifdef CONFIG_PRAM | |
372 | int i; | |
373 | ulong reg; | |
374 | uchar tmp[64]; /* long enough for environment variables */ | |
375 | #endif | |
376 | ||
377 | /* Pointer is writable since we allocated a register for it */ | |
378 | gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
93f6a677 WD |
379 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
380 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 381 | |
9be39a67 | 382 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) |
fe8c2806 WD |
383 | /* Clear initial global data */ |
384 | memset ((void *) gd, 0, sizeof (gd_t)); | |
385 | #endif | |
386 | ||
387 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
388 | if ((*init_fnc_ptr) () != 0) { | |
389 | hang (); | |
390 | } | |
391 | } | |
392 | ||
393 | /* | |
394 | * Now that we have DRAM mapped and working, we can | |
395 | * relocate the code and continue running from DRAM. | |
396 | * | |
397 | * Reserve memory at end of RAM for (top down in that order): | |
8bde7f77 | 398 | * - kernel log buffer |
fe8c2806 WD |
399 | * - protected RAM |
400 | * - LCD framebuffer | |
401 | * - monitor code | |
402 | * - board info struct | |
403 | */ | |
3b57fe0a | 404 | len = (ulong)&_end - CFG_MONITOR_BASE; |
fe8c2806 WD |
405 | |
406 | #ifndef CONFIG_VERY_BIG_RAM | |
407 | addr = CFG_SDRAM_BASE + gd->ram_size; | |
408 | #else | |
409 | /* only allow stack below 256M */ | |
410 | addr = CFG_SDRAM_BASE + | |
411 | (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size; | |
412 | #endif | |
413 | ||
228f29ac WD |
414 | #ifdef CONFIG_LOGBUFFER |
415 | /* reserve kernel log buffer */ | |
416 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 417 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac WD |
418 | #endif |
419 | ||
fe8c2806 WD |
420 | #ifdef CONFIG_PRAM |
421 | /* | |
422 | * reserve protected RAM | |
423 | */ | |
77ddac94 WD |
424 | i = getenv_r ("pram", (char *)tmp, sizeof (tmp)); |
425 | reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM; | |
fe8c2806 | 426 | addr -= (reg << 10); /* size is in kB */ |
9d2b18a0 | 427 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
428 | #endif /* CONFIG_PRAM */ |
429 | ||
430 | /* round down to next 4 kB limit */ | |
431 | addr &= ~(4096 - 1); | |
9d2b18a0 | 432 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
433 | |
434 | #ifdef CONFIG_LCD | |
435 | /* reserve memory for LCD display (always full pages) */ | |
436 | addr = lcd_setmem (addr); | |
437 | gd->fb_base = addr; | |
438 | #endif /* CONFIG_LCD */ | |
439 | ||
440 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
441 | /* reserve memory for video display (always full pages) */ | |
442 | addr = video_setmem (addr); | |
443 | gd->fb_base = addr; | |
444 | #endif /* CONFIG_VIDEO */ | |
445 | ||
446 | /* | |
447 | * reserve memory for U-Boot code, data & bss | |
682011ff | 448 | * round down to next 4 kB limit |
fe8c2806 WD |
449 | */ |
450 | addr -= len; | |
682011ff | 451 | addr &= ~(4096 - 1); |
7d314992 WD |
452 | #ifdef CONFIG_E500 |
453 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
454 | addr &= ~(65536 - 1); | |
455 | #endif | |
fe8c2806 | 456 | |
9d2b18a0 | 457 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 458 | |
c7de829c WD |
459 | #ifdef CONFIG_AMIGAONEG3SE |
460 | gd->relocaddr = addr; | |
461 | #endif | |
462 | ||
fe8c2806 WD |
463 | /* |
464 | * reserve memory for malloc() arena | |
465 | */ | |
466 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 467 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 468 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
469 | |
470 | /* | |
471 | * (permanently) allocate a Board Info struct | |
472 | * and a permanent copy of the "global" data | |
473 | */ | |
474 | addr_sp -= sizeof (bd_t); | |
475 | bd = (bd_t *) addr_sp; | |
476 | gd->bd = bd; | |
9d2b18a0 | 477 | debug ("Reserving %d Bytes for Board Info at: %08lx\n", |
fe8c2806 | 478 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
479 | addr_sp -= sizeof (gd_t); |
480 | id = (gd_t *) addr_sp; | |
9d2b18a0 | 481 | debug ("Reserving %d Bytes for Global Data at: %08lx\n", |
fe8c2806 | 482 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
483 | |
484 | /* | |
485 | * Finally, we set up a new (bigger) stack. | |
486 | * | |
487 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
488 | * Clear initial stack frame | |
489 | */ | |
490 | addr_sp -= 16; | |
491 | addr_sp &= ~0xF; | |
7bc5ee07 WD |
492 | s = (ulong *)addr_sp; |
493 | *s-- = 0; | |
494 | *s-- = 0; | |
495 | addr_sp = (ulong)s; | |
9d2b18a0 | 496 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
497 | |
498 | /* | |
499 | * Save local variables to board info struct | |
500 | */ | |
501 | ||
c837dcb1 | 502 | bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
503 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
504 | ||
505 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
506 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
507 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
983fda83 WD |
508 | #elif defined CONFIG_MPC8220 |
509 | bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */ | |
510 | bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 511 | #else |
c837dcb1 WD |
512 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
513 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
514 | #endif |
515 | ||
42d1f039 | 516 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
debb7354 | 517 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
fe8c2806 WD |
518 | bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */ |
519 | #endif | |
cbd8a35c | 520 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
521 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ |
522 | #endif | |
f046ccd1 | 523 | #if defined(CONFIG_MPC83XX) |
d239d74b | 524 | bd->bi_immrbar = CFG_IMMR; |
f046ccd1 | 525 | #endif |
983fda83 WD |
526 | #if defined(CONFIG_MPC8220) |
527 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ | |
528 | bd->bi_inpfreq = gd->inp_clk; | |
529 | bd->bi_pcifreq = gd->pci_clk; | |
530 | bd->bi_vcofreq = gd->vco_clk; | |
531 | bd->bi_pevfreq = gd->pev_clk; | |
532 | bd->bi_flbfreq = gd->flb_clk; | |
533 | ||
dd520bf3 WD |
534 | /* store bootparam to sram (backward compatible), here? */ |
535 | { | |
536 | u32 *sram = (u32 *)CFG_SRAM_BASE; | |
537 | *sram++ = gd->ram_size; | |
538 | *sram++ = gd->bus_clk; | |
539 | *sram++ = gd->inp_clk; | |
540 | *sram++ = gd->cpu_clk; | |
541 | *sram++ = gd->vco_clk; | |
542 | *sram++ = gd->flb_clk; | |
543 | *sram++ = 0xb8c3ba11; /* boot signature */ | |
544 | } | |
983fda83 | 545 | #endif |
fe8c2806 WD |
546 | |
547 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
548 | ||
549 | WATCHDOG_RESET (); | |
550 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
551 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
9c4c5ae3 | 552 | #if defined(CONFIG_CPM2) |
fe8c2806 WD |
553 | bd->bi_cpmfreq = gd->cpm_clk; |
554 | bd->bi_brgfreq = gd->brg_clk; | |
555 | bd->bi_sccfreq = gd->scc_clk; | |
556 | bd->bi_vco = gd->vco_out; | |
9c4c5ae3 | 557 | #endif /* CONFIG_CPM2 */ |
281ff9a4 | 558 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 559 | bd->bi_ipsfreq = gd->ips_clk; |
281ff9a4 | 560 | #endif /* CONFIG_MPC512X */ |
cbd8a35c | 561 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
562 | bd->bi_ipbfreq = gd->ipb_clk; |
563 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 564 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
565 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
566 | ||
567 | #ifdef CFG_EXTBDINFO | |
77ddac94 WD |
568 | strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); |
569 | strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
fe8c2806 WD |
570 | |
571 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
572 | bd->bi_plb_busfreq = gd->bus_clk; | |
343c48bd SR |
573 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ |
574 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ | |
575 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) | |
fe8c2806 | 576 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 577 | bd->bi_opbfreq = get_OPB_freq (); |
028ab6b5 WD |
578 | #elif defined(CONFIG_XILINX_ML300) |
579 | bd->bi_pci_busfreq = get_PCI_freq (); | |
fe8c2806 WD |
580 | #endif |
581 | #endif | |
582 | ||
9d2b18a0 | 583 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
584 | |
585 | WATCHDOG_RESET (); | |
586 | ||
587 | #ifdef CONFIG_POST | |
588 | post_bootmode_init(); | |
6dff5529 | 589 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
590 | #endif |
591 | ||
592 | WATCHDOG_RESET(); | |
593 | ||
27b207fd | 594 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
595 | |
596 | relocate_code (addr_sp, id, addr); | |
597 | ||
598 | /* NOTREACHED - relocate_code() does not return */ | |
599 | } | |
600 | ||
fe8c2806 WD |
601 | /************************************************************************ |
602 | * | |
603 | * This is the next part if the initialization sequence: we are now | |
604 | * running from RAM and have a "normal" C environment, i. e. global | |
605 | * data can be written, BSS has been cleared, the stack size in not | |
606 | * that critical any more, etc. | |
607 | * | |
608 | ************************************************************************ | |
609 | */ | |
fe8c2806 WD |
610 | void board_init_r (gd_t *id, ulong dest_addr) |
611 | { | |
fe8c2806 WD |
612 | cmd_tbl_t *cmdtp; |
613 | char *s, *e; | |
614 | bd_t *bd; | |
615 | int i; | |
616 | extern void malloc_bin_reloc (void); | |
617 | #ifndef CFG_ENV_IS_NOWHERE | |
618 | extern char * env_name_spec; | |
619 | #endif | |
620 | ||
621 | #ifndef CFG_NO_FLASH | |
622 | ulong flash_size; | |
623 | #endif | |
624 | ||
625 | gd = id; /* initialize RAM version of global data */ | |
626 | bd = gd->bd; | |
627 | ||
628 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
f82b3b63 GL |
629 | |
630 | #if defined(CONFIG_RELOC_FIXUP_WORKS) | |
631 | gd->reloc_off = 0; | |
e9514751 | 632 | mem_malloc_end = dest_addr; |
f82b3b63 | 633 | #else |
bb105f24 | 634 | gd->reloc_off = dest_addr - CFG_MONITOR_BASE; |
f82b3b63 | 635 | #endif |
bb105f24 MB |
636 | |
637 | #ifdef CONFIG_SERIAL_MULTI | |
638 | serial_initialize(); | |
639 | #endif | |
fe8c2806 | 640 | |
9d2b18a0 | 641 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
642 | |
643 | WATCHDOG_RESET (); | |
644 | ||
c837dcb1 WD |
645 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
646 | board_early_init_r (); | |
647 | #endif | |
648 | ||
3b57fe0a | 649 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 WD |
650 | |
651 | /* | |
652 | * We have to relocate the command table manually | |
653 | */ | |
8bde7f77 | 654 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 655 | ulong addr; |
fe8c2806 WD |
656 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
657 | #if 0 | |
658 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
659 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
660 | #endif | |
661 | cmdtp->cmd = | |
662 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
663 | ||
664 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
665 | cmdtp->name = (char *)addr; | |
666 | ||
667 | if (cmdtp->usage) { | |
668 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
669 | cmdtp->usage = (char *)addr; | |
670 | } | |
671 | #ifdef CFG_LONGHELP | |
672 | if (cmdtp->help) { | |
673 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
674 | cmdtp->help = (char *)addr; | |
675 | } | |
676 | #endif | |
677 | } | |
678 | /* there are some other pointer constants we must deal with */ | |
679 | #ifndef CFG_ENV_IS_NOWHERE | |
680 | env_name_spec += gd->reloc_off; | |
681 | #endif | |
682 | ||
683 | WATCHDOG_RESET (); | |
684 | ||
56f94be3 | 685 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 686 | logbuff_init_ptrs (); |
56f94be3 | 687 | #endif |
fe8c2806 | 688 | #ifdef CONFIG_POST |
228f29ac | 689 | post_output_backlog (); |
fe8c2806 WD |
690 | post_reloc (); |
691 | #endif | |
692 | ||
693 | WATCHDOG_RESET(); | |
694 | ||
2688e2f9 KG |
695 | #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \ |
696 | defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX) | |
fe8c2806 WD |
697 | icache_enable (); /* it's time to enable the instruction cache */ |
698 | #endif | |
699 | ||
1c8f6d8f | 700 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 701 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
702 | #endif |
703 | ||
3bac3513 | 704 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 705 | /* |
3bac3513 WD |
706 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
707 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
708 | * bridge there. | |
fe8c2806 WD |
709 | */ |
710 | pci_init (); | |
3bac3513 WD |
711 | #endif |
712 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
713 | /* |
714 | * Initialise the ISA bridge | |
715 | */ | |
716 | initialise_w83c553f (); | |
717 | #endif | |
718 | ||
719 | asm ("sync ; isync"); | |
720 | ||
721 | /* | |
722 | * Setup trap handlers | |
723 | */ | |
724 | trap_init (dest_addr); | |
725 | ||
726 | #if !defined(CFG_NO_FLASH) | |
727 | puts ("FLASH: "); | |
728 | ||
729 | if ((flash_size = flash_init ()) > 0) { | |
0cb61d7d | 730 | # ifdef CFG_FLASH_CHECKSUM |
fe8c2806 WD |
731 | print_size (flash_size, ""); |
732 | /* | |
733 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
734 | * | |
735 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
736 | */ | |
737 | s = getenv ("flashchecksum"); | |
738 | if (s && (*s == 'y')) { | |
739 | printf (" CRC: %08lX", | |
7e780369 WD |
740 | crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size) |
741 | ); | |
fe8c2806 WD |
742 | } |
743 | putc ('\n'); | |
0cb61d7d | 744 | # else /* !CFG_FLASH_CHECKSUM */ |
fe8c2806 | 745 | print_size (flash_size, "\n"); |
0cb61d7d | 746 | # endif /* CFG_FLASH_CHECKSUM */ |
fe8c2806 WD |
747 | } else { |
748 | puts (failed); | |
749 | hang (); | |
750 | } | |
751 | ||
752 | bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */ | |
753 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ | |
fa230445 HS |
754 | |
755 | #if defined(CFG_UPDATE_FLASH_SIZE) | |
756 | /* Make a update of the Memctrl. */ | |
757 | update_flash_size (flash_size); | |
758 | #endif | |
759 | ||
760 | ||
7e780369 WD |
761 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
762 | /* flash mapped at end of memory map */ | |
763 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
0cb61d7d | 764 | # elif CFG_MONITOR_BASE == CFG_FLASH_BASE |
3b57fe0a | 765 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 766 | # else |
fe8c2806 | 767 | bd->bi_flashoffset = 0; |
0cb61d7d WD |
768 | # endif |
769 | #else /* CFG_NO_FLASH */ | |
fe8c2806 WD |
770 | |
771 | bd->bi_flashsize = 0; | |
772 | bd->bi_flashstart = 0; | |
773 | bd->bi_flashoffset = 0; | |
774 | #endif /* !CFG_NO_FLASH */ | |
775 | ||
776 | WATCHDOG_RESET (); | |
777 | ||
778 | /* initialize higher level parts of CPU like time base and timers */ | |
779 | cpu_init_r (); | |
780 | ||
781 | WATCHDOG_RESET (); | |
782 | ||
783 | /* initialize malloc() area */ | |
784 | mem_malloc_init (); | |
785 | malloc_bin_reloc (); | |
786 | ||
787 | #ifdef CONFIG_SPI | |
788 | # if !defined(CFG_ENV_IS_IN_EEPROM) | |
789 | spi_init_f (); | |
790 | # endif | |
791 | spi_init_r (); | |
792 | #endif | |
793 | ||
7def6b34 | 794 | #if defined(CONFIG_CMD_NAND) |
887e2ec9 SR |
795 | WATCHDOG_RESET (); |
796 | puts ("NAND: "); | |
797 | nand_init(); /* go init the NAND */ | |
798 | #endif | |
799 | ||
fe8c2806 WD |
800 | /* relocate environment function pointers etc. */ |
801 | env_relocate (); | |
802 | ||
803 | /* | |
804 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
805 | * We do this here, where we have "normal" access to the |
806 | * environment; we used to do this still running from ROM, | |
807 | * where had to use getenv_r(), which can be pretty slow when | |
808 | * the environment is in EEPROM. | |
fe8c2806 | 809 | */ |
7abf0c58 WD |
810 | |
811 | #if defined(CFG_EXTBDINFO) | |
812 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) | |
813 | #if defined(CONFIG_I2CFAST) | |
814 | /* | |
815 | * set bi_iic_fast for linux taking environment variable | |
816 | * "i2cfast" into account | |
817 | */ | |
818 | { | |
819 | char *s = getenv ("i2cfast"); | |
820 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
821 | bd->bi_iic_fast[0] = 1; | |
822 | bd->bi_iic_fast[1] = 1; | |
823 | } else { | |
824 | bd->bi_iic_fast[0] = 0; | |
825 | bd->bi_iic_fast[1] = 0; | |
826 | } | |
827 | } | |
828 | #else | |
829 | bd->bi_iic_fast[0] = 0; | |
830 | bd->bi_iic_fast[1] = 0; | |
831 | #endif /* CONFIG_I2CFAST */ | |
832 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
833 | #endif /* CFG_EXTBDINFO */ | |
834 | ||
9045f33c | 835 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
836 | sc3_read_eeprom(); |
837 | #endif | |
fe8c2806 | 838 | s = getenv ("ethaddr"); |
4707fb50 BS |
839 | #if defined (CONFIG_MBX) || \ |
840 | defined (CONFIG_RPXCLASSIC) || \ | |
841 | defined(CONFIG_IAD210) || \ | |
842 | defined(CONFIG_V38B) | |
fe8c2806 WD |
843 | if (s == NULL) |
844 | board_get_enetaddr (bd->bi_enetaddr); | |
845 | else | |
846 | #endif | |
847 | for (i = 0; i < 6; ++i) { | |
848 | bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
849 | if (s) | |
850 | s = (*e) ? e + 1 : e; | |
851 | } | |
852 | #ifdef CONFIG_HERMES | |
853 | if ((gd->board_type >> 16) == 2) | |
854 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
855 | else | |
856 | bd->bi_ethspeed = 0xFFFF; | |
857 | #endif | |
858 | ||
859 | #ifdef CONFIG_NX823 | |
860 | load_sernum_ethaddr (); | |
861 | #endif | |
862 | ||
e2ffd59b | 863 | #ifdef CONFIG_HAS_ETH1 |
fe8c2806 WD |
864 | /* handle the 2nd ethernet address */ |
865 | ||
866 | s = getenv ("eth1addr"); | |
867 | ||
868 | for (i = 0; i < 6; ++i) { | |
869 | bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
870 | if (s) | |
871 | s = (*e) ? e + 1 : e; | |
872 | } | |
873 | #endif | |
e2ffd59b | 874 | #ifdef CONFIG_HAS_ETH2 |
fe8c2806 WD |
875 | /* handle the 3rd ethernet address */ |
876 | ||
877 | s = getenv ("eth2addr"); | |
b79316f2 | 878 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
879 | if (s == NULL) |
880 | board_get_enetaddr(bd->bi_enet2addr); | |
881 | else | |
882 | #endif | |
fe8c2806 WD |
883 | for (i = 0; i < 6; ++i) { |
884 | bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
885 | if (s) | |
886 | s = (*e) ? e + 1 : e; | |
887 | } | |
888 | #endif | |
889 | ||
e2ffd59b | 890 | #ifdef CONFIG_HAS_ETH3 |
ba56f625 WD |
891 | /* handle 4th ethernet address */ |
892 | s = getenv("eth3addr"); | |
b79316f2 | 893 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
894 | if (s == NULL) |
895 | board_get_enetaddr(bd->bi_enet3addr); | |
896 | else | |
897 | #endif | |
898 | for (i = 0; i < 6; ++i) { | |
899 | bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
900 | if (s) | |
901 | s = (*e) ? e + 1 : e; | |
902 | } | |
903 | #endif | |
fe8c2806 | 904 | |
bea3f28d HW |
905 | #ifdef CFG_ID_EEPROM |
906 | mac_read_from_eeprom(); | |
907 | #endif | |
908 | ||
fe8c2806 | 909 | #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \ |
fa230445 | 910 | defined(CONFIG_TQM8272) || \ |
566a494f HS |
911 | defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \ |
912 | defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP) | |
fe8c2806 WD |
913 | load_sernum_ethaddr (); |
914 | #endif | |
915 | /* IP Address */ | |
916 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
917 | ||
918 | WATCHDOG_RESET (); | |
919 | ||
979bdbc7 | 920 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
921 | /* |
922 | * Do pci configuration | |
923 | */ | |
924 | pci_init (); | |
925 | #endif | |
926 | ||
927 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
928 | /* Initialize devices */ | |
929 | devices_init (); | |
930 | ||
27b207fd WD |
931 | /* Initialize the jump table for applications */ |
932 | jumptable_init (); | |
fe8c2806 | 933 | |
500856eb RJ |
934 | #if defined(CONFIG_API) |
935 | /* Initialize API */ | |
936 | api_init (); | |
937 | #endif | |
938 | ||
fe8c2806 WD |
939 | /* Initialize the console (after the relocation and devices init) */ |
940 | console_init_r (); | |
fe8c2806 WD |
941 | |
942 | #if defined(CONFIG_CCM) || \ | |
943 | defined(CONFIG_COGENT) || \ | |
944 | defined(CONFIG_CPCI405) || \ | |
945 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 946 | defined(CONFIG_KUP4K) || \ |
0608e04d | 947 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
948 | defined(CONFIG_LWMON) || \ |
949 | defined(CONFIG_PCU_E) || \ | |
9045f33c | 950 | defined(CONFIG_SC3) || \ |
fe8c2806 WD |
951 | defined(CONFIG_W7O) || \ |
952 | defined(CONFIG_MISC_INIT_R) | |
953 | /* miscellaneous platform dependent initialisations */ | |
954 | misc_init_r (); | |
955 | #endif | |
956 | ||
957 | #ifdef CONFIG_HERMES | |
958 | if (bd->bi_ethspeed != 0xFFFF) | |
959 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
960 | #endif | |
961 | ||
7def6b34 | 962 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
963 | WATCHDOG_RESET (); |
964 | puts ("KGDB: "); | |
965 | kgdb_init (); | |
966 | #endif | |
967 | ||
9d2b18a0 | 968 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
969 | |
970 | /* | |
971 | * Enable Interrupts | |
972 | */ | |
973 | interrupt_init (); | |
974 | ||
975 | /* Must happen after interrupts are initialized since | |
976 | * an irq handler gets installed | |
977 | */ | |
42dfe7a1 | 978 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
979 | serial_buffered_init(); |
980 | #endif | |
981 | ||
566a494f | 982 | #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
fe8c2806 WD |
983 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); |
984 | #endif | |
985 | ||
986 | udelay (20); | |
987 | ||
988 | set_timer (0); | |
989 | ||
fe8c2806 WD |
990 | /* Initialize from environment */ |
991 | if ((s = getenv ("loadaddr")) != NULL) { | |
992 | load_addr = simple_strtoul (s, NULL, 16); | |
993 | } | |
7def6b34 | 994 | #if defined(CONFIG_CMD_NET) |
fe8c2806 WD |
995 | if ((s = getenv ("bootfile")) != NULL) { |
996 | copy_filename (BootFile, s, sizeof (BootFile)); | |
997 | } | |
b3aff0cb | 998 | #endif |
fe8c2806 WD |
999 | |
1000 | WATCHDOG_RESET (); | |
1001 | ||
7def6b34 | 1002 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
1003 | WATCHDOG_RESET (); |
1004 | puts ("SCSI: "); | |
1005 | scsi_init (); | |
1006 | #endif | |
1007 | ||
7def6b34 | 1008 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
1009 | WATCHDOG_RESET (); |
1010 | puts ("DOC: "); | |
1011 | doc_init (); | |
1012 | #endif | |
1013 | ||
7def6b34 | 1014 | #if defined(CONFIG_CMD_NET) |
63ff004c | 1015 | #if defined(CONFIG_NET_MULTI) |
fe8c2806 WD |
1016 | WATCHDOG_RESET (); |
1017 | puts ("Net: "); | |
63ff004c | 1018 | #endif |
fe8c2806 WD |
1019 | eth_initialize (bd); |
1020 | #endif | |
1021 | ||
7def6b34 | 1022 | #if defined(CONFIG_CMD_NET) && ( \ |
63ff004c MB |
1023 | defined(CONFIG_CCM) || \ |
1024 | defined(CONFIG_ELPT860) || \ | |
1025 | defined(CONFIG_EP8260) || \ | |
1026 | defined(CONFIG_IP860) || \ | |
1027 | defined(CONFIG_IVML24) || \ | |
1028 | defined(CONFIG_IVMS8) || \ | |
1029 | defined(CONFIG_MPC8260ADS) || \ | |
1030 | defined(CONFIG_MPC8266ADS) || \ | |
1031 | defined(CONFIG_MPC8560ADS) || \ | |
1032 | defined(CONFIG_PCU_E) || \ | |
1033 | defined(CONFIG_RPXSUPER) || \ | |
1034 | defined(CONFIG_STXGP3) || \ | |
1035 | defined(CONFIG_SPD823TS) || \ | |
1036 | defined(CONFIG_RESET_PHY_R) ) | |
1037 | ||
1038 | WATCHDOG_RESET (); | |
1039 | debug ("Reset Ethernet PHY\n"); | |
1040 | reset_phy (); | |
1041 | #endif | |
1042 | ||
fe8c2806 | 1043 | #ifdef CONFIG_POST |
6dff5529 | 1044 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
1045 | #endif |
1046 | ||
7def6b34 JL |
1047 | #if defined(CONFIG_CMD_PCMCIA) \ |
1048 | && !defined(CONFIG_CMD_IDE) | |
fe8c2806 WD |
1049 | WATCHDOG_RESET (); |
1050 | puts ("PCMCIA:"); | |
1051 | pcmcia_init (); | |
1052 | #endif | |
1053 | ||
7def6b34 | 1054 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
1055 | WATCHDOG_RESET (); |
1056 | # ifdef CONFIG_IDE_8xx_PCCARD | |
1057 | puts ("PCMCIA:"); | |
1058 | # else | |
1059 | puts ("IDE: "); | |
1060 | #endif | |
ca43ba18 HS |
1061 | #if defined(CONFIG_START_IDE) |
1062 | if (board_start_ide()) | |
1063 | ide_init (); | |
1064 | #else | |
fe8c2806 | 1065 | ide_init (); |
ca43ba18 | 1066 | #endif |
b3aff0cb | 1067 | #endif |
fe8c2806 WD |
1068 | |
1069 | #ifdef CONFIG_LAST_STAGE_INIT | |
1070 | WATCHDOG_RESET (); | |
1071 | /* | |
1072 | * Some parts can be only initialized if all others (like | |
1073 | * Interrupts) are up and running (i.e. the PC-style ISA | |
1074 | * keyboard). | |
1075 | */ | |
1076 | last_stage_init (); | |
1077 | #endif | |
1078 | ||
7def6b34 | 1079 | #if defined(CONFIG_CMD_BEDBUG) |
fe8c2806 WD |
1080 | WATCHDOG_RESET (); |
1081 | bedbug_init (); | |
1082 | #endif | |
1083 | ||
228f29ac | 1084 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
1085 | /* |
1086 | * Export available size of memory for Linux, | |
1087 | * taking into account the protected RAM at top of memory | |
1088 | */ | |
1089 | { | |
1090 | ulong pram; | |
fe8c2806 | 1091 | uchar memsz[32]; |
228f29ac WD |
1092 | #ifdef CONFIG_PRAM |
1093 | char *s; | |
fe8c2806 WD |
1094 | |
1095 | if ((s = getenv ("pram")) != NULL) { | |
1096 | pram = simple_strtoul (s, NULL, 10); | |
1097 | } else { | |
1098 | pram = CONFIG_PRAM; | |
1099 | } | |
228f29ac WD |
1100 | #else |
1101 | pram=0; | |
1102 | #endif | |
1103 | #ifdef CONFIG_LOGBUFFER | |
1104 | /* Also take the logbuffer into account (pram is in kB) */ | |
1105 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
1106 | #endif | |
77ddac94 WD |
1107 | sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1108 | setenv ("mem", (char *)memsz); | |
fe8c2806 WD |
1109 | } |
1110 | #endif | |
1111 | ||
1c43771b WD |
1112 | #ifdef CONFIG_PS2KBD |
1113 | puts ("PS/2: "); | |
1114 | kbd_init(); | |
1115 | #endif | |
1116 | ||
4532cb69 WD |
1117 | #ifdef CONFIG_MODEM_SUPPORT |
1118 | { | |
1119 | extern int do_mdm_init; | |
1120 | do_mdm_init = gd->do_mdm_init; | |
1121 | } | |
1122 | #endif | |
1123 | ||
fe8c2806 WD |
1124 | /* Initialization complete - start the monitor */ |
1125 | ||
1126 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1127 | for (;;) { | |
1128 | WATCHDOG_RESET (); | |
1129 | main_loop (); | |
1130 | } | |
1131 | ||
1132 | /* NOTREACHED - no way out of command loop except booting */ | |
1133 | } | |
1134 | ||
1135 | void hang (void) | |
1136 | { | |
1137 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a | 1138 | show_boot_progress(-30); |
fe8c2806 WD |
1139 | for (;;); |
1140 | } | |
1141 | ||
4532cb69 WD |
1142 | #ifdef CONFIG_MODEM_SUPPORT |
1143 | /* called from main loop (common/main.c) */ | |
77ddac94 WD |
1144 | /* 'inline' - We have to do it fast */ |
1145 | static inline void mdm_readline(char *buf, int bufsiz) | |
1146 | { | |
1147 | char c; | |
1148 | char *p; | |
1149 | int n; | |
1150 | ||
1151 | n = 0; | |
1152 | p = buf; | |
1153 | for(;;) { | |
1154 | c = serial_getc(); | |
1155 | ||
1156 | /* dbg("(%c)", c); */ | |
1157 | ||
1158 | switch(c) { | |
1159 | case '\r': | |
1160 | break; | |
1161 | case '\n': | |
1162 | *p = '\0'; | |
1163 | return; | |
1164 | ||
1165 | default: | |
1166 | if(n++ > bufsiz) { | |
1167 | *p = '\0'; | |
1168 | return; /* sanity check */ | |
1169 | } | |
1170 | *p = c; | |
1171 | p++; | |
1172 | break; | |
1173 | } | |
1174 | } | |
1175 | } | |
1176 | ||
4532cb69 WD |
1177 | extern void dbg(const char *fmt, ...); |
1178 | int mdm_init (void) | |
1179 | { | |
1180 | char env_str[16]; | |
1181 | char *init_str; | |
1182 | int i; | |
1183 | extern char console_buffer[]; | |
4532cb69 WD |
1184 | extern void enable_putc(void); |
1185 | extern int hwflow_onoff(int); | |
1186 | ||
1187 | enable_putc(); /* enable serial_putc() */ | |
1188 | ||
1189 | #ifdef CONFIG_HWFLOW | |
1190 | init_str = getenv("mdm_flow_control"); | |
1191 | if (init_str && (strcmp(init_str, "rts/cts") == 0)) | |
1192 | hwflow_onoff (1); | |
1193 | else | |
1194 | hwflow_onoff(-1); | |
1195 | #endif | |
1196 | ||
1197 | for (i = 1;;i++) { | |
1198 | sprintf(env_str, "mdm_init%d", i); | |
1199 | if ((init_str = getenv(env_str)) != NULL) { | |
1200 | serial_puts(init_str); | |
1201 | serial_puts("\n"); | |
1202 | for(;;) { | |
1203 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1204 | dbg("ini%d: [%s]", i, console_buffer); | |
1205 | ||
1206 | if ((strcmp(console_buffer, "OK") == 0) || | |
1207 | (strcmp(console_buffer, "ERROR") == 0)) { | |
1208 | dbg("ini%d: cmd done", i); | |
1209 | break; | |
1210 | } else /* in case we are originating call ... */ | |
1211 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1212 | dbg("ini%d: connect", i); | |
1213 | return 0; | |
1214 | } | |
1215 | } | |
1216 | } else | |
1217 | break; /* no init string - stop modem init */ | |
1218 | ||
1219 | udelay(100000); | |
1220 | } | |
1221 | ||
1222 | udelay(100000); | |
1223 | ||
1224 | /* final stage - wait for connect */ | |
1225 | for(;i > 1;) { /* if 'i' > 1 - wait for connection | |
1226 | message from modem */ | |
1227 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1228 | dbg("ini_f: [%s]", console_buffer); | |
1229 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1230 | dbg("ini_f: connected"); | |
1231 | return 0; | |
1232 | } | |
1233 | } | |
1234 | ||
1235 | return 0; | |
1236 | } | |
1237 | ||
4532cb69 WD |
1238 | #endif |
1239 | ||
fe8c2806 WD |
1240 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1241 | /* | |
1242 | * Pointer to initial global data area | |
1243 | * | |
1244 | * Here we initialize it. | |
1245 | */ | |
1246 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1247 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
1248 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
1249 | #endif /* 0 */ | |
1250 | ||
1251 | /************************************************************************/ |