[J-u-boot.git] / drivers / serial / serial_pic32.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (c) 2015 Paul Thacker <[email protected]>
 *
 */
#include <clk.h>
#include <dm.h>
#include <malloc.h>
#include <serial.h>
#include <wait_bit.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
#include <mach/pic32.h>
#include <dt-bindings/clock/microchip,clock.h>

DECLARE_GLOBAL_DATA_PTR;

/* UART Control Registers */
#define U_MOD		0x00
#define U_MODCLR	(U_MOD + _CLR_OFFSET)
#define U_MODSET	(U_MOD + _SET_OFFSET)
#define U_STA		0x10
#define U_STACLR	(U_STA + _CLR_OFFSET)
#define U_STASET	(U_STA + _SET_OFFSET)
#define U_TXR		0x20
#define U_RXR		0x30
#define U_BRG		0x40

/* U_MOD bits */
#define UART_ENABLE		BIT(15)

/* U_STA bits */
#define UART_RX_ENABLE		BIT(12)
#define UART_TX_BRK		BIT(11)
#define UART_TX_ENABLE		BIT(10)
#define UART_TX_FULL		BIT(9)
#define UART_TX_EMPTY		BIT(8)
#define UART_RX_OVER		BIT(1)
#define UART_RX_DATA_AVAIL	BIT(0)

struct pic32_uart_priv {
	void __iomem *base;
	ulong uartclk;
};

/*
 * Initialize the serial port with the given baudrate.
 * The settings are always 8 data bits, no parity, 1 stop bit, no start bits.
 */
static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
{
	u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);

	/* wait for TX FIFO to empty */
	wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
			  true, CONFIG_SYS_HZ, false);

	/* send break */
	writel(UART_TX_BRK, base + U_STASET);

	/* disable and clear mode */
	writel(0, base + U_MOD);
	writel(0, base + U_STA);

	/* set baud rate generator */
	writel(div - 1, base + U_BRG);

	/* enable the UART for TX and RX */
	writel(UART_TX_ENABLE | UART_RX_ENABLE, base + U_STASET);

	/* enable the UART */
	writel(UART_ENABLE, base + U_MODSET);
	return 0;
}

/* Check whether any char pending in RX fifo */
static int pic32_uart_pending_input(void __iomem *base)
{
	/* check if rx buffer overrun error has occurred */
	if (readl(base + U_STA) & UART_RX_OVER) {
		readl(base + U_RXR);

		/* clear overrun error to keep receiving */
		writel(UART_RX_OVER, base + U_STACLR);
	}

	/* In PIC32 there is no way to know number of outstanding
	 * chars in rx-fifo. Only it can be known whether there is any.
	 */
	return readl(base + U_STA) & UART_RX_DATA_AVAIL;
}

static int pic32_uart_pending(struct udevice *dev, bool input)
{
	struct pic32_uart_priv *priv = dev_get_priv(dev);

	if (input)
		return pic32_uart_pending_input(priv->base);

	return !(readl(priv->base + U_STA) & UART_TX_EMPTY);
}

static int pic32_uart_setbrg(struct udevice *dev, int baudrate)
{
	struct pic32_uart_priv *priv = dev_get_priv(dev);

	return pic32_serial_init(priv->base, priv->uartclk, baudrate);
}

static int pic32_uart_putc(struct udevice *dev, const char ch)
{
	struct pic32_uart_priv *priv = dev_get_priv(dev);

	/* Check if Tx FIFO is full */
	if (readl(priv->base + U_STA) & UART_TX_FULL)
		return -EAGAIN;

	/* pump the char to tx buffer */
	writel(ch, priv->base + U_TXR);

	return 0;
}

static int pic32_uart_getc(struct udevice *dev)
{
	struct pic32_uart_priv *priv = dev_get_priv(dev);

	/* return error if RX fifo is empty */
	if (!pic32_uart_pending_input(priv->base))
		return -EAGAIN;

	/* read the character from rx buffer */
	return readl(priv->base + U_RXR) & 0xff;
}

static int pic32_uart_probe(struct udevice *dev)
{
	struct pic32_uart_priv *priv = dev_get_priv(dev);
	struct clk clk;
	fdt_addr_t addr;
	fdt_size_t size;
	int ret;

	/* get address */
	addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
				    &size);
	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

	priv->base = ioremap(addr, size);

	/* get clock rate */
	ret = clk_get_by_index(dev, 0, &clk);
	if (ret < 0)
		return ret;
	priv->uartclk = clk_get_rate(&clk);

	/* initialize serial */
	return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
}

static const struct dm_serial_ops pic32_uart_ops = {
	.putc		= pic32_uart_putc,
	.pending	= pic32_uart_pending,
	.getc		= pic32_uart_getc,
	.setbrg		= pic32_uart_setbrg,
};

static const struct udevice_id pic32_uart_ids[] = {
	{ .compatible = "microchip,pic32mzda-uart" },
	{}
};

U_BOOT_DRIVER(pic32_serial) = {
	.name		= "pic32-uart",
	.id		= UCLASS_SERIAL,
	.of_match	= pic32_uart_ids,
	.probe		= pic32_uart_probe,
	.ops		= &pic32_uart_ops,
	.priv_auto	= sizeof(struct pic32_uart_priv),
};

#ifdef CONFIG_DEBUG_UART_PIC32
#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);

	pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
}

static inline void _debug_uart_putc(int ch)
{
	writel(ch, CONFIG_VAL(DEBUG_UART_BASE) + U_TXR);
}

DEBUG_UART_FUNCS
#endif
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
9e160ee8 PT	2	/*
	3	* (c) 2015 Paul Thacker <[email protected]>
	4	*
9e160ee8	5	*/
9e160ee8 PT	6	#include <clk.h>
9e160ee8 PT	7	#include <dm.h>
336d4615	8	#include <malloc.h>
9e160ee8 PT	9	#include <serial.h>
9e160ee8 PT	10	#include <wait_bit.h>
401d1c4f	11	#include <asm/global_data.h>
cd93d625	12	#include <linux/bitops.h>
9e160ee8 PT	13	#include <mach/pic32.h>
	14	#include <dt-bindings/clock/microchip,clock.h>
	15
	16	DECLARE_GLOBAL_DATA_PTR;
	17
	18	/* UART Control Registers */
	19	#define U_MOD 0x00
	20	#define U_MODCLR (U_MOD + _CLR_OFFSET)
	21	#define U_MODSET (U_MOD + _SET_OFFSET)
	22	#define U_STA 0x10
	23	#define U_STACLR (U_STA + _CLR_OFFSET)
	24	#define U_STASET (U_STA + _SET_OFFSET)
	25	#define U_TXR 0x20
	26	#define U_RXR 0x30
	27	#define U_BRG 0x40
	28
	29	/* U_MOD bits */
	30	#define UART_ENABLE BIT(15)
	31
	32	/* U_STA bits */
	33	#define UART_RX_ENABLE BIT(12)
	34	#define UART_TX_BRK BIT(11)
	35	#define UART_TX_ENABLE BIT(10)
	36	#define UART_TX_FULL BIT(9)
	37	#define UART_TX_EMPTY BIT(8)
	38	#define UART_RX_OVER BIT(1)
	39	#define UART_RX_DATA_AVAIL BIT(0)
	40
	41	struct pic32_uart_priv {
	42	void __iomem *base;
	43	ulong uartclk;
	44	};
	45
	46	/*
	47	* Initialize the serial port with the given baudrate.
	48	* The settings are always 8 data bits, no parity, 1 stop bit, no start bits.
	49	*/
	50	static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
	51	{
	52	u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);
	53
	54	/* wait for TX FIFO to empty */
48263504 ÁFR	55	wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
48263504 ÁFR	56	true, CONFIG_SYS_HZ, false);
9e160ee8 PT	57
	58	/* send break */
	59	writel(UART_TX_BRK, base + U_STASET);
	60
	61	/* disable and clear mode */
	62	writel(0, base + U_MOD);
	63	writel(0, base + U_STA);
	64
	65	/* set baud rate generator */
	66	writel(div - 1, base + U_BRG);
	67
	68	/* enable the UART for TX and RX */
	69	writel(UART_TX_ENABLE \| UART_RX_ENABLE, base + U_STASET);
	70
	71	/* enable the UART */
	72	writel(UART_ENABLE, base + U_MODSET);
	73	return 0;
	74	}
	75
	76	/* Check whether any char pending in RX fifo */
	77	static int pic32_uart_pending_input(void __iomem *base)
	78	{
	79	/* check if rx buffer overrun error has occurred */
	80	if (readl(base + U_STA) & UART_RX_OVER) {
	81	readl(base + U_RXR);
	82
	83	/* clear overrun error to keep receiving */
	84	writel(UART_RX_OVER, base + U_STACLR);
	85	}
	86
	87	/* In PIC32 there is no way to know number of outstanding
	88	* chars in rx-fifo. Only it can be known whether there is any.
	89	*/
	90	return readl(base + U_STA) & UART_RX_DATA_AVAIL;
	91	}
	92
	93	static int pic32_uart_pending(struct udevice *dev, bool input)
	94	{
	95	struct pic32_uart_priv *priv = dev_get_priv(dev);
	96
	97	if (input)
	98	return pic32_uart_pending_input(priv->base);
	99
	100	return !(readl(priv->base + U_STA) & UART_TX_EMPTY);
	101	}
	102
	103	static int pic32_uart_setbrg(struct udevice *dev, int baudrate)
	104	{
	105	struct pic32_uart_priv *priv = dev_get_priv(dev);
	106
	107	return pic32_serial_init(priv->base, priv->uartclk, baudrate);
	108	}
	109
	110	static int pic32_uart_putc(struct udevice *dev, const char ch)
	111	{
	112	struct pic32_uart_priv *priv = dev_get_priv(dev);
	113
	114	/* Check if Tx FIFO is full */
	115	if (readl(priv->base + U_STA) & UART_TX_FULL)
	116	return -EAGAIN;
	117
	118	/* pump the char to tx buffer */
	119	writel(ch, priv->base + U_TXR);
	120
121	return 0;
122	}
123
124	static int pic32_uart_getc(struct udevice *dev)
125	{
126	struct pic32_uart_priv *priv = dev_get_priv(dev);
127
128	/* return error if RX fifo is empty */
129	if (!pic32_uart_pending_input(priv->base))
130	return -EAGAIN;
131
132	/* read the character from rx buffer */
133	return readl(priv->base + U_RXR) & 0xff;
134	}
135
136	static int pic32_uart_probe(struct udevice *dev)
137	{
138	struct pic32_uart_priv *priv = dev_get_priv(dev);
135aa950	139	struct clk clk;
9e160ee8 PT	140	fdt_addr_t addr;
	141	fdt_size_t size;
	142	int ret;
	143
	144	/* get address */
e160f7d4 SG	145	addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
e160f7d4 SG	146	&size);
9e160ee8 PT	147	if (addr == FDT_ADDR_T_NONE)
	148	return -EINVAL;
	149
	150	priv->base = ioremap(addr, size);
	151
	152	/* get clock rate */
135aa950	153	ret = clk_get_by_index(dev, 0, &clk);
9e160ee8 PT	154	if (ret < 0)
9e160ee8 PT	155	return ret;
135aa950	156	priv->uartclk = clk_get_rate(&clk);
9e160ee8 PT	157
	158	/* initialize serial */
	159	return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
	160	}
	161
	162	static const struct dm_serial_ops pic32_uart_ops = {
	163	.putc = pic32_uart_putc,
	164	.pending = pic32_uart_pending,
	165	.getc = pic32_uart_getc,
	166	.setbrg = pic32_uart_setbrg,
	167	};
	168
	169	static const struct udevice_id pic32_uart_ids[] = {
	170	{ .compatible = "microchip,pic32mzda-uart" },
	171	{}
	172	};
	173
	174	U_BOOT_DRIVER(pic32_serial) = {
	175	.name = "pic32-uart",
	176	.id = UCLASS_SERIAL,
	177	.of_match = pic32_uart_ids,
	178	.probe = pic32_uart_probe,
	179	.ops = &pic32_uart_ops,
41575d8e	180	.priv_auto = sizeof(struct pic32_uart_priv),
9e160ee8 PT	181	};
	182
	183	#ifdef CONFIG_DEBUG_UART_PIC32
	184	#include <debug_uart.h>
	185
	186	static inline void _debug_uart_init(void)
	187	{
b62450cf	188	void __iomem base = (void __iomem )CONFIG_VAL(DEBUG_UART_BASE);
9e160ee8 PT	189
	190	pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
	191	}
	192
	193	static inline void _debug_uart_putc(int ch)
	194	{
b62450cf	195	writel(ch, CONFIG_VAL(DEBUG_UART_BASE) + U_TXR);
9e160ee8 PT	196	}
	197
	198	DEBUG_UART_FUNCS
	199	#endif