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b89e3d92 HZ |
1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
2 | /* | |
3 | * Copyright 2019 NXP | |
4 | * | |
5 | * PCIe Kernel DT fixup of DM U-Boot driver for Freescale PowerPC SoCs | |
6 | * Author: Hou Zhiqiang <[email protected]> | |
7 | */ | |
8 | ||
b89e3d92 HZ |
9 | #ifdef CONFIG_OF_BOARD_SETUP |
10 | #include <dm.h> | |
11 | #include <fdt_support.h> | |
12 | #include <asm/fsl_pci.h> | |
13 | #include <linux/libfdt.h> | |
14 | #include "pcie_fsl.h" | |
15 | ||
16 | static void ft_fsl_pcie_setup(void *blob, struct fsl_pcie *pcie) | |
17 | { | |
18 | struct pci_controller *hose = dev_get_uclass_priv(pcie->bus); | |
19 | fdt_addr_t regs_addr; | |
20 | int off; | |
21 | ||
22 | regs_addr = dev_read_addr(pcie->bus); | |
23 | off = fdt_node_offset_by_compat_reg(blob, FSL_PCIE_COMPAT, regs_addr); | |
24 | if (off < 0) { | |
25 | printf("%s: Fail to find PCIe node@0x%pa\n", | |
26 | FSL_PCIE_COMPAT, ®s_addr); | |
27 | return; | |
28 | } | |
29 | ||
30 | if (!hose || !pcie->enabled) | |
31 | fdt_del_node(blob, off); | |
32 | else | |
33 | fdt_pci_dma_ranges(blob, off, hose); | |
34 | } | |
35 | ||
36 | /* Fixup Kernel DT for PCIe */ | |
b75d8dc5 | 37 | void pci_of_setup(void *blob, struct bd_info *bd) |
b89e3d92 HZ |
38 | { |
39 | struct fsl_pcie *pcie; | |
40 | ||
41 | list_for_each_entry(pcie, &fsl_pcie_list, list) | |
42 | ft_fsl_pcie_setup(blob, pcie); | |
43 | } | |
44 | ||
45 | #else | |
b75d8dc5 | 46 | void pci_of_setup(void *blob, struct bd_info *bd) |
b89e3d92 HZ |
47 | { |
48 | } | |
49 | #endif |