[J-u-boot.git] / drivers / pci / pci_rom.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2014 Google, Inc
 *
 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
 *
 * Modifications are:
 * Copyright (C) 2003-2004 Linux Networx
 * (Written by Eric Biederman <[email protected]> for Linux Networx)
 * Copyright (C) 2003-2006 Ronald G. Minnich <[email protected]>
 * Copyright (C) 2004-2005 Li-Ta Lo <[email protected]>
 * Copyright (C) 2005-2006 Tyan
 * (Written by Yinghai Lu <[email protected]> for Tyan)
 * Copyright (C) 2005-2009 coresystems GmbH
 * (Written by Stefan Reinauer <[email protected]> for coresystems GmbH)
 *
 * PCI Bus Services, see include/linux/pci.h for further explanation.
 *
 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
 * David Mosberger-Tang
 *
 * Copyright 1997 -- 1999 Martin Mares <[email protected]>
 */

#define LOG_CATEGORY UCLASS_PCI

#include <bios_emul.h>
#include <bloblist.h>
#include <bootstage.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
#include <log.h>
#include <malloc.h>
#include <pci.h>
#include <pci_rom.h>
#include <spl.h>
#include <time.h>
#include <vesa.h>
#include <video.h>
#include <acpi/acpi_s3.h>
#include <asm/global_data.h>
#include <linux/screen_info.h>

DECLARE_GLOBAL_DATA_PTR;

__weak bool board_should_run_oprom(struct udevice *dev)
{
#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
	if (gd->arch.prev_sleep_state == ACPI_S3) {
		if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
			return true;
		else
			return false;
	}
#endif

	return true;
}

__weak bool board_should_load_oprom(struct udevice *dev)
{
	return true;
}

__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
{
	return vendev;
}

static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
{
	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
	struct pci_rom_header *rom_header;
	struct pci_rom_data *rom_data;
	u16 rom_vendor, rom_device;
	u32 rom_class;
	u32 vendev;
	u32 mapped_vendev;
	u32 rom_address;

	vendev = pplat->vendor << 16 | pplat->device;
	mapped_vendev = board_map_oprom_vendev(vendev);
	if (vendev != mapped_vendev)
		debug("Device ID mapped to %#08x\n", mapped_vendev);

#ifdef CONFIG_VGA_BIOS_ADDR
	rom_address = CONFIG_VGA_BIOS_ADDR;
#else

	dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
	if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
		debug("%s: rom_address=%x\n", __func__, rom_address);
		return -ENOENT;
	}
	rom_address &= PCI_ROM_ADDRESS_MASK;

	/* Enable expansion ROM address decoding. */
	dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
			      rom_address | PCI_ROM_ADDRESS_ENABLE);
#endif
	debug("Option ROM address %x\n", rom_address);
	rom_header = (struct pci_rom_header *)(unsigned long)rom_address;

	debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
	      le16_to_cpu(rom_header->signature),
	      rom_header->size * 512, le16_to_cpu(rom_header->data));

	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
		printf("Incorrect expansion ROM header signature %04x\n",
		       le16_to_cpu(rom_header->signature));
#ifndef CONFIG_VGA_BIOS_ADDR
		/* Disable expansion ROM address decoding */
		dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
#endif
		return -EINVAL;
	}

	rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
	rom_vendor = le16_to_cpu(rom_data->vendor);
	rom_device = le16_to_cpu(rom_data->device);

	debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
	      rom_vendor, rom_device);

	/* If the device id is mapped, a mismatch is expected */
	if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
	    (vendev == mapped_vendev)) {
		printf("ID mismatch: vendor ID %04x, device ID %04x\n",
		       rom_vendor, rom_device);
		/* Continue anyway */
	}

	rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
	debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
	      rom_class, rom_data->type);

	if (pplat->class != rom_class) {
		debug("Class Code mismatch ROM %06x, dev %06x\n",
		      rom_class, pplat->class);
	}
	*hdrp = rom_header;

	return 0;
}

/**
 * pci_rom_load() - Load a ROM image and return a pointer to it
 *
 * @rom_header:		Pointer to ROM image
 * @ram_headerp:	Returns a pointer to the image in RAM
 * @allocedp:		Returns true if @ram_headerp was allocated and needs
 *			to be freed
 * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
 * the error state. Even if this function returns an error, it may have
 * allocated memory.
 */
static int pci_rom_load(struct pci_rom_header *rom_header,
			struct pci_rom_header **ram_headerp, bool *allocedp)
{
	struct pci_rom_data *rom_data;
	unsigned int rom_size;
	unsigned int image_size = 0;
	void *target;

	*allocedp = false;
	do {
		/* Get next image, until we see an x86 version */
		rom_header = (struct pci_rom_header *)((void *)rom_header +
							    image_size);

		rom_data = (struct pci_rom_data *)((void *)rom_header +
				le16_to_cpu(rom_header->data));

		image_size = le16_to_cpu(rom_data->ilen) * 512;
	} while ((rom_data->type != 0) && (rom_data->indicator == 0));

	if (rom_data->type != 0)
		return -EACCES;

	rom_size = rom_header->size * 512;

#ifdef PCI_VGA_RAM_IMAGE_START
	target = (void *)PCI_VGA_RAM_IMAGE_START;
#else
	target = (void *)malloc(rom_size);
	if (!target)
		return -ENOMEM;
	*allocedp = true;
#endif
	if (target != rom_header) {
		ulong start = get_timer(0);

		debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
		      rom_header, target, rom_size);
		memcpy(target, rom_header, rom_size);
		if (memcmp(target, rom_header, rom_size)) {
			printf("VGA ROM copy failed\n");
			return -EFAULT;
		}
		debug("Copy took %lums\n", get_timer(start));
	}
	*ram_headerp = target;

	return 0;
}

struct vesa_state mode_info;

void setup_video(struct screen_info *screen_info)
{
	struct vesa_mode_info *vesa = &mode_info.vesa;

	/* Sanity test on VESA parameters */
	if (!vesa->x_resolution || !vesa->y_resolution)
		return;

	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;

	screen_info->lfb_width = vesa->x_resolution;
	screen_info->lfb_height = vesa->y_resolution;
	screen_info->lfb_depth = vesa->bits_per_pixel;
	screen_info->lfb_linelength = vesa->bytes_per_scanline;
	screen_info->lfb_base = vesa->phys_base_ptr;
	screen_info->lfb_size =
		ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
		      65536);
	screen_info->lfb_size >>= 16;
	screen_info->red_size = vesa->red_mask_size;
	screen_info->red_pos = vesa->red_mask_pos;
	screen_info->green_size = vesa->green_mask_size;
	screen_info->green_pos = vesa->green_mask_pos;
	screen_info->blue_size = vesa->blue_mask_size;
	screen_info->blue_pos = vesa->blue_mask_pos;
	screen_info->rsvd_size = vesa->reserved_mask_size;
	screen_info->rsvd_pos = vesa->reserved_mask_pos;
}

int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
			int exec_method)
{
	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
	struct pci_rom_header *rom = NULL, *ram = NULL;
	int vesa_mode = -1;
	bool emulate, alloced;
	int ret;

	/* Only execute VGA ROMs */
	if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
		debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
		      PCI_CLASS_DISPLAY_VGA);
		return -ENODEV;
	}

	if (!board_should_load_oprom(dev))
		return log_msg_ret("Should not load OPROM", -ENXIO);

	ret = pci_rom_probe(dev, &rom);
	if (ret)
		return log_msg_ret("pro", ret);

	ret = pci_rom_load(rom, &ram, &alloced);
	if (ret) {
		ret = log_msg_ret("ld", ret);
		goto err;
	}

	if (!board_should_run_oprom(dev)) {
		ret = log_msg_ret("run", -ENXIO);
		goto err;
	}

#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
		defined(CONFIG_FRAMEBUFFER_VESA_MODE)
	vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
#endif
	debug("Selected vesa mode 0x%x\n", vesa_mode);

	if (exec_method & PCI_ROM_USE_NATIVE) {
#ifdef CONFIG_X86
		emulate = false;
#else
		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
			printf("BIOS native execution is only available on x86\n");
			ret = -ENOSYS;
			goto err;
		}
		emulate = true;
#endif
	} else {
#ifdef CONFIG_BIOSEMU
		emulate = true;
#else
		if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
			printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
			ret = -ENOSYS;
			goto err;
		}
		emulate = false;
#endif
	}

	if (emulate) {
		if (CONFIG_IS_ENABLED(BIOSEMU)) {
			BE_VGAInfo *info;

			log_debug("Running video BIOS with emulator...");
			ret = biosemu_setup(dev, &info);
			if (ret)
				goto err;
			biosemu_set_interrupt_handler(0x15, int15_handler);
			ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
					  true, vesa_mode, &mode_info);
			log_debug("done\n");
			if (ret)
				goto err;
		}
	} else {
#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
		log_debug("Running video BIOS...");
		bios_set_interrupt_handler(0x15, int15_handler);

		bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
				&mode_info);
		log_debug("done\n");
#endif
	}
	debug("Final vesa mode %x\n", mode_info.video_mode);
	ret = 0;

err:
	if (alloced)
		free(ram);
	return ret;
}

int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
			  struct video_priv *uc_priv,
			  struct video_uc_plat *plat)
{
	if (!vesa->x_resolution)
		return log_msg_ret("No x resolution", -ENXIO);
	uc_priv->xsize = vesa->x_resolution;
	uc_priv->ysize = vesa->y_resolution;
	uc_priv->line_length = vesa->bytes_per_scanline;
	switch (vesa->bits_per_pixel) {
	case 32:
	case 24:
		uc_priv->bpix = VIDEO_BPP32;
		uc_priv->format = VIDEO_X8B8G8R8;
		break;
	case 16:
		uc_priv->bpix = VIDEO_BPP16;
		break;
	default:
		return -EPROTONOSUPPORT;
	}

	/* Use double buffering if enabled */
	if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
		plat->copy_base = fb;
	else
		plat->base = fb;
	log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
	plat->size = vesa->bytes_per_scanline * vesa->y_resolution;

	return 0;
}

int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
{
	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
	int ret;

	/* If we are running from EFI or coreboot, this can't work */
	if (!ll_boot_init()) {
		printf("Not available (previous bootloader prevents it)\n");
		return -EPERM;
	}

	/* In U-Boot proper, collect the information added by SPL (see below) */
	if (IS_ENABLED(CONFIG_SPL_VIDEO) && xpl_phase() > PHASE_SPL &&
	    CONFIG_IS_ENABLED(BLOBLIST)) {
		struct video_handoff *ho;

		ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
		if (!ho)
			return log_msg_ret("blf", -ENOENT);
		plat->base = ho->fb;
		plat->size = ho->size;
		uc_priv->xsize = ho->xsize;
		uc_priv->ysize = ho->ysize;
		uc_priv->line_length = ho->line_length;
		uc_priv->bpix = ho->bpix;
		uc_priv->format = ho->format;
	} else {
		bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
		ret = dm_pci_run_vga_bios(dev, int15_handler,
					  PCI_ROM_USE_NATIVE |
					  PCI_ROM_ALLOW_FALLBACK);
		bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
		if (ret) {
			debug("failed to run video BIOS: %d\n", ret);
			return ret;
		}

		ret = vesa_setup_video_priv(&mode_info.vesa,
					    mode_info.vesa.phys_base_ptr,
					    uc_priv, plat);
		if (ret) {
			if (ret == -ENFILE) {
				/*
				 * See video-uclass.c for how to set up reserved
				 * memory in your video driver
				 */
				log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
					dev->driver->name);
			}

			debug("No video mode configured\n");
			return ret;
		}
	}

	printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
	       mode_info.vesa.bits_per_pixel);

	/* In SPL, store the information for use by U-Boot proper */
	if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
		struct video_handoff *ho;

		ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
		if (!ho)
			return log_msg_ret("blc", -ENOMEM);

		ho->fb = plat->base;
		ho->size = plat->size;
		ho->xsize = uc_priv->xsize;
		ho->ysize = uc_priv->ysize;
		ho->line_length = uc_priv->line_length;
		ho->bpix = uc_priv->bpix;
		ho->format = uc_priv->format;
	}

	return 0;
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0
6854f87c SG	2	/*
	3	* Copyright (C) 2014 Google, Inc
	4	*
	5	* From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
	6	*
	7	* Modifications are:
	8	* Copyright (C) 2003-2004 Linux Networx
	9	* (Written by Eric Biederman <[email protected]> for Linux Networx)
	10	* Copyright (C) 2003-2006 Ronald G. Minnich <[email protected]>
	11	* Copyright (C) 2004-2005 Li-Ta Lo <[email protected]>
	12	* Copyright (C) 2005-2006 Tyan
	13	* (Written by Yinghai Lu <[email protected]> for Tyan)
	14	* Copyright (C) 2005-2009 coresystems GmbH
	15	* (Written by Stefan Reinauer <[email protected]> for coresystems GmbH)
	16	*
	17	* PCI Bus Services, see include/linux/pci.h for further explanation.
	18	*
	19	* Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
	20	* David Mosberger-Tang
	21	*
	22	* Copyright 1997 -- 1999 Martin Mares <[email protected]>
6854f87c SG	23	*/
6854f87c SG	24
0938767d SG	25	#define LOG_CATEGORY UCLASS_PCI
0938767d SG	26
6854f87c	27	#include <bios_emul.h>
03fe79c0	28	#include <bloblist.h>
52f24238	29	#include <bootstage.h>
3f4e1e8e	30	#include <dm.h>
6854f87c	31	#include <errno.h>
35a3f871	32	#include <init.h>
f7ae49fc	33	#include <log.h>
6854f87c SG	34	#include <malloc.h>
	35	#include <pci.h>
	36	#include <pci_rom.h>
03fe79c0	37	#include <spl.h>
03de305e	38	#include <time.h>
cafe8712	39	#include <vesa.h>
ee87ee82	40	#include <video.h>
3cabcf96	41	#include <acpi/acpi_s3.h>
401d1c4f	42	#include <asm/global_data.h>
a4520022	43	#include <linux/screen_info.h>
6854f87c	44
68769ebc	45	DECLARE_GLOBAL_DATA_PTR;
68769ebc	46
3f4e1e8e	47	__weak bool board_should_run_oprom(struct udevice *dev)
6854f87c	48	{
68769ebc BM	49	#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
	50	if (gd->arch.prev_sleep_state == ACPI_S3) {
	51	if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
	52	return true;
	53	else
	54	return false;
	55	}
	56	#endif
	57
6854f87c SG	58	return true;
	59	}
	60
f698baa9	61	__weak bool board_should_load_oprom(struct udevice *dev)
6854f87c	62	{
c0aea6ba	63	return true;
6854f87c SG	64	}
	65
	66	__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
	67	{
	68	return vendev;
	69	}
	70
3f4e1e8e	71	static int pci_rom_probe(struct udevice dev, struct pci_rom_header *hdrp)
6854f87c	72	{
8a8d24bd	73	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
6854f87c SG	74	struct pci_rom_header *rom_header;
6854f87c SG	75	struct pci_rom_data *rom_data;
40305240	76	u16 rom_vendor, rom_device;
d57c2f24	77	u32 rom_class;
6854f87c SG	78	u32 vendev;
	79	u32 mapped_vendev;
	80	u32 rom_address;
	81
3f4e1e8e	82	vendev = pplat->vendor << 16 \| pplat->device;
6854f87c SG	83	mapped_vendev = board_map_oprom_vendev(vendev);
	84	if (vendev != mapped_vendev)
	85	debug("Device ID mapped to %#08x\n", mapped_vendev);
	86
786a08e0 BM	87	#ifdef CONFIG_VGA_BIOS_ADDR
786a08e0 BM	88	rom_address = CONFIG_VGA_BIOS_ADDR;
6854f87c	89	#else
4a2708a0	90
3f4e1e8e	91	dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
6854f87c SG	92	if (rom_address == 0x00000000 \|\| rom_address == 0xffffffff) {
	93	debug("%s: rom_address=%x\n", __func__, rom_address);
	94	return -ENOENT;
	95	}
fa5690c1	96	rom_address &= PCI_ROM_ADDRESS_MASK;
6854f87c SG	97
6854f87c SG	98	/* Enable expansion ROM address decoding. */
3f4e1e8e SG	99	dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
3f4e1e8e SG	100	rom_address \| PCI_ROM_ADDRESS_ENABLE);
6854f87c SG	101	#endif
6854f87c SG	102	debug("Option ROM address %x\n", rom_address);
ef2d17fe	103	rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
6854f87c SG	104
6854f87c SG	105	debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
40305240 SG	106	le16_to_cpu(rom_header->signature),
40305240 SG	107	rom_header->size * 512, le16_to_cpu(rom_header->data));
6854f87c	108
40305240	109	if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
6854f87c	110	printf("Incorrect expansion ROM header signature %04x\n",
40305240	111	le16_to_cpu(rom_header->signature));
f110da99 BM	112	#ifndef CONFIG_VGA_BIOS_ADDR
f110da99 BM	113	/* Disable expansion ROM address decoding */
3f4e1e8e	114	dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
f110da99	115	#endif
6854f87c SG	116	return -EINVAL;
	117	}
	118
40305240 SG	119	rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
	120	rom_vendor = le16_to_cpu(rom_data->vendor);
	121	rom_device = le16_to_cpu(rom_data->device);
6854f87c SG	122
6854f87c SG	123	debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
40305240	124	rom_vendor, rom_device);
6854f87c SG	125
6854f87c SG	126	/* If the device id is mapped, a mismatch is expected */
3f4e1e8e	127	if ((pplat->vendor != rom_vendor \|\| pplat->device != rom_device) &&
6854f87c SG	128	(vendev == mapped_vendev)) {
6854f87c SG	129	printf("ID mismatch: vendor ID %04x, device ID %04x\n",
40305240	130	rom_vendor, rom_device);
c5caba03	131	/* Continue anyway */
6854f87c SG	132	}
6854f87c SG	133
d57c2f24 BM	134	rom_class = (le16_to_cpu(rom_data->class_hi) << 8) \| rom_data->class_lo;
	135	debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
	136	rom_class, rom_data->type);
6854f87c	137
3f4e1e8e	138	if (pplat->class != rom_class) {
d57c2f24	139	debug("Class Code mismatch ROM %06x, dev %06x\n",
3f4e1e8e	140	rom_class, pplat->class);
6854f87c SG	141	}
	142	*hdrp = rom_header;
	143
	144	return 0;
	145	}
	146
d830b152 SG	147	/**
	148	* pci_rom_load() - Load a ROM image and return a pointer to it
	149	*
	150	* @rom_header: Pointer to ROM image
	151	* @ram_headerp: Returns a pointer to the image in RAM
	152	* @allocedp: Returns true if @ram_headerp was allocated and needs
	153	* to be freed
185f812c	154	* Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
d830b152 SG	155	* the error state. Even if this function returns an error, it may have
	156	* allocated memory.
	157	*/
	158	static int pci_rom_load(struct pci_rom_header *rom_header,
	159	struct pci_rom_header *ram_headerp, bool allocedp)
6854f87c SG	160	{
	161	struct pci_rom_data *rom_data;
	162	unsigned int rom_size;
	163	unsigned int image_size = 0;
	164	void *target;
	165
d830b152	166	*allocedp = false;
6854f87c SG	167	do {
	168	/* Get next image, until we see an x86 version */
	169	rom_header = (struct pci_rom_header )((void )rom_header +
	170	image_size);
	171
	172	rom_data = (struct pci_rom_data )((void )rom_header +
40305240	173	le16_to_cpu(rom_header->data));
6854f87c	174
40305240 SG	175	image_size = le16_to_cpu(rom_data->ilen) * 512;
40305240 SG	176	} while ((rom_data->type != 0) && (rom_data->indicator == 0));
6854f87c SG	177
	178	if (rom_data->type != 0)
	179	return -EACCES;
	180
	181	rom_size = rom_header->size * 512;
	182
bdc88d4e	183	#ifdef PCI_VGA_RAM_IMAGE_START
6854f87c	184	target = (void *)PCI_VGA_RAM_IMAGE_START;
bdc88d4e SG	185	#else
	186	target = (void *)malloc(rom_size);
	187	if (!target)
	188	return -ENOMEM;
d830b152	189	*allocedp = true;
bdc88d4e	190	#endif
6854f87c	191	if (target != rom_header) {
fba7eac1 SG	192	ulong start = get_timer(0);
fba7eac1 SG	193
6854f87c SG	194	debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
	195	rom_header, target, rom_size);
	196	memcpy(target, rom_header, rom_size);
	197	if (memcmp(target, rom_header, rom_size)) {
	198	printf("VGA ROM copy failed\n");
	199	return -EFAULT;
	200	}
fba7eac1	201	debug("Copy took %lums\n", get_timer(start));
6854f87c SG	202	}
	203	*ram_headerp = target;
	204
	205	return 0;
	206	}
	207
da62e1e8	208	struct vesa_state mode_info;
6854f87c	209
a4520022 BM	210	void setup_video(struct screen_info *screen_info)
a4520022 BM	211	{
a4520022 BM	212	struct vesa_mode_info *vesa = &mode_info.vesa;
a4520022 BM	213
1e7a0473 BM	214	/* Sanity test on VESA parameters */
	215	if (!vesa->x_resolution \|\| !vesa->y_resolution)
	216	return;
	217
a4520022 BM	218	screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
	219
	220	screen_info->lfb_width = vesa->x_resolution;
	221	screen_info->lfb_height = vesa->y_resolution;
	222	screen_info->lfb_depth = vesa->bits_per_pixel;
	223	screen_info->lfb_linelength = vesa->bytes_per_scanline;
	224	screen_info->lfb_base = vesa->phys_base_ptr;
	225	screen_info->lfb_size =
	226	ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
	227	65536);
	228	screen_info->lfb_size >>= 16;
	229	screen_info->red_size = vesa->red_mask_size;
	230	screen_info->red_pos = vesa->red_mask_pos;
	231	screen_info->green_size = vesa->green_mask_size;
	232	screen_info->green_pos = vesa->green_mask_pos;
	233	screen_info->blue_size = vesa->blue_mask_size;
	234	screen_info->blue_pos = vesa->blue_mask_pos;
	235	screen_info->rsvd_size = vesa->reserved_mask_size;
	236	screen_info->rsvd_pos = vesa->reserved_mask_pos;
a4520022 BM	237	}
a4520022 BM	238
3f4e1e8e SG	239	int dm_pci_run_vga_bios(struct udevice dev, int (int15_handler)(void),
3f4e1e8e SG	240	int exec_method)
6854f87c	241	{
8a8d24bd	242	struct pci_child_plat *pplat = dev_get_parent_plat(dev);
ed48899c	243	struct pci_rom_header rom = NULL, ram = NULL;
6854f87c	244	int vesa_mode = -1;
d830b152	245	bool emulate, alloced;
6854f87c SG	246	int ret;
	247
	248	/* Only execute VGA ROMs */
3f4e1e8e SG	249	if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
3f4e1e8e SG	250	debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
6854f87c SG	251	PCI_CLASS_DISPLAY_VGA);
	252	return -ENODEV;
	253	}
	254
f698baa9	255	if (!board_should_load_oprom(dev))
595aac98	256	return log_msg_ret("Should not load OPROM", -ENXIO);
6854f87c	257
3f4e1e8e	258	ret = pci_rom_probe(dev, &rom);
6854f87c	259	if (ret)
d4245536	260	return log_msg_ret("pro", ret);
6854f87c	261
d830b152	262	ret = pci_rom_load(rom, &ram, &alloced);
d4245536 SG	263	if (ret) {
d4245536 SG	264	ret = log_msg_ret("ld", ret);
d830b152	265	goto err;
d4245536	266	}
6854f87c	267
d830b152	268	if (!board_should_run_oprom(dev)) {
d4245536	269	ret = log_msg_ret("run", -ENXIO);
d830b152 SG	270	goto err;
d830b152 SG	271	}
6854f87c SG	272
	273	#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
	274	defined(CONFIG_FRAMEBUFFER_VESA_MODE)
	275	vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
	276	#endif
b7d4df5a	277	debug("Selected vesa mode 0x%x\n", vesa_mode);
bc17d8f4 SG	278
	279	if (exec_method & PCI_ROM_USE_NATIVE) {
	280	#ifdef CONFIG_X86
	281	emulate = false;
	282	#else
	283	if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
	284	printf("BIOS native execution is only available on x86\n");
d830b152 SG	285	ret = -ENOSYS;
d830b152 SG	286	goto err;
bc17d8f4 SG	287	}
	288	emulate = true;
	289	#endif
	290	} else {
	291	#ifdef CONFIG_BIOSEMU
	292	emulate = true;
	293	#else
	294	if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
	295	printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
d830b152 SG	296	ret = -ENOSYS;
d830b152 SG	297	goto err;
bc17d8f4 SG	298	}
	299	emulate = false;
	300	#endif
	301	}
	302
6854f87c	303	if (emulate) {
5345700d SG	304	if (CONFIG_IS_ENABLED(BIOSEMU)) {
	305	BE_VGAInfo *info;
	306
	307	log_debug("Running video BIOS with emulator...");
	308	ret = biosemu_setup(dev, &info);
	309	if (ret)
	310	goto err;
	311	biosemu_set_interrupt_handler(0x15, int15_handler);
	312	ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
	313	true, vesa_mode, &mode_info);
	314	log_debug("done\n");
	315	if (ret)
	316	goto err;
	317	}
6854f87c	318	} else {
6c456516	319	#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) \|\| CONFIG_TPL)
d4245536	320	log_debug("Running video BIOS...");
6854f87c SG	321	bios_set_interrupt_handler(0x15, int15_handler);
6854f87c SG	322
8beb0bda SG	323	bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
8beb0bda SG	324	&mode_info);
d4245536	325	log_debug("done\n");
6854f87c SG	326	#endif
6854f87c SG	327	}
b7d4df5a	328	debug("Final vesa mode %x\n", mode_info.video_mode);
d830b152	329	ret = 0;
6854f87c	330
d830b152 SG	331	err:
	332	if (alloced)
	333	free(ram);
	334	return ret;
6854f87c	335	}
ee87ee82	336
644e6144	337	int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
da62e1e8 SG	338	struct video_priv *uc_priv,
da62e1e8 SG	339	struct video_uc_plat *plat)
ee87ee82 SG	340	{
ee87ee82 SG	341	if (!vesa->x_resolution)
595aac98	342	return log_msg_ret("No x resolution", -ENXIO);
ee87ee82 SG	343	uc_priv->xsize = vesa->x_resolution;
ee87ee82 SG	344	uc_priv->ysize = vesa->y_resolution;
06696ebe	345	uc_priv->line_length = vesa->bytes_per_scanline;
ee87ee82 SG	346	switch (vesa->bits_per_pixel) {
	347	case 32:
	348	case 24:
	349	uc_priv->bpix = VIDEO_BPP32;
97425461	350	uc_priv->format = VIDEO_X8B8G8R8;
ee87ee82 SG	351	break;
	352	case 16:
	353	uc_priv->bpix = VIDEO_BPP16;
	354	break;
	355	default:
	356	return -EPROTONOSUPPORT;
	357	}
0938767d SG	358
0938767d SG	359	/* Use double buffering if enabled */
bcac3618	360	if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
644e6144	361	plat->copy_base = fb;
bcac3618	362	else
644e6144	363	plat->base = fb;
0938767d	364	log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
ee87ee82 SG	365	plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
	366
	367	return 0;
	368	}
	369
da62e1e8	370	int vesa_setup_video(struct udevice dev, int (int15_handler)(void))
ee87ee82	371	{
8a8d24bd	372	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
ee87ee82 SG	373	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
	374	int ret;
	375
	376	/* If we are running from EFI or coreboot, this can't work */
f0920e4a BM	377	if (!ll_boot_init()) {
f0920e4a BM	378	printf("Not available (previous bootloader prevents it)\n");
ee87ee82	379	return -EPERM;
f0920e4a	380	}
ee87ee82	381
03fe79c0	382	/* In U-Boot proper, collect the information added by SPL (see below) */
456bdb70	383	if (IS_ENABLED(CONFIG_SPL_VIDEO) && xpl_phase() > PHASE_SPL &&
03fe79c0 SG	384	CONFIG_IS_ENABLED(BLOBLIST)) {
	385	struct video_handoff *ho;
	386
	387	ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
	388	if (!ho)
	389	return log_msg_ret("blf", -ENOENT);
	390	plat->base = ho->fb;
	391	plat->size = ho->size;
	392	uc_priv->xsize = ho->xsize;
	393	uc_priv->ysize = ho->ysize;
	394	uc_priv->line_length = ho->line_length;
	395	uc_priv->bpix = ho->bpix;
97425461	396	uc_priv->format = ho->format;
03fe79c0 SG	397	} else {
	398	bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
	399	ret = dm_pci_run_vga_bios(dev, int15_handler,
	400	PCI_ROM_USE_NATIVE \|
	401	PCI_ROM_ALLOW_FALLBACK);
	402	bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
	403	if (ret) {
	404	debug("failed to run video BIOS: %d\n", ret);
	405	return ret;
0938767d SG	406	}
0938767d SG	407
03fe79c0 SG	408	ret = vesa_setup_video_priv(&mode_info.vesa,
	409	mode_info.vesa.phys_base_ptr,
	410	uc_priv, plat);
	411	if (ret) {
	412	if (ret == -ENFILE) {
	413	/*
	414	* See video-uclass.c for how to set up reserved
	415	* memory in your video driver
	416	*/
	417	log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
	418	dev->driver->name);
	419	}
	420
	421	debug("No video mode configured\n");
	422	return ret;
	423	}
ee87ee82 SG	424	}
ee87ee82 SG	425
61130938	426	printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
f0920e4a BM	427	mode_info.vesa.bits_per_pixel);
f0920e4a BM	428
03fe79c0	429	/* In SPL, store the information for use by U-Boot proper */
456bdb70	430	if (xpl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
03fe79c0 SG	431	struct video_handoff *ho;
	432
	433	ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
	434	if (!ho)
	435	return log_msg_ret("blc", -ENOMEM);
	436
	437	ho->fb = plat->base;
	438	ho->size = plat->size;
	439	ho->xsize = uc_priv->xsize;
	440	ho->ysize = uc_priv->ysize;
	441	ho->line_length = uc_priv->line_length;
	442	ho->bpix = uc_priv->bpix;
97425461	443	ho->format = uc_priv->format;
03fe79c0 SG	444	}
03fe79c0 SG	445
ee87ee82 SG	446	return 0;
ee87ee82 SG	447	}