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Commit | Line | Data |
---|---|---|
468ba8d0 | 1 | CONFIG_ARM=y |
11168883 | 2 | CONFIG_SYS_L2_PL310=y |
468ba8d0 | 3 | CONFIG_ARCH_SOCFPGA=y |
9802154a | 4 | CONFIG_SYS_MALLOC_LEN=0x4000000 |
468ba8d0 | 5 | CONFIG_SYS_MALLOC_F_LEN=0x800 |
c960c0fd | 6 | CONFIG_ENV_SOURCE_FILE="socfpga_secu" |
fcb5117d TR |
7 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
8 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 | |
3bcf9c08 | 9 | CONFIG_ENV_SIZE=0x2000 |
468ba8d0 HB |
10 | CONFIG_ENV_OFFSET=0x100000 |
11 | CONFIG_DM_GPIO=y | |
2bba7807 | 12 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" |
fcb5117d | 13 | CONFIG_DM_RESET=y |
103c5f18 | 14 | # CONFIG_SPL_MMC is not set |
9ca00684 | 15 | CONFIG_SPL_DRIVERS_MISC=y |
fcb5117d | 16 | CONFIG_SPL_STACK=0x0 |
867e16ae | 17 | CONFIG_SPL_TEXT_BASE=0xFFFF0000 |
d8927020 TR |
18 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
19 | CONFIG_SYS_LOAD_ADDR=0x02000000 | |
08f512cf | 20 | CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 |
468ba8d0 HB |
21 | CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y |
22 | CONFIG_ENV_OFFSET_REDUND=0x120000 | |
23 | # CONFIG_SPL_LIBDISK_SUPPORT is not set | |
ea2ca7e1 | 24 | # CONFIG_SPL_SPI is not set |
468ba8d0 HB |
25 | CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" |
26 | CONFIG_FIT=y | |
c358af81 | 27 | CONFIG_DISTRO_DEFAULTS=y |
69c8a817 TR |
28 | CONFIG_BOOT_RETRY=y |
29 | CONFIG_BOOT_RETRY_TIME=45 | |
30 | CONFIG_RESET_TO_RETRY=y | |
44a666a8 | 31 | CONFIG_USE_BOOTARGS=y |
970bf860 | 32 | CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;" |
0817daa7 | 33 | CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" |
468ba8d0 HB |
34 | CONFIG_SYS_CONSOLE_IS_IN_ENV=y |
35 | CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y | |
36 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y | |
468ba8d0 HB |
37 | # CONFIG_DISPLAY_BOARDINFO is not set |
38 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
15b4aed4 | 39 | CONFIG_CLOCKS=y |
406257ae | 40 | CONFIG_MISC_INIT_R=y |
ca8a329a | 41 | CONFIG_SPL_PAD_TO=0x10000 |
9b5f9aeb | 42 | CONFIG_SPL_NO_BSS_LIMIT=y |
468ba8d0 | 43 | CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y |
f113d7d3 | 44 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
2a00d73d | 45 | # CONFIG_SPL_SYS_MMCSD_RAW_MODE is not set |
b35df87a | 46 | CONFIG_SPL_MTD=y |
b340199f | 47 | CONFIG_SPL_NAND_SUPPORT=y |
cf493582 | 48 | CONFIG_SYS_MAXARGS=32 |
468ba8d0 HB |
49 | CONFIG_CMD_ASKENV=y |
50 | CONFIG_CMD_GREPENV=y | |
51 | CONFIG_CMD_EEPROM=y | |
88cd7d0e TR |
52 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
53 | CONFIG_SYS_EEPROM_SIZE=1024 | |
468ba8d0 HB |
54 | CONFIG_CMD_GPIO=y |
55 | CONFIG_CMD_I2C=y | |
56 | CONFIG_CMD_MMC=y | |
57 | CONFIG_CMD_NAND_TRIMFFS=y | |
58 | CONFIG_CMD_SPI=y | |
59 | CONFIG_CMD_WDT=y | |
60 | CONFIG_CMD_CACHE=y | |
61 | CONFIG_MTDIDS_DEFAULT="nand0=denali-nand" | |
62 | CONFIG_MTDPARTS_DEFAULT="mtdparts=denali-nand:512k(nand.4spl),512k(nand.uboot),128k(nand.env1),128k(nand.env2),0x1000000(nand.rec),0x3ee40000(nand.ubi),0x80000@0x3ff80000(nand.bbt)" | |
63 | CONFIG_CMD_UBI=y | |
64 | # CONFIG_CMD_UBIFS is not set | |
65 | # CONFIG_ISO_PARTITION is not set | |
66 | # CONFIG_EFI_PARTITION is not set | |
e91907a1 | 67 | CONFIG_ENV_OVERWRITE=y |
468ba8d0 HB |
68 | CONFIG_ENV_IS_IN_NAND=y |
69 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y | |
fdfb17b1 TR |
70 | CONFIG_USE_BOOTFILE=y |
71 | CONFIG_BOOTFILE="zImage" | |
0817daa7 | 72 | CONFIG_VERSION_VARIABLE=y |
468ba8d0 | 73 | CONFIG_SPL_DM_SEQ_ALIAS=y |
8876f896 MV |
74 | CONFIG_BOOTCOUNT_LIMIT=y |
75 | CONFIG_DM_BOOTCOUNT=y | |
76 | CONFIG_DM_BOOTCOUNT_RTC=y | |
468ba8d0 HB |
77 | CONFIG_DWAPB_GPIO=y |
78 | CONFIG_DM_I2C=y | |
79 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y | |
80 | CONFIG_DM_I2C_GPIO=y | |
81 | CONFIG_MISC=y | |
82 | CONFIG_I2C_EEPROM=y | |
83 | CONFIG_SYS_I2C_EEPROM_ADDR=0x50 | |
75fc79e5 | 84 | CONFIG_SYS_MMC_MAX_BLK_COUNT=256 |
468ba8d0 | 85 | CONFIG_MMC_DW=y |
468ba8d0 HB |
86 | CONFIG_DM_MTD=y |
87 | CONFIG_MTD_RAW_NAND=y | |
88 | CONFIG_SYS_NAND_USE_FLASH_BBT=y | |
89 | CONFIG_NAND_DENALI_DT=y | |
c0ad62c5 | 90 | CONFIG_SYS_NAND_ONFI_DETECTION=y |
871fd508 TR |
91 | CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y |
92 | CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 | |
468ba8d0 | 93 | CONFIG_SPL_NAND_DENALI=y |
32a8f800 | 94 | CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2 |
468ba8d0 HB |
95 | # CONFIG_DM_SPI_FLASH is not set |
96 | CONFIG_MTD_UBI_FASTMAP=y | |
97 | CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 | |
98 | CONFIG_MV88E6352_SWITCH=y | |
99 | CONFIG_PHY_FIXED=y | |
468ba8d0 HB |
100 | CONFIG_PHY_GIGE=y |
101 | CONFIG_ETH_DESIGNWARE=y | |
102 | CONFIG_MII=y | |
8876f896 MV |
103 | CONFIG_DM_RTC=y |
104 | CONFIG_RTC_M41T62=y | |
468ba8d0 HB |
105 | CONFIG_SPI=y |
106 | CONFIG_SPI_MEM=y | |
107 | CONFIG_DESIGNWARE_SPI=y | |
108 | CONFIG_DESIGNWARE_WATCHDOG=y | |
109 | CONFIG_WDT=y | |
3b8dfc42 | 110 | CONFIG_SYS_TIMER_COUNTS_DOWN=y |
468ba8d0 | 111 | # CONFIG_GZIP is not set |