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Commit | Line | Data |
---|---|---|
d494cdb9 | 1 | CONFIG_PPC=y |
98463903 | 2 | CONFIG_TEXT_BASE=0xFE000000 |
9802154a | 3 | CONFIG_SYS_MALLOC_LEN=0x80000 |
d494cdb9 | 4 | CONFIG_SYS_MALLOC_F_LEN=0x600 |
a09fea1d TR |
5 | CONFIG_ENV_SIZE=0x2000 |
6 | CONFIG_ENV_SECT_SIZE=0x10000 | |
052170c6 | 7 | CONFIG_DM_GPIO=y |
2bba7807 | 8 | CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" |
fcb5117d | 9 | CONFIG_DM_RESET=y |
c90e1893 | 10 | CONFIG_SYS_MONITOR_LEN=524288 |
d8927020 | 11 | CONFIG_SYS_BOOTM_LEN=0x800000 |
d494cdb9 DE |
12 | CONFIG_IDENT_STRING=" gazerbeam 0.01" |
13 | CONFIG_SYS_CLK_FREQ=33333333 | |
d46e86d2 | 14 | CONFIG_ENV_ADDR=0xFE080000 |
d494cdb9 | 15 | CONFIG_MPC83xx=y |
d3d0b5bb | 16 | CONFIG_SYS_INIT_RAM_LOCK=y |
d494cdb9 DE |
17 | CONFIG_TARGET_GAZERBEAM=y |
18 | CONFIG_SYSTEM_PLL_VCO_DIV_2=y | |
19 | CONFIG_SYSTEM_PLL_FACTOR_4_1=y | |
20 | CONFIG_CORE_PLL_RATIO_3_1=y | |
21 | CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y | |
22 | CONFIG_TSEC1_MODE_RGMII=y | |
23 | CONFIG_TSEC2_MODE_RGMII=y | |
24 | CONFIG_BAT0=y | |
25 | CONFIG_BAT0_NAME="SDRAM" | |
26 | CONFIG_BAT0_BASE=0x00000000 | |
27 | CONFIG_BAT0_LENGTH_128_MBYTES=y | |
28 | CONFIG_BAT0_ACCESS_RW=y | |
29 | CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y | |
30 | CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y | |
31 | CONFIG_BAT0_USER_MODE_VALID=y | |
32 | CONFIG_BAT0_SUPERVISOR_MODE_VALID=y | |
33 | CONFIG_BAT1=y | |
34 | CONFIG_BAT1_NAME="IMMR" | |
35 | CONFIG_BAT1_BASE=0xE0000000 | |
36 | CONFIG_BAT1_LENGTH_8_MBYTES=y | |
37 | CONFIG_BAT1_ACCESS_RW=y | |
38 | CONFIG_BAT1_ICACHE_INHIBITED=y | |
d494cdb9 DE |
39 | CONFIG_BAT1_DCACHE_INHIBITED=y |
40 | CONFIG_BAT1_DCACHE_GUARDED=y | |
41 | CONFIG_BAT1_USER_MODE_VALID=y | |
42 | CONFIG_BAT1_SUPERVISOR_MODE_VALID=y | |
43 | CONFIG_BAT2=y | |
44 | CONFIG_BAT2_NAME="FLASH" | |
45 | CONFIG_BAT2_BASE=0xFE000000 | |
46 | CONFIG_BAT2_LENGTH_8_MBYTES=y | |
47 | CONFIG_BAT2_ACCESS_RW=y | |
48 | CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y | |
49 | CONFIG_BAT2_DCACHE_INHIBITED=y | |
50 | CONFIG_BAT2_DCACHE_GUARDED=y | |
51 | CONFIG_BAT2_USER_MODE_VALID=y | |
52 | CONFIG_BAT2_SUPERVISOR_MODE_VALID=y | |
53 | CONFIG_BAT3=y | |
54 | CONFIG_BAT3_NAME="INIT_RAM" | |
55 | CONFIG_BAT3_BASE=0xE6000000 | |
56 | CONFIG_BAT3_ACCESS_RW=y | |
57 | CONFIG_BAT3_USER_MODE_VALID=y | |
58 | CONFIG_BAT3_SUPERVISOR_MODE_VALID=y | |
59 | CONFIG_LBLAW0=y | |
60 | CONFIG_LBLAW0_BASE=0xFE000000 | |
61 | CONFIG_LBLAW0_NAME="FLASH" | |
62 | CONFIG_LBLAW0_LENGTH_8_MBYTES=y | |
63 | CONFIG_LBLAW1=y | |
64 | CONFIG_LBLAW1_BASE=0xE0600000 | |
65 | CONFIG_LBLAW1_NAME="FPGA0" | |
66 | CONFIG_LBLAW1_LENGTH_1_MBYTES=y | |
67 | CONFIG_LBLAW2=y | |
68 | CONFIG_LBLAW2_BASE=0xE0700000 | |
69 | CONFIG_LBLAW2_NAME="FPGA1" | |
70 | CONFIG_LBLAW2_LENGTH_1_MBYTES=y | |
d494cdb9 DE |
71 | CONFIG_HID0_FINAL_EMCP=y |
72 | CONFIG_HID0_FINAL_DPM=y | |
73 | CONFIG_HID0_FINAL_ICE=y | |
74 | CONFIG_HID2_HBE=y | |
75 | CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y | |
76 | CONFIG_SICR_GPIO_A_TSEC2=y | |
77 | CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y | |
78 | CONFIG_SICR_IEEE1588_A_GPIO=y | |
79 | CONFIG_SICR_GTM_GPIO=y | |
80 | CONFIG_SICR_ETSEC2_GPIO=y | |
81 | CONFIG_SICR_GPIOSEL_IEEE1588=y | |
82 | CONFIG_SICR_TMSOBI1_2_5_V=y | |
83 | CONFIG_SICR_TMSOBI2_2_5_V=y | |
84 | CONFIG_ACR_PIPE_DEP_4=y | |
85 | CONFIG_ACR_RPTCNT_4=y | |
86 | CONFIG_SPCR_TSECEP_3=y | |
87 | CONFIG_LCRR_DBYP_PLL_BYPASSED=y | |
88 | CONFIG_LCRR_CLKDIV_2=y | |
89 | CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y | |
90 | CONFIG_CMD_IOLOOP=y | |
c960c0fd | 91 | # CONFIG_PCI is not set |
0a3689cb TR |
92 | CONFIG_SYS_MEMTEST_START=0x00001000 |
93 | CONFIG_SYS_MEMTEST_END=0x07e00000 | |
6889412a | 94 | CONFIG_SYS_BARGSIZE=1024 |
d494cdb9 DE |
95 | CONFIG_FIT=y |
96 | CONFIG_FIT_SIGNATURE=y | |
97 | CONFIG_FIT_VERBOSE=y | |
d494cdb9 | 98 | CONFIG_BOOTDELAY=5 |
0817daa7 TR |
99 | CONFIG_AUTOBOOT_KEYED=y |
100 | CONFIG_AUTOBOOT_STOP_STR=" " | |
ec6f06bd TR |
101 | CONFIG_OF_BOARD_SETUP=y |
102 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
970bf860 TR |
103 | CONFIG_USE_BOOTCOMMAND=y |
104 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/mmcblk0p3 rw rootwait console=$consoledev,$baudrate $othbootargs;ext2load mmc 0:2 ${kernel_addr} $bootfile;ext2load mmc 0:2 ${fdt_addr} $fdtfile;bootm ${kernel_addr} - ${fdt_addr}" | |
42fb448a | 105 | CONFIG_SYS_CBSIZE=1024 |
d494cdb9 DE |
106 | # CONFIG_CONSOLE_MUX is not set |
107 | CONFIG_SYS_CONSOLE_INFO_QUIET=y | |
108 | CONFIG_DISPLAY_CPUINFO=y | |
109 | # CONFIG_DISPLAY_BOARDINFO is not set | |
110 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
111 | CONFIG_BOARD_EARLY_INIT_R=y | |
19b4040d | 112 | # CONFIG_HWCONFIG is not set |
d494cdb9 DE |
113 | CONFIG_LAST_STAGE_INIT=y |
114 | CONFIG_HUSH_PARSER=y | |
d494cdb9 DE |
115 | CONFIG_CMD_CPU=y |
116 | CONFIG_CMD_BINOP=y | |
117 | CONFIG_CMD_MEMTEST=y | |
118 | CONFIG_SYS_ALT_MEMTEST=y | |
119 | CONFIG_CMD_GPIO=y | |
120 | CONFIG_CMD_I2C=y | |
2c8d04dd TR |
121 | CONFIG_LOADS_ECHO=y |
122 | CONFIG_SYS_LOADS_BAUD_CHANGE=y | |
d494cdb9 DE |
123 | CONFIG_CMD_MMC=y |
124 | CONFIG_CMD_AXI=y | |
125 | # CONFIG_CMD_SETEXPR is not set | |
d494cdb9 | 126 | CONFIG_CMD_MII=y |
d494cdb9 DE |
127 | CONFIG_CMD_PING=y |
128 | CONFIG_CMD_CACHE=y | |
129 | CONFIG_CMD_HASH=y | |
130 | CONFIG_CMD_TPM=y | |
131 | CONFIG_CMD_EXT2=y | |
132 | CONFIG_DOS_PARTITION=y | |
133 | CONFIG_OF_CONTROL=y | |
134 | CONFIG_OF_LIVE=y | |
e91907a1 | 135 | CONFIG_ENV_OVERWRITE=y |
cb6617a7 | 136 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
a09fea1d | 137 | CONFIG_ENV_ADDR_REDUND=0xFE090000 |
fdfb17b1 TR |
138 | CONFIG_USE_BOOTFILE=y |
139 | CONFIG_BOOTFILE="uImage" | |
54f80dd2 TR |
140 | CONFIG_USE_HOSTNAME=y |
141 | CONFIG_HOSTNAME="gazerbeam" | |
142 | CONFIG_USE_ROOTPATH=y | |
d494cdb9 DE |
143 | CONFIG_REGMAP=y |
144 | CONFIG_AXI=y | |
145 | CONFIG_IHS_AXI=y | |
146 | CONFIG_CLK=y | |
052bebe5 | 147 | CONFIG_CLK_ICS8N3QV01=y |
d494cdb9 DE |
148 | CONFIG_CPU=y |
149 | CONFIG_CPU_MPC83XX=y | |
c7fad78e TR |
150 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
151 | CONFIG_SYS_BR0_PRELIM=0xFE001001 | |
152 | CONFIG_SYS_OR0_PRELIM=0xFF800FF6 | |
153 | CONFIG_SYS_BR1_PRELIM_BOOL=y | |
154 | CONFIG_SYS_BR1_PRELIM=0xE0601001 | |
155 | CONFIG_SYS_OR1_PRELIM=0xFFF00850 | |
156 | CONFIG_SYS_BR2_PRELIM_BOOL=y | |
157 | CONFIG_SYS_BR2_PRELIM=0xE0701001 | |
158 | CONFIG_SYS_OR2_PRELIM=0xFFF00850 | |
d494cdb9 DE |
159 | CONFIG_DM_PCA953X=y |
160 | CONFIG_MPC8XXX_GPIO=y | |
161 | CONFIG_DM_I2C=y | |
162 | CONFIG_SYS_I2C_FSL=y | |
163 | CONFIG_SYS_I2C_IHS=y | |
164 | CONFIG_MISC=y | |
165 | CONFIG_GDSYS_RXAUI_CTRL=y | |
166 | CONFIG_GDSYS_IOEP=y | |
167 | CONFIG_MPC83XX_SERDES=y | |
168 | CONFIG_GDSYS_SOC=y | |
169 | CONFIG_IHS_FPGA=y | |
d494cdb9 | 170 | CONFIG_FSL_ESDHC=y |
db04ff42 | 171 | CONFIG_MTD=y |
1de770d5 | 172 | CONFIG_DM_MTD=y |
d494cdb9 | 173 | CONFIG_MTD_NOR_FLASH=y |
98fbad63 | 174 | CONFIG_FLASH_SHOW_PROGRESS=0 |
d494cdb9 DE |
175 | CONFIG_CFI_FLASH=y |
176 | CONFIG_SYS_FLASH_PROTECTION=y | |
177 | CONFIG_SYS_FLASH_CFI=y | |
1db251bd | 178 | CONFIG_SYS_MAX_FLASH_SECT=135 |
d494cdb9 | 179 | CONFIG_PHYLIB_10G=y |
306881a0 TR |
180 | CONFIG_PHY_ATHEROS=y |
181 | CONFIG_PHY_BROADCOM=y | |
182 | CONFIG_PHY_DAVICOM=y | |
183 | CONFIG_PHY_LXT=y | |
d494cdb9 | 184 | CONFIG_PHY_MARVELL=y |
306881a0 TR |
185 | CONFIG_PHY_NATSEMI=y |
186 | CONFIG_PHY_REALTEK=y | |
187 | CONFIG_PHY_SMSC=y | |
188 | CONFIG_PHY_TERANETICS=y | |
189 | CONFIG_PHY_VITESSE=y | |
d494cdb9 | 190 | CONFIG_TSEC_ENET=y |
d494cdb9 DE |
191 | CONFIG_RAM=y |
192 | CONFIG_MPC83XX_SDRAM=y | |
d494cdb9 DE |
193 | CONFIG_DM_SERIAL=y |
194 | CONFIG_SYS_NS16550=y | |
3a8ee3df SG |
195 | CONFIG_SYSINFO=y |
196 | CONFIG_SYSINFO_GAZERBEAM=y | |
d494cdb9 | 197 | CONFIG_SYSRESET=y |
875669da | 198 | CONFIG_SYSRESET_MPC83XX=y |
d494cdb9 DE |
199 | CONFIG_TIMER=y |
200 | CONFIG_MPC83XX_TIMER=y | |
201 | CONFIG_TPM_ATMEL_TWI=y | |
202 | CONFIG_TPM_AUTH_SESSIONS=y | |
203 | # CONFIG_TPM_V2 is not set | |
b86986c7 | 204 | CONFIG_VIDEO=y |
d494cdb9 DE |
205 | CONFIG_DISPLAY=y |
206 | CONFIG_LOGICORE_DP_TX=y | |
207 | CONFIG_OSD=y | |
208 | CONFIG_IHS_VIDEO_OUT=y | |
209 | CONFIG_TPM=y |