[J-u-boot.git] / arch / arm / dts / zynqmp-binman.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * dts file for Xilinx ZynqMP platforms
 *
 * (C) Copyright 2024, Advanced Micro Devices, Inc.
 *
 * Michal Simek <[email protected]>
 */

#include <config.h>

/dts-v1/;
/ {
	binman: binman {
		multiple-images;

		/* u-boot.itb generation in a static way */
		itb {
			filename = "u-boot.itb";
			pad-byte = <0>;

			fit {
				description = "Configuration for Xilinx ZynqMP SoC";
				fit,align = <0x8>;
				fit,external-offset = <0x0>;
				fit,fdt-list = "of-list";
				images {
					uboot {
						description = "U-Boot (64-bit)";
						type = "firmware";
						os = "u-boot";
						arch = "arm64";
						compression = "none";
						load = /bits/ 64 <CONFIG_TEXT_BASE>;
						entry = /bits/ 64 <CONFIG_TEXT_BASE>;
						hash {
							algo = "md5";
						};
						u-boot-nodtb {
						};
					};
					atf {
						description = "Trusted Firmware-A";
						type = "firmware";
						os = "arm-trusted-firmware";
						arch = "arm64";
						compression = "none";
						load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						hash {
							algo = "md5";
						};
						atf-bl31 {
							optional;
						};
					};
					tee {
						description = "OP-TEE";
						type = "tee";
						arch = "arm64";
						compression = "none";
						os = "tee";
						load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						tee-os {
							optional;
						};
					};
					@fdt-SEQ {
						description = "NAME";
						type = "flat_dt";
						arch = "arm64";
						compression = "none";
						load = <0x0 0x100000>;
						hash-1 {
							algo = "md5";
						};
					};
				};
				configurations {
					default = "@conf-DEFAULT-SEQ";
					@conf-SEQ {
						description = "NAME";
						firmware = "atf";
						loadables = "tee", "uboot";
						fdt = "fdt-SEQ";
					};
				};
			};
		};

		itb-single {
			filename = "u-boot-single.itb";
			pad-byte = <0>;

			fit {
				description = "Configuration for Xilinx ZynqMP SoC";
				fit,align = <0x8>;
				fit,external-offset = <0x0>;
				fit,fdt-list = "of-list";
				images {
					uboot {
						description = "U-Boot (64-bit)";
						type = "firmware";
						os = "u-boot";
						arch = "arm64";
						compression = "none";
						load = /bits/ 64 <CONFIG_TEXT_BASE>;
						entry = /bits/ 64 <CONFIG_TEXT_BASE>;
						hash {
							algo = "md5";
						};
						u-boot-nodtb {
						};
					};
					atf {
						description = "Trusted Firmware-A";
						type = "firmware";
						os = "arm-trusted-firmware";
						arch = "arm64";
						compression = "none";
						load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						hash {
							algo = "md5";
						};
						atf-bl31 {
							optional;
						};
					};
					tee {
						description = "OP-TEE";
						type = "tee";
						arch = "arm64";
						compression = "none";
						os = "tee";
						load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
						tee-os {
							optional;
						};
					};
					fdt {
						description = "DT";
						type = "flat_dt";
						arch = "arm64";
						compression = "none";
						load = <0x0 0x100000>;
						uboot-fdt-blob {
							filename = "u-boot.dtb";
							type = "blob-ext";
						};
						hash-1 {
							algo = "md5";
						};

					};
				};
				configurations {
					default = "conf-1";
					conf-1 {
						description = "Single DT";
						firmware = "atf";
						loadables = "tee", "uboot";
						fdt = "fdt";
					};
				};
			};
		};

#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS
		/* QSPI image for testing QSPI boot mode */
		image {
			filename = "qspi.bin";
			pad-byte = <0>;

			blob-ext@1 {
				offset = <0x0>;
				filename = "spl/boot.bin";
			};
			blob-ext@2 {
				offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
				filename = "u-boot.itb";
			};
			fdtmap {
			};
		};

		image-single {
			filename = "qspi-single.bin";
			pad-byte = <0>;

			blob-ext@1 {
				offset = <0x0>;
				filename = "spl/boot.bin";
			};
			blob-ext@2 {
				offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
				filename = "u-boot-single.itb";
			};
			fdtmap {
			};
		};
#endif
	};
};
Commit	Line	Data
a4c98119 MS	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* dts file for Xilinx ZynqMP platforms
	4	*
	5	* (C) Copyright 2024, Advanced Micro Devices, Inc.
	6	*
	7	* Michal Simek <[email protected]>
	8	*/
	9
	10	#include <config.h>
	11
	12	/dts-v1/;
	13	/ {
	14	binman: binman {
	15	multiple-images;
	16
	17	/* u-boot.itb generation in a static way */
	18	itb {
	19	filename = "u-boot.itb";
	20	pad-byte = <0>;
	21
	22	fit {
	23	description = "Configuration for Xilinx ZynqMP SoC";
	24	fit,align = <0x8>;
	25	fit,external-offset = <0x0>;
	26	fit,fdt-list = "of-list";
	27	images {
	28	uboot {
	29	description = "U-Boot (64-bit)";
	30	type = "firmware";
	31	os = "u-boot";
	32	arch = "arm64";
	33	compression = "none";
	34	load = /bits/ 64 <CONFIG_TEXT_BASE>;
	35	entry = /bits/ 64 <CONFIG_TEXT_BASE>;
	36	hash {
	37	algo = "md5";
	38	};
	39	u-boot-nodtb {
	40	};
	41	};
	42	atf {
	43	description = "Trusted Firmware-A";
	44	type = "firmware";
	45	os = "arm-trusted-firmware";
	46	arch = "arm64";
	47	compression = "none";
	48	load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	49	entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	50	hash {
	51	algo = "md5";
	52	};
	53	atf-bl31 {
	54	optional;
	55	};
	56	};
	57	tee {
	58	description = "OP-TEE";
	59	type = "tee";
	60	arch = "arm64";
	61	compression = "none";
	62	os = "tee";
	63	load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	64	entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
65	tee-os {
66	optional;
67	};
68	};
69	@fdt-SEQ {
70	description = "NAME";
71	type = "flat_dt";
72	arch = "arm64";
73	compression = "none";
74	load = <0x0 0x100000>;
75	hash-1 {
76	algo = "md5";
77	};
78	};
79	};
80	configurations {
81	default = "@conf-DEFAULT-SEQ";
82	@conf-SEQ {
83	description = "NAME";
84	firmware = "atf";
85	loadables = "tee", "uboot";
86	fdt = "fdt-SEQ";
87	};
88	};
89	};
90	};
91
3471dedb MS	92	itb-single {
	93	filename = "u-boot-single.itb";
	94	pad-byte = <0>;
	95
	96	fit {
	97	description = "Configuration for Xilinx ZynqMP SoC";
	98	fit,align = <0x8>;
	99	fit,external-offset = <0x0>;
	100	fit,fdt-list = "of-list";
	101	images {
	102	uboot {
	103	description = "U-Boot (64-bit)";
	104	type = "firmware";
	105	os = "u-boot";
	106	arch = "arm64";
	107	compression = "none";
	108	load = /bits/ 64 <CONFIG_TEXT_BASE>;
	109	entry = /bits/ 64 <CONFIG_TEXT_BASE>;
	110	hash {
	111	algo = "md5";
	112	};
	113	u-boot-nodtb {
	114	};
	115	};
	116	atf {
	117	description = "Trusted Firmware-A";
	118	type = "firmware";
	119	os = "arm-trusted-firmware";
	120	arch = "arm64";
	121	compression = "none";
	122	load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	123	entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	124	hash {
	125	algo = "md5";
	126	};
	127	atf-bl31 {
	128	optional;
	129	};
	130	};
	131	tee {
	132	description = "OP-TEE";
	133	type = "tee";
	134	arch = "arm64";
	135	compression = "none";
	136	os = "tee";
	137	load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	138	entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
	139	tee-os {
	140	optional;
	141	};
	142	};
	143	fdt {
	144	description = "DT";
	145	type = "flat_dt";
	146	arch = "arm64";
	147	compression = "none";
	148	load = <0x0 0x100000>;
	149	uboot-fdt-blob {
	150	filename = "u-boot.dtb";
	151	type = "blob-ext";
	152	};
	153	hash-1 {
	154	algo = "md5";
	155	};
156
157	};
158	};
159	configurations {
160	default = "conf-1";
161	conf-1 {
162	description = "Single DT";
163	firmware = "atf";
164	loadables = "tee", "uboot";
165	fdt = "fdt";
166	};
167	};
168	};
169	};
170
a4c98119 MS	171	#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS
	172	/* QSPI image for testing QSPI boot mode */
	173	image {
	174	filename = "qspi.bin";
	175	pad-byte = <0>;
	176
	177	blob-ext@1 {
	178	offset = <0x0>;
	179	filename = "spl/boot.bin";
	180	};
	181	blob-ext@2 {
	182	offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
	183	filename = "u-boot.itb";
	184	};
	185	fdtmap {
	186	};
	187	};
3471dedb MS	188
	189	image-single {
	190	filename = "qspi-single.bin";
	191	pad-byte = <0>;
	192
	193	blob-ext@1 {
	194	offset = <0x0>;
	195	filename = "spl/boot.bin";
	196	};
	197	blob-ext@2 {
	198	offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
	199	filename = "u-boot-single.itb";
	200	};
	201	fdtmap {
	202	};
	203	};
a4c98119 MS	204	#endif
	205	};
	206	};