[J-u-boot.git] / arch / arm / dts / armada-388-gp.dts

/*
 * Device Tree file for Marvell Armada 385 development board
 * (RD-88F6820-GP)
 *
 * Copyright (C) 2014 Marvell
 *
 * Gregory CLEMENT <[email protected]>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is licensed under the terms of the GNU General Public
 *     License version 2.  This program is licensed "as is" without
 *     any warranty of any kind, whether express or implied.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "armada-388.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Marvell Armada 385 GP";
	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		ethernet0 = &eth0;
		ethernet1 = &eth1;
		spi0 = &spi0;
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x80000000>; /* 2 GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

		internal-regs {
			spi@10600 {
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "st,m25p128", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <50000000>;
					m25p,fast-read;
				};
			};

			i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";
				clock-frequency = <100000>;
				/*
				 * The EEPROM located at adresse 54 is needed
				 * for the boot - DO NOT ERASE IT -
				 */

				expander0: pca9555@20 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					pinctrl-0 = <&pca0_pins>;
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x20>;
				};

				expander1: pca9555@21 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x21>;
				};

			};

			serial@12000 {
				/*
				 * Exported on the micro USB connector CON16
				 * through an FTDI
				 */

				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};

			/* GE1 CON15 */
			ethernet@30000 {
				pinctrl-names = "default";
				pinctrl-0 = <&ge1_rgmii_pins>;
				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			/* CON4 */
			usb@58000 {
				vcc-supply = <&reg_usb2_0_vbus>;
				status = "okay";
			};

			/* GE0 CON1 */
			ethernet@70000 {
				pinctrl-names = "default";
				/*
				 * The Reference Clock 0 is used to provide a
				 * clock to the PHY
				 */
				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};


			mdio@72004 {
				pinctrl-names = "default";
				pinctrl-0 = <&mdio_pins>;

				phy0: ethernet-phy@1 {
					reg = <1>;
				};

				phy1: ethernet-phy@0 {
					reg = <0>;
				};
			};

			sata@a8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata0: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata0>;
				};

				sata1: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata1>;
				};
			};

			sata@e0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata2: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata2>;
				};

				sata3: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata3>;
				};
			};

			sdhci@d8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sdhci_pins>;
				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
				no-1-8-v;
				wp-inverted;
				bus-width = <8>;
				status = "okay";
			};

			/* CON5 */
			usb3@f0000 {
				vcc-supply = <&reg_usb2_1_vbus>;
				status = "okay";
			};

			/* CON7 */
			usb3@f8000 {
				vcc-supply = <&reg_usb3_vbus>;
				status = "okay";
			};
		};

		pcie {
			status = "okay";
			/*
			 * One PCIe units is accessible through
			 * standard PCIe slot on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/*
			 * The two other PCIe units are accessible
			 * through mini PCIe slot on the board.
			 */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
			pcie@3,0 {
				/* Port 2, Lane 0 */
				status = "okay";
			};
		};

		gpio-fan {
			compatible = "gpio-fan";
			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
			gpio-fan,speed-map = <	 0 0
					      3000 1>;
		};
	};

	reg_usb3_vbus: usb3-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb3-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_0_vbus: v5-vbus0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_sata0: pwr-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata0";
		enable-active-high;
		regulator-always-on;

	};

	reg_5v_sata0: v5-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_12v_sata0: v12-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_sata1: pwr-sata1 {
		regulator-name = "pwr_en_sata1";
		compatible = "regulator-fixed";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata1: v5-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_12v_sata1: v12-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata1";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_sata2: pwr-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata2";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata2: v5-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_12v_sata2: v12-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata2";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_sata3: pwr-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata3";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata3: v5-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata3";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};

	reg_12v_sata3: v12-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata3";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};
};

&pinctrl {
	pca0_pins: pca0_pins {
		marvell,pins = "mpp18";
		marvell,function = "gpio";
	};
};
Commit	Line	Data
39a230aa SR	1	/*
	2	* Device Tree file for Marvell Armada 385 development board
	3	* (RD-88F6820-GP)
	4	*
	5	* Copyright (C) 2014 Marvell
	6	*
	7	* Gregory CLEMENT <[email protected]>
	8	*
	9	* This file is dual-licensed: you can use it either under the terms
	10	* of the GPL or the X11 license, at your option. Note that this dual
	11	* licensing only applies to this file, and not this project as a
	12	* whole.
	13	*
	14	* a) This file is licensed under the terms of the GNU General Public
	15	* License version 2. This program is licensed "as is" without
	16	* any warranty of any kind, whether express or implied.
	17	*
	18	* Or, alternatively,
	19	*
	20	* b) Permission is hereby granted, free of charge, to any person
	21	* obtaining a copy of this software and associated documentation
	22	* files (the "Software"), to deal in the Software without
	23	* restriction, including without limitation the rights to use,
	24	* copy, modify, merge, publish, distribute, sublicense, and/or
	25	* sell copies of the Software, and to permit persons to whom the
	26	* Software is furnished to do so, subject to the following
	27	* conditions:
	28	*
	29	* The above copyright notice and this permission notice shall be
	30	* included in all copies or substantial portions of the Software.
	31	*
	32	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	33	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	34	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	35	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	36	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	37	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	38	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	39	* OTHER DEALINGS IN THE SOFTWARE.
	40	*/
	41
	42	/dts-v1/;
	43	#include "armada-388.dtsi"
	44	#include <dt-bindings/gpio/gpio.h>
	45
	46	/ {
	47	model = "Marvell Armada 385 GP";
	48	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
	49
	50	chosen {
	51	stdout-path = "serial0:115200n8";
	52	};
	53
09a54c00	54	aliases {
202ededd SR	55	ethernet0 = &eth0;
202ededd SR	56	ethernet1 = &eth1;
09a54c00 SR	57	spi0 = &spi0;
	58	};
	59
39a230aa SR	60	memory {
	61	device_type = "memory";
	62	reg = <0x00000000 0x80000000>; /* 2 GB */
	63	};
	64
	65	soc {
	66	ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
	67	MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
	68
	69	internal-regs {
	70	spi@10600 {
	71	pinctrl-names = "default";
	72	pinctrl-0 = <&spi0_pins>;
	73	status = "okay";
fcede1e5 SR	74	#address-cells = <1>;
fcede1e5 SR	75	#size-cells = <0>;
39a230aa SR	76
	77	spi-flash@0 {
	78	#address-cells = <1>;
	79	#size-cells = <1>;
	80	compatible = "st,m25p128", "jedec,spi-nor";
	81	reg = <0>; /* Chip select 0 */
	82	spi-max-frequency = <50000000>;
	83	m25p,fast-read;
	84	};
	85	};
	86
	87	i2c@11000 {
	88	pinctrl-names = "default";
	89	pinctrl-0 = <&i2c0_pins>;
	90	status = "okay";
	91	clock-frequency = <100000>;
	92	/*
	93	* The EEPROM located at adresse 54 is needed
	94	* for the boot - DO NOT ERASE IT -
	95	*/
	96
	97	expander0: pca9555@20 {
	98	compatible = "nxp,pca9555";
	99	pinctrl-names = "default";
	100	pinctrl-0 = <&pca0_pins>;
	101	interrupt-parent = <&gpio0>;
	102	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	103	gpio-controller;
	104	#gpio-cells = <2>;
	105	interrupt-controller;
	106	#interrupt-cells = <2>;
	107	reg = <0x20>;
	108	};
	109
	110	expander1: pca9555@21 {
	111	compatible = "nxp,pca9555";
	112	pinctrl-names = "default";
	113	interrupt-parent = <&gpio0>;
	114	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	115	gpio-controller;
	116	#gpio-cells = <2>;
	117	interrupt-controller;
	118	#interrupt-cells = <2>;
	119	reg = <0x21>;
	120	};
	121
	122	};
	123
	124	serial@12000 {
	125	/*
	126	* Exported on the micro USB connector CON16
	127	* through an FTDI
	128	*/
	129
	130	pinctrl-names = "default";
	131	pinctrl-0 = <&uart0_pins>;
	132	status = "okay";
	133	};
	134
	135	/* GE1 CON15 */
	136	ethernet@30000 {
	137	pinctrl-names = "default";
	138	pinctrl-0 = <&ge1_rgmii_pins>;
	139	status = "okay";
140	phy = <&phy1>;
141	phy-mode = "rgmii-id";
142	};
143
144	/* CON4 */
145	usb@58000 {
146	vcc-supply = <&reg_usb2_0_vbus>;
147	status = "okay";
148	};
149
150	/* GE0 CON1 */
151	ethernet@70000 {
152	pinctrl-names = "default";
153	/*
154	* The Reference Clock 0 is used to provide a
155	* clock to the PHY
156	*/
157	pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
158	status = "okay";
159	phy = <&phy0>;
160	phy-mode = "rgmii-id";
161	};
162
163
164	mdio@72004 {
165	pinctrl-names = "default";
166	pinctrl-0 = <&mdio_pins>;
167
168	phy0: ethernet-phy@1 {
169	reg = <1>;
170	};
171
172	phy1: ethernet-phy@0 {
173	reg = <0>;
174	};
175	};
176
177	sata@a8000 {
178	pinctrl-names = "default";
179	pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
180	status = "okay";
181	#address-cells = <1>;
182	#size-cells = <0>;
183
184	sata0: sata-port@0 {
185	reg = <0>;
186	target-supply = <&reg_5v_sata0>;
187	};
188
189	sata1: sata-port@1 {
190	reg = <1>;
191	target-supply = <&reg_5v_sata1>;
192	};
193	};
194
195	sata@e0000 {
196	pinctrl-names = "default";
197	pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
198	status = "okay";
199	#address-cells = <1>;
200	#size-cells = <0>;
201
202	sata2: sata-port@0 {
203	reg = <0>;
204	target-supply = <&reg_5v_sata2>;
205	};
206
207	sata3: sata-port@1 {
208	reg = <1>;
209	target-supply = <&reg_5v_sata3>;
210	};
211	};
212
213	sdhci@d8000 {
214	pinctrl-names = "default";
215	pinctrl-0 = <&sdhci_pins>;
216	cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
217	no-1-8-v;
218	wp-inverted;
219	bus-width = <8>;
220	status = "okay";
221	};
222
223	/* CON5 */
224	usb3@f0000 {
225	vcc-supply = <&reg_usb2_1_vbus>;
226	status = "okay";
227	};
228
229	/* CON7 */
230	usb3@f8000 {
231	vcc-supply = <&reg_usb3_vbus>;
232	status = "okay";
233	};
234	};
235
825dd50f	236	pcie {
39a230aa SR	237	status = "okay";
	238	/*
	239	* One PCIe units is accessible through
	240	* standard PCIe slot on the board.
	241	*/
	242	pcie@1,0 {
	243	/* Port 0, Lane 0 */
	244	status = "okay";
	245	};
	246
	247	/*
	248	* The two other PCIe units are accessible
	249	* through mini PCIe slot on the board.
	250	*/
	251	pcie@2,0 {
	252	/* Port 1, Lane 0 */
	253	status = "okay";
	254	};
	255	pcie@3,0 {
	256	/* Port 2, Lane 0 */
	257	status = "okay";
	258	};
	259	};
	260
	261	gpio-fan {
	262	compatible = "gpio-fan";
	263	gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
	264	gpio-fan,speed-map = < 0 0
	265	3000 1>;
	266	};
	267	};
	268
	269	reg_usb3_vbus: usb3-vbus {
	270	compatible = "regulator-fixed";
	271	regulator-name = "usb3-vbus";
	272	regulator-min-microvolt = <5000000>;
	273	regulator-max-microvolt = <5000000>;
	274	enable-active-high;
	275	regulator-always-on;
	276	gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
	277	};
	278
	279	reg_usb2_0_vbus: v5-vbus0 {
	280	compatible = "regulator-fixed";
	281	regulator-name = "v5.0-vbus0";
	282	regulator-min-microvolt = <5000000>;
	283	regulator-max-microvolt = <5000000>;
	284	enable-active-high;
	285	regulator-always-on;
	286	gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
	287	};
	288
	289	reg_usb2_1_vbus: v5-vbus1 {
	290	compatible = "regulator-fixed";
	291	regulator-name = "v5.0-vbus1";
	292	regulator-min-microvolt = <5000000>;
	293	regulator-max-microvolt = <5000000>;
	294	enable-active-high;
	295	regulator-always-on;
	296	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	297	};
	298
	299	reg_usb2_1_vbus: v5-vbus1 {
	300	compatible = "regulator-fixed";
301	regulator-name = "v5.0-vbus1";
302	regulator-min-microvolt = <5000000>;
303	regulator-max-microvolt = <5000000>;
304	enable-active-high;
305	regulator-always-on;
306	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
307	};
308
309	reg_sata0: pwr-sata0 {
310	compatible = "regulator-fixed";
311	regulator-name = "pwr_en_sata0";
312	enable-active-high;
313	regulator-always-on;
314
315	};
316
317	reg_5v_sata0: v5-sata0 {
318	compatible = "regulator-fixed";
319	regulator-name = "v5.0-sata0";
320	regulator-min-microvolt = <5000000>;
321	regulator-max-microvolt = <5000000>;
322	regulator-always-on;
323	vin-supply = <&reg_sata0>;
324	};
325
326	reg_12v_sata0: v12-sata0 {
327	compatible = "regulator-fixed";
328	regulator-name = "v12.0-sata0";
329	regulator-min-microvolt = <12000000>;
330	regulator-max-microvolt = <12000000>;
331	regulator-always-on;
332	vin-supply = <&reg_sata0>;
333	};
334
335	reg_sata1: pwr-sata1 {
336	regulator-name = "pwr_en_sata1";
337	compatible = "regulator-fixed";
338	regulator-min-microvolt = <12000000>;
339	regulator-max-microvolt = <12000000>;
340	enable-active-high;
341	regulator-always-on;
342	gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
343	};
344
345	reg_5v_sata1: v5-sata1 {
346	compatible = "regulator-fixed";
347	regulator-name = "v5.0-sata1";
348	regulator-min-microvolt = <5000000>;
349	regulator-max-microvolt = <5000000>;
350	regulator-always-on;
351	vin-supply = <&reg_sata1>;
352	};
353
354	reg_12v_sata1: v12-sata1 {
355	compatible = "regulator-fixed";
356	regulator-name = "v12.0-sata1";
357	regulator-min-microvolt = <12000000>;
358	regulator-max-microvolt = <12000000>;
359	regulator-always-on;
360	vin-supply = <&reg_sata1>;
361	};
362
363	reg_sata2: pwr-sata2 {
364	compatible = "regulator-fixed";
365	regulator-name = "pwr_en_sata2";
366	enable-active-high;
367	regulator-always-on;
368	gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
369	};
370
371	reg_5v_sata2: v5-sata2 {
372	compatible = "regulator-fixed";
373	regulator-name = "v5.0-sata2";
374	regulator-min-microvolt = <5000000>;
375	regulator-max-microvolt = <5000000>;
376	regulator-always-on;
377	vin-supply = <&reg_sata2>;
378	};
379
380	reg_12v_sata2: v12-sata2 {
381	compatible = "regulator-fixed";
382	regulator-name = "v12.0-sata2";
383	regulator-min-microvolt = <12000000>;
384	regulator-max-microvolt = <12000000>;
385	regulator-always-on;
386	vin-supply = <&reg_sata2>;
387	};
388
389	reg_sata3: pwr-sata3 {
390	compatible = "regulator-fixed";
391	regulator-name = "pwr_en_sata3";
392	enable-active-high;
393	regulator-always-on;
394	gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
395	};
396
397	reg_5v_sata3: v5-sata3 {
398	compatible = "regulator-fixed";
399	regulator-name = "v5.0-sata3";
400	regulator-min-microvolt = <5000000>;
401	regulator-max-microvolt = <5000000>;
402	regulator-always-on;
403	vin-supply = <&reg_sata3>;
404	};
405
406	reg_12v_sata3: v12-sata3 {
407	compatible = "regulator-fixed";
408	regulator-name = "v12.0-sata3";
409	regulator-min-microvolt = <12000000>;
410	regulator-max-microvolt = <12000000>;
411	regulator-always-on;
412	vin-supply = <&reg_sata3>;
413	};
414	};
415
416	&pinctrl {
417	pca0_pins: pca0_pins {
418	marvell,pins = "mpp18";
419	marvell,function = "gpio";
420	};
421	};