[J-u-boot.git] / include / configs / ls1012ardb.h

/*
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __LS1012ARDB_H__
#define __LS1012ARDB_H__

#include "ls1012a_common.h"

/* DDR */
#define CONFIG_DIMM_SLOTS_PER_CTLR	1
#define CONFIG_CHIP_SELECTS_PER_CTRL	1
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_SYS_SDRAM_SIZE		0x40000000
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x9fffffff


/*
 * I2C IO expander
 */

#define I2C_MUX_IO1_ADDR	0x24
#define __SW_BOOT_MASK		0xFC
#define __SW_BOOT_EMU		0x10
#define __SW_BOOT_BANK1		0x00
#define __SW_BOOT_BANK2		0x01
#define __SW_REV_MASK		0x07
#define __SW_REV_A		0xF8
#define __SW_REV_B		0xF0

/*  MMC  */
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif

/* SATA */
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI_PLAT

#define CONFIG_SYS_SATA				AHCI_BASE_ADDR

#define CONFIG_SYS_SCSI_MAX_SCSI_ID		1
#define CONFIG_SYS_SCSI_MAX_LUN			1
#define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
						CONFIG_SYS_SCSI_MAX_LUN)

#define CONFIG_PCIE1		/* PCIE controller 1 */

#define CONFIG_PCI_SCAN_SHOW

#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x9fffffff


#include <asm/fsl_secure_boot.h>

#endif /* __LS1012ARDB_H__ */
Commit	Line	Data
3b6e3898 PK	1	/*
	2	* Copyright 2016 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __LS1012ARDB_H__
	8	#define __LS1012ARDB_H__
	9
	10	#include "ls1012a_common.h"
	11
b9e745bb	12	/* DDR */
3b6e3898 PK	13	#define CONFIG_DIMM_SLOTS_PER_CTLR 1
	14	#define CONFIG_CHIP_SELECTS_PER_CTRL 1
	15	#define CONFIG_NR_DRAM_BANKS 2
	16	#define CONFIG_SYS_SDRAM_SIZE 0x40000000
3b6e3898 PK	17	#define CONFIG_CMD_MEMINFO
	18	#define CONFIG_CMD_MEMTEST
	19	#define CONFIG_SYS_MEMTEST_START 0x80000000
	20	#define CONFIG_SYS_MEMTEST_END 0x9fffffff
	21
3b6e3898 PK	22
	23	/*
	24	* I2C IO expander
	25	*/
	26
	27	#define I2C_MUX_IO1_ADDR 0x24
	28	#define __SW_BOOT_MASK 0xFC
	29	#define __SW_BOOT_EMU 0x10
	30	#define __SW_BOOT_BANK1 0x00
	31	#define __SW_BOOT_BANK2 0x01
	32	#define __SW_REV_MASK 0x07
	33	#define __SW_REV_A 0xF8
	34	#define __SW_REV_B 0xF0
	35
	36	/* MMC */
3b6e3898 PK	37	#ifdef CONFIG_MMC
	38	#define CONFIG_FSL_ESDHC
	39	#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
3b6e3898 PK	40	#endif
	41
	42	/* SATA */
	43	#define CONFIG_LIBATA
3b6e3898	44	#define CONFIG_SCSI_AHCI_PLAT
3b6e3898 PK	45
	46	#define CONFIG_SYS_SATA AHCI_BASE_ADDR
	47
	48	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	49	#define CONFIG_SYS_SCSI_MAX_LUN 1
	50	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	51	CONFIG_SYS_SCSI_MAX_LUN)
9e0bb4c1	52
3b6e3898	53	#define CONFIG_PCIE1 /* PCIE controller 1 */
3b6e3898	54
3b6e3898	55	#define CONFIG_PCI_SCAN_SHOW
3b6e3898 PK	56
	57	#define CONFIG_CMD_MEMINFO
	58	#define CONFIG_CMD_MEMTEST
	59	#define CONFIG_SYS_MEMTEST_START 0x80000000
	60	#define CONFIG_SYS_MEMTEST_END 0x9fffffff
	61
11d14bfb VPB	62
	63	#include <asm/fsl_secure_boot.h>
	64
3b6e3898	65	#endif /* __LS1012ARDB_H__ */