]>
Commit | Line | Data |
---|---|---|
c021880a | 1 | /* |
414eec35 | 2 | * (C) Copyright 2003-2005 |
c021880a WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * This file contains the configuration parameters for the INCA-IP board. | |
26 | */ | |
27 | ||
28 | #ifndef __CONFIG_H | |
29 | #define __CONFIG_H | |
30 | ||
31 | #define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */ | |
32 | #define CONFIG_INCA_IP 1 /* on a INCA-IP Board */ | |
33 | ||
e0ac62d7 | 34 | #ifndef CPU_CLOCK_RATE |
d791b1dc | 35 | /* allowed values: 100000000, 133000000, and 150000000 */ |
b299e41a | 36 | #define CPU_CLOCK_RATE 150000000 /* default: 150 MHz clock for the MIPS core */ |
e0ac62d7 | 37 | #endif |
c021880a | 38 | |
7cb22f97 | 39 | #define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */ |
c021880a | 40 | |
3e38691e | 41 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
c021880a | 42 | |
3e38691e | 43 | #define CONFIG_BAUDRATE 115200 |
c021880a WD |
44 | |
45 | /* valid baudrates */ | |
6d0f6bcf | 46 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
c021880a | 47 | |
3e38691e WD |
48 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
49 | ||
50 | #define CONFIG_PREBOOT "echo;" \ | |
32bf3d14 | 51 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
3e38691e WD |
52 | "echo" |
53 | ||
54 | #undef CONFIG_BOOTARGS | |
55 | ||
56 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
57 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 58 | "nfsroot=${serverip}:${rootpath}\0" \ |
3e38691e | 59 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
fe126d8b WD |
60 | "addip=setenv bootargs ${bootargs} " \ |
61 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
62 | ":${hostname}:${netdev}:off\0" \ | |
63 | "addmisc=setenv bootargs ${bootargs} " \ | |
64 | "console=ttyS0,${baudrate} " \ | |
65 | "ethaddr=${ethaddr} " \ | |
3e38691e WD |
66 | "panic=1\0" \ |
67 | "flash_nfs=run nfsargs addip addmisc;" \ | |
fe126d8b | 68 | "bootm ${kernel_addr}\0" \ |
3e38691e | 69 | "flash_self=run ramargs addip addmisc;" \ |
fe126d8b WD |
70 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
71 | "net_nfs=tftp 80500000 ${bootfile};" \ | |
3e38691e WD |
72 | "run nfsargs addip addmisc;bootm\0" \ |
73 | "rootpath=/opt/eldk/mips_4KC\0" \ | |
74 | "bootfile=/tftpboot/INCA/uImage\0" \ | |
75 | "kernel_addr=B0040000\0" \ | |
76 | "ramdisk_addr=B0100000\0" \ | |
77 | "u-boot=/tftpboot/INCA/u-boot.bin\0" \ | |
fe126d8b | 78 | "load=tftp 80500000 ${u-boot}\0" \ |
3e38691e | 79 | "update=protect off 1:0-2;era 1:0-2;" \ |
fe126d8b | 80 | "cp.b 80500000 B0000000 ${filesize}\0" \ |
3e38691e WD |
81 | "" |
82 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
83 | ||
1d2c6bc4 | 84 | |
7f5c0157 JL |
85 | /* |
86 | * BOOTP options | |
87 | */ | |
88 | #define CONFIG_BOOTP_BOOTFILESIZE | |
89 | #define CONFIG_BOOTP_BOOTPATH | |
90 | #define CONFIG_BOOTP_GATEWAY | |
91 | #define CONFIG_BOOTP_HOSTNAME | |
92 | ||
93 | ||
1d2c6bc4 JL |
94 | /* |
95 | * Command line configuration. | |
96 | */ | |
97 | #include <config_cmd_default.h> | |
98 | ||
99 | #define CONFIG_CMD_ASKENV | |
100 | #define CONFIG_CMD_DHCP | |
101 | #define CONFIG_CMD_ELF | |
102 | #define CONFIG_CMD_JFFS2 | |
103 | #define CONFIG_CMD_NFS | |
104 | #define CONFIG_CMD_PING | |
105 | #define CONFIG_CMD_SNTP | |
106 | ||
c021880a WD |
107 | |
108 | /* | |
109 | * Miscellaneous configurable options | |
110 | */ | |
6d0f6bcf JCPV |
111 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
112 | #define CONFIG_SYS_PROMPT "INCA-IP # " /* Monitor Command Prompt */ | |
113 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
114 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
115 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ | |
c021880a | 116 | |
6d0f6bcf | 117 | #define CONFIG_SYS_MALLOC_LEN 128*1024 |
3e38691e | 118 | |
6d0f6bcf | 119 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
3e38691e | 120 | |
6d0f6bcf | 121 | #define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2) |
a55d4817 | 122 | |
6d0f6bcf | 123 | #define CONFIG_SYS_HZ 1000 |
3e38691e | 124 | |
6d0f6bcf | 125 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
3e38691e | 126 | |
6d0f6bcf | 127 | #define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */ |
c021880a | 128 | |
6d0f6bcf JCPV |
129 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
130 | #define CONFIG_SYS_MEMTEST_END 0x80800000 | |
c021880a WD |
131 | |
132 | /*----------------------------------------------------------------------- | |
133 | * FLASH and environment organization | |
134 | */ | |
6d0f6bcf JCPV |
135 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
136 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ | |
c021880a WD |
137 | |
138 | #define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */ | |
139 | #define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */ | |
140 | ||
141 | /* The following #defines are needed to get flash environment right */ | |
6d0f6bcf JCPV |
142 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE |
143 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) | |
c021880a | 144 | |
6d0f6bcf | 145 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
c021880a | 146 | |
6d0f6bcf | 147 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
c021880a WD |
148 | |
149 | /* timeout values are in ticks */ | |
6d0f6bcf JCPV |
150 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
151 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
c021880a | 152 | |
5a1aceb0 | 153 | #define CONFIG_ENV_IS_IN_FLASH 1 |
c021880a WD |
154 | |
155 | /* Address and size of Primary Environment Sector */ | |
0e8d1586 JCPV |
156 | #define CONFIG_ENV_ADDR 0xB0030000 |
157 | #define CONFIG_ENV_SIZE 0x10000 | |
c021880a WD |
158 | |
159 | #define CONFIG_FLASH_16BIT | |
160 | ||
161 | #define CONFIG_NR_DRAM_BANKS 1 | |
162 | ||
163 | #define CONFIG_INCA_IP_SWITCH | |
164 | #define CONFIG_NET_MULTI | |
0c852a28 | 165 | #define CONFIG_INCA_IP_SWITCH_AMDIX |
c021880a | 166 | |
700a0c64 WD |
167 | /* |
168 | * JFFS2 partitions | |
169 | */ | |
170 | /* No command line, one static partition, use all space on the device */ | |
171 | #undef CONFIG_JFFS2_CMDLINE | |
172 | #define CONFIG_JFFS2_DEV "nor1" | |
173 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF | |
174 | #define CONFIG_JFFS2_PART_OFFSET 0x00000000 | |
175 | ||
176 | /* mtdparts command line support */ | |
177 | /* | |
178 | #define CONFIG_JFFS2_CMDLINE | |
179 | #define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0" | |
180 | #define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \ | |
181 | "64k(env)," \ | |
182 | "768k(linux)," \ | |
183 | "1m@3m(rootfs)," \ | |
184 | "768k(linux2)," \ | |
185 | "3m@5m(rootfs2)" | |
186 | */ | |
5c745d26 | 187 | |
c021880a WD |
188 | /*----------------------------------------------------------------------- |
189 | * Cache Configuration | |
190 | */ | |
6d0f6bcf JCPV |
191 | #define CONFIG_SYS_DCACHE_SIZE 4096 |
192 | #define CONFIG_SYS_ICACHE_SIZE 4096 | |
193 | #define CONFIG_SYS_CACHELINE_SIZE 16 | |
c021880a WD |
194 | |
195 | #endif /* __CONFIG_H */ |