[J-u-boot.git] / include / configs / at91sam9261ek.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2007-2008
 * Stelian Pop <[email protected]>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9261EK board.
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */

#ifdef CONFIG_AT91SAM9G10
#define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
#else
#define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
#endif

#include <asm/hardware.h>

#define CONFIG_ATMEL_LEGACY

/*
 * Hardware drivers
 */

/* LCD */
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_LCD
#ifdef CONFIG_AT91SAM9261EK
#define CONFIG_ATMEL_LCD_BGR555
#endif

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x04000000
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			0x40000000
#define CONFIG_SYS_NAND_DBW_8
/* our ALE is AD22 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
/* our CLE is AD21 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15

#endif

/* Ethernet */
#define CONFIG_DRIVER_DM9000
#define CONFIG_DM9000_BASE		0x30000000
#define DM9000_IO			CONFIG_DM9000_BASE
#define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
#define CONFIG_DM9000_USE_16BIT
#define CONFIG_DM9000_NO_SROM
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
#ifdef CONFIG_AT91SAM9G10EK
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
#else
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
#endif
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2

#ifdef CONFIG_SYS_USE_DATAFLASH_CS0

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x84000 0x294000; " \
				"bootm 0x22000000"

#elif CONFIG_SYS_USE_DATAFLASH_CS3

/* bootstrap + u-boot + env + linux in dataflash on CS3 */
#define CONFIG_BOOTCOMMAND	"sf probe 0:3; " \
				"sf read 0x22000000 0x84000 0x294000; " \
				"bootm 0x22000000"

#else /* CONFIG_SYS_USE_NANDFLASH */

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
#endif

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
d99a8ff6 SP	2	/*
d99a8ff6 SP	3	* (C) Copyright 2007-2008
c9e798d3	4	* Stelian Pop <[email protected]>
d99a8ff6 SP	5	* Lead Tech Design <www.leadtechdesign.com>
	6	*
	7	* Configuation settings for the AT91SAM9261EK board.
d99a8ff6 SP	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	/* ARM asynchronous clock */
f7aea46d	14	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
7c966a8b	15	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
d99a8ff6	16
f7aea46d XH	17	#ifdef CONFIG_AT91SAM9G10
f7aea46d XH	18	#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
5ccc2d99	19	#else
f7aea46d	20	#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
5ccc2d99	21	#endif
f7aea46d XH	22
	23	#include <asm/hardware.h>
	24
f7aea46d	25	#define CONFIG_ATMEL_LEGACY
f7aea46d	26
d99a8ff6 SP	27	/*
	28	* Hardware drivers
	29	*/
f7aea46d	30
820f2a95	31	/* LCD */
820f2a95	32	#define LCD_BPP LCD_COLOR8
f7aea46d	33	#define CONFIG_LCD_LOGO
820f2a95	34	#undef LCD_TEST_PATTERN
f7aea46d XH	35	#define CONFIG_LCD_INFO
f7aea46d XH	36	#define CONFIG_LCD_INFO_BELOW_LOGO
f7aea46d	37	#define CONFIG_ATMEL_LCD
5ccc2d99	38	#ifdef CONFIG_AT91SAM9261EK
f7aea46d	39	#define CONFIG_ATMEL_LCD_BGR555
5ccc2d99	40	#endif
f7aea46d	41
d99a8ff6 SP	42	/*
	43	* BOOTP options
	44	*/
f7aea46d	45	#define CONFIG_BOOTP_BOOTFILESIZE
d99a8ff6	46
d99a8ff6	47	/* SDRAM */
f7aea46d XH	48	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	49	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	50	#define CONFIG_SYS_INIT_SP_ADDR \
324873e7	51	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
d99a8ff6 SP	52
d99a8ff6 SP	53	/* NAND flash */
74c076d6	54	#ifdef CONFIG_CMD_NAND
6d0f6bcf JCPV	55	#define CONFIG_SYS_MAX_NAND_DEVICE 1
6d0f6bcf JCPV	56	#define CONFIG_SYS_NAND_BASE 0x40000000
f7aea46d	57	#define CONFIG_SYS_NAND_DBW_8
74c076d6 JCPV	58	/* our ALE is AD22 */
	59	#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
	60	/* our CLE is AD21 */
	61	#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
	62	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	63	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
2eb99ca8	64
74c076d6	65	#endif
d99a8ff6	66
d99a8ff6	67	/* Ethernet */
f7aea46d	68	#define CONFIG_DRIVER_DM9000
d99a8ff6 SP	69	#define CONFIG_DM9000_BASE 0x30000000
	70	#define DM9000_IO CONFIG_DM9000_BASE
	71	#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
f7aea46d XH	72	#define CONFIG_DM9000_USE_16BIT
f7aea46d XH	73	#define CONFIG_DM9000_NO_SROM
d99a8ff6	74	#define CONFIG_NET_RETRY_COUNT 20
f7aea46d	75	#define CONFIG_RESET_PHY_R
d99a8ff6 SP	76
d99a8ff6 SP	77	/* USB */
2b7178af	78	#define CONFIG_USB_ATMEL
dcd2f1a0	79	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
f7aea46d	80	#define CONFIG_USB_OHCI_NEW
f7aea46d	81	#define CONFIG_SYS_USB_OHCI_CPU_INIT
6d0f6bcf	82	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
5ccc2d99 SG	83	#ifdef CONFIG_AT91SAM9G10EK
	84	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
	85	#else
6d0f6bcf	86	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
5ccc2d99	87	#endif
6d0f6bcf	88	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
d99a8ff6	89
6d0f6bcf	90	#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
d99a8ff6 SP	91
d99a8ff6 SP	92	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
324873e7 WY	93	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	94	"sf read 0x22000000 0x84000 0x294000; " \
	95	"bootm 0x22000000"
d99a8ff6	96
89a7a87f NF	97	#elif CONFIG_SYS_USE_DATAFLASH_CS3
	98
	99	/* bootstrap + u-boot + env + linux in dataflash on CS3 */
324873e7 WY	100	#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
	101	"sf read 0x22000000 0x84000 0x294000; " \
	102	"bootm 0x22000000"
89a7a87f	103
6d0f6bcf	104	#else /* CONFIG_SYS_USE_NANDFLASH */
d99a8ff6 SP	105
d99a8ff6 SP	106	/* bootstrap + u-boot + env + linux in nandflash */
0c58cfa9	107	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
d99a8ff6 SP	108	#endif
d99a8ff6 SP	109
d99a8ff6	110	#endif