]> Git Repo - J-u-boot.git/blame - common/spl/spl_fit.c
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C
[J-u-boot.git] / common / spl / spl_fit.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
f1dcee59
SG
2/*
3 * Copyright (C) 2016 Google, Inc
4 * Written by Simon Glass <[email protected]>
f1dcee59
SG
5 */
6
7#include <common.h>
8#include <errno.h>
3313ae66 9#include <fpga.h>
0c670fc1 10#include <gzip.h>
f1dcee59 11#include <image.h>
f7ae49fc 12#include <log.h>
ea376ebc 13#include <malloc.h>
891d9e84 14#include <mapmem.h>
f1dcee59 15#include <spl.h>
3a8ee3df 16#include <sysinfo.h>
90526e9f 17#include <asm/cache.h>
401d1c4f 18#include <asm/global_data.h>
ea376ebc 19#include <linux/libfdt.h>
f1dcee59 20
b83edfbd
LA
21DECLARE_GLOBAL_DATA_PTR;
22
ea376ebc
JJH
23#ifndef CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ
24#define CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ (64 * 1024)
25#endif
26
7264f292
YS
27#ifndef CONFIG_SYS_BOOTM_LEN
28#define CONFIG_SYS_BOOTM_LEN (64 << 20)
29#endif
30
917fa369
AG
31struct spl_fit_info {
32 const void *fit; /* Pointer to a valid FIT blob */
33 size_t ext_data_offset; /* Offset to FIT external data (end of FIT) */
34 int images_node; /* FDT offset to "/images" node */
9e9aa0b4 35 int conf_node; /* FDT offset to selected configuration node */
917fa369
AG
36};
37
efc4ad0b 38__weak void board_spl_fit_post_load(const void *fit)
e246bfcf
YL
39{
40}
41
42__weak ulong board_spl_fit_size_align(ulong size)
43{
44 return size;
45}
46
152781d4
JJH
47static int find_node_from_desc(const void *fit, int node, const char *str)
48{
49 int child;
50
51 if (node < 0)
52 return -EINVAL;
53
54 /* iterate the FIT nodes and find a matching description */
55 for (child = fdt_first_subnode(fit, node); child >= 0;
56 child = fdt_next_subnode(fit, child)) {
57 int len;
58 const char *desc = fdt_getprop(fit, child, "description", &len);
59
60 if (!desc)
61 continue;
62
63 if (!strcmp(desc, str))
64 return child;
65 }
66
67 return -ENOENT;
68}
69
736806fb 70/**
a616c783 71 * spl_fit_get_image_name(): By using the matching configuration subnode,
736806fb
AP
72 * retrieve the name of an image, specified by a property name and an index
73 * into that.
74 * @fit: Pointer to the FDT blob.
75 * @images: Offset of the /images subnode.
76 * @type: Name of the property within the configuration subnode.
77 * @index: Index into the list of strings in this property.
a616c783 78 * @outname: Name of the image
736806fb 79 *
a616c783 80 * Return: 0 on success, or a negative error number
736806fb 81 */
3dc20797 82static int spl_fit_get_image_name(const struct spl_fit_info *ctx,
a616c783 83 const char *type, int index,
c1648d05 84 const char **outname)
4b9340ab 85{
3a8ee3df 86 struct udevice *sysinfo;
4b9340ab 87 const char *name, *str;
a616c783 88 __maybe_unused int node;
4b9340ab 89 int len, i;
152781d4 90 bool found = true;
4b9340ab 91
9e9aa0b4 92 name = fdt_getprop(ctx->fit, ctx->conf_node, type, &len);
4b9340ab
AP
93 if (!name) {
94 debug("cannot find property '%s': %d\n", type, len);
95 return -EINVAL;
96 }
f1dcee59 97
4b9340ab
AP
98 str = name;
99 for (i = 0; i < index; i++) {
100 str = strchr(str, '\0') + 1;
101 if (!str || (str - name >= len)) {
152781d4
JJH
102 found = false;
103 break;
4b9340ab 104 }
f1dcee59
SG
105 }
106
3a8ee3df 107 if (!found && CONFIG_IS_ENABLED(SYSINFO) && !sysinfo_get(&sysinfo)) {
152781d4
JJH
108 int rc;
109 /*
3a8ee3df
SG
110 * no string in the property for this index. Check if the
111 * sysinfo-level code can supply one.
152781d4 112 */
4d65c6bc
SA
113 rc = sysinfo_detect(sysinfo);
114 if (rc)
115 return rc;
116
3a8ee3df
SG
117 rc = sysinfo_get_fit_loadable(sysinfo, index - i - 1, type,
118 &str);
152781d4
JJH
119 if (rc && rc != -ENOENT)
120 return rc;
121
122 if (!rc) {
123 /*
3a8ee3df 124 * The sysinfo provided a name for a loadable.
152781d4
JJH
125 * Try to match it against the description properties
126 * first. If no matching node is found, use it as a
127 * node name.
128 */
129 int node;
3dc20797 130 int images = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH);
152781d4 131
3dc20797 132 node = find_node_from_desc(ctx->fit, images, str);
152781d4 133 if (node > 0)
3dc20797 134 str = fdt_get_name(ctx->fit, node, NULL);
152781d4
JJH
135
136 found = true;
137 }
138 }
139
140 if (!found) {
141 debug("no string for index %d\n", index);
142 return -E2BIG;
143 }
144
145 *outname = str;
a616c783
PT
146 return 0;
147}
148
149/**
150 * spl_fit_get_image_node(): By using the matching configuration subnode,
151 * retrieve the name of an image, specified by a property name and an index
152 * into that.
153 * @fit: Pointer to the FDT blob.
154 * @images: Offset of the /images subnode.
155 * @type: Name of the property within the configuration subnode.
156 * @index: Index into the list of strings in this property.
157 *
158 * Return: the node offset of the respective image node or a negative
159 * error number.
160 */
3dc20797 161static int spl_fit_get_image_node(const struct spl_fit_info *ctx,
a616c783
PT
162 const char *type, int index)
163{
c1648d05 164 const char *str;
a616c783
PT
165 int err;
166 int node;
167
3dc20797 168 err = spl_fit_get_image_name(ctx, type, index, &str);
a616c783
PT
169 if (err)
170 return err;
171
4b9340ab 172 debug("%s: '%s'\n", type, str);
a616c783 173
3dc20797 174 node = fdt_subnode_offset(ctx->fit, ctx->images_node, str);
4b9340ab 175 if (node < 0) {
19141d69 176 pr_err("cannot find image node '%s': %d\n", str, node);
4b9340ab 177 return -EINVAL;
f1dcee59 178 }
f1dcee59 179
736806fb 180 return node;
f1dcee59
SG
181}
182
eafd5410
LV
183static int get_aligned_image_offset(struct spl_load_info *info, int offset)
184{
185 /*
186 * If it is a FS read, get the first address before offset which is
187 * aligned to ARCH_DMA_MINALIGN. If it is raw read return the
188 * block number to which offset belongs.
189 */
190 if (info->filename)
191 return offset & ~(ARCH_DMA_MINALIGN - 1);
192
193 return offset / info->bl_len;
194}
195
196static int get_aligned_image_overhead(struct spl_load_info *info, int offset)
197{
198 /*
199 * If it is a FS read, get the difference between the offset and
200 * the first address before offset which is aligned to
201 * ARCH_DMA_MINALIGN. If it is raw read return the offset within the
202 * block.
203 */
204 if (info->filename)
205 return offset & (ARCH_DMA_MINALIGN - 1);
206
207 return offset % info->bl_len;
208}
209
210static int get_aligned_image_size(struct spl_load_info *info, int data_size,
211 int offset)
212{
3cc1f380
LV
213 data_size = data_size + get_aligned_image_overhead(info, offset);
214
eafd5410 215 if (info->filename)
3cc1f380 216 return data_size;
eafd5410
LV
217
218 return (data_size + info->bl_len - 1) / info->bl_len;
219}
220
8baa3818
AP
221/**
222 * spl_load_fit_image(): load the image described in a certain FIT node
223 * @info: points to information about the device to load data from
224 * @sector: the start sector of the FIT image on the device
3dc20797 225 * @ctx: points to the FIT context structure
8baa3818 226 * @node: offset of the DT node describing the image to load (relative
a616c783 227 * to @fit)
8baa3818 228 * @image_info: will be filled with information about the loaded image
a616c783
PT
229 * If the FIT node does not contain a "load" (address) property,
230 * the image gets loaded to the address pointed to by the
f0a6ec36 231 * load_addr member in this struct, if load_addr is not 0
8baa3818
AP
232 *
233 * Return: 0 on success or a negative error number.
234 */
235static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
3dc20797 236 const struct spl_fit_info *ctx, int node,
8baa3818
AP
237 struct spl_image_info *image_info)
238{
3313ae66 239 int offset;
8baa3818 240 size_t length;
5fd13d97 241 int len;
933f67aa 242 ulong size;
891d9e84
SG
243 ulong load_addr;
244 void *load_ptr;
8baa3818
AP
245 void *src;
246 ulong overhead;
247 int nr_sectors;
7264f292 248 uint8_t image_comp = -1, type = -1;
5fd13d97 249 const void *data;
3dc20797 250 const void *fit = ctx->fit;
a1be94b6 251 bool external_data = false;
7264f292 252
29bd8ada 253 if (IS_ENABLED(CONFIG_SPL_FPGA) ||
56419ea5
MV
254 (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP))) {
255 if (fit_image_get_type(fit, node, &type))
256 puts("Cannot get image type.\n");
257 else
258 debug("%s ", genimg_get_type_name(type));
259 }
260
602ce1d1
KS
261 if (IS_ENABLED(CONFIG_SPL_GZIP)) {
262 fit_image_get_comp(fit, node, &image_comp);
263 debug("%s ", genimg_get_comp_name(image_comp));
7264f292 264 }
8baa3818 265
f0a6ec36
AG
266 if (fit_image_get_load(fit, node, &load_addr)) {
267 if (!image_info->load_addr) {
268 printf("Can't load %s: No load address and no buffer\n",
269 fit_get_name(fit, node, NULL));
270 return -ENOBUFS;
271 }
8baa3818 272 load_addr = image_info->load_addr;
f0a6ec36 273 }
8baa3818 274
a1be94b6
PF
275 if (!fit_image_get_data_position(fit, node, &offset)) {
276 external_data = true;
277 } else if (!fit_image_get_data_offset(fit, node, &offset)) {
3dc20797 278 offset += ctx->ext_data_offset;
a1be94b6
PF
279 external_data = true;
280 }
281
282 if (external_data) {
891d9e84
SG
283 void *src_ptr;
284
a1be94b6 285 /* External data */
5fd13d97
YS
286 if (fit_image_get_data_size(fit, node, &len))
287 return -ENOENT;
288
891d9e84 289 src_ptr = map_sysmem(ALIGN(load_addr, ARCH_DMA_MINALIGN), len);
5fd13d97
YS
290 length = len;
291
292 overhead = get_aligned_image_overhead(info, offset);
293 nr_sectors = get_aligned_image_size(info, length, offset);
294
3313ae66
MS
295 if (info->read(info,
296 sector + get_aligned_image_offset(info, offset),
891d9e84 297 nr_sectors, src_ptr) != nr_sectors)
5fd13d97
YS
298 return -EIO;
299
891d9e84
SG
300 debug("External data: dst=%p, offset=%x, size=%lx\n",
301 src_ptr, offset, (unsigned long)length);
302 src = src_ptr + overhead;
5fd13d97
YS
303 } else {
304 /* Embedded data */
305 if (fit_image_get_data(fit, node, &data, &length)) {
306 puts("Cannot get image data/size\n");
307 return -ENOENT;
308 }
309 debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
310 (unsigned long)length);
891d9e84 311 src = (void *)data; /* cast away const */
5fd13d97 312 }
8baa3818 313
aeedeae4
AG
314 if (CONFIG_IS_ENABLED(FIT_SIGNATURE)) {
315 printf("## Checking hash(es) for Image %s ... ",
316 fit_get_name(fit, node, NULL));
317 if (!fit_image_verify_with_data(fit, node, src, length))
318 return -EPERM;
319 puts("OK\n");
320 }
d154ca60 321
aeedeae4 322 if (CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS))
481d394e 323 board_fit_image_post_process(fit, node, &src, &length);
8baa3818 324
891d9e84 325 load_ptr = map_sysmem(load_addr, length);
975e7893 326 if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
933f67aa 327 size = length;
891d9e84 328 if (gunzip(load_ptr, CONFIG_SYS_BOOTM_LEN, src, &size)) {
7264f292
YS
329 puts("Uncompressing error\n");
330 return -EIO;
331 }
933f67aa 332 length = size;
7264f292 333 } else {
891d9e84 334 memcpy(load_ptr, src, length);
7264f292 335 }
8baa3818
AP
336
337 if (image_info) {
caa7fc2c
MS
338 ulong entry_point;
339
8baa3818
AP
340 image_info->load_addr = load_addr;
341 image_info->size = length;
caa7fc2c
MS
342
343 if (!fit_image_get_entry(fit, node, &entry_point))
344 image_info->entry_point = entry_point;
345 else
346 image_info->entry_point = FDT_ERROR;
8baa3818
AP
347 }
348
349 return 0;
350}
351
71551055
AG
352static bool os_takes_devicetree(uint8_t os)
353{
354 switch (os) {
355 case IH_OS_U_BOOT:
356 return true;
357 case IH_OS_LINUX:
358 return IS_ENABLED(CONFIG_SPL_OS_BOOT);
359 default:
360 return false;
361 }
362}
363
d879616e
PT
364static int spl_fit_append_fdt(struct spl_image_info *spl_image,
365 struct spl_load_info *info, ulong sector,
3dc20797 366 const struct spl_fit_info *ctx)
d879616e
PT
367{
368 struct spl_image_info image_info;
9d13b872 369 int node, ret = 0, index = 0;
b83edfbd
LA
370
371 /*
372 * Use the address following the image as target address for the
5675ed7c 373 * device tree.
b83edfbd 374 */
5675ed7c 375 image_info.load_addr = spl_image->load_addr + spl_image->size;
d879616e
PT
376
377 /* Figure out which device tree the board wants to use */
3dc20797 378 node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++);
d879616e
PT
379 if (node < 0) {
380 debug("%s: cannot find FDT node\n", __func__);
d879616e 381
b83edfbd
LA
382 /*
383 * U-Boot did not find a device tree inside the FIT image. Use
384 * the U-Boot device tree instead.
385 */
386 if (gd->fdt_blob)
387 memcpy((void *)image_info.load_addr, gd->fdt_blob,
388 fdt_totalsize(gd->fdt_blob));
389 else
390 return node;
391 } else {
3dc20797 392 ret = spl_load_fit_image(info, sector, ctx, node,
b83edfbd
LA
393 &image_info);
394 if (ret < 0)
395 return ret;
396 }
a616c783
PT
397
398 /* Make the load-address of the FDT available for the SPL framework */
891d9e84 399 spl_image->fdt_addr = map_sysmem(image_info.load_addr, 0);
aeedeae4
AG
400 if (CONFIG_IS_ENABLED(FIT_IMAGE_TINY))
401 return 0;
402
9d13b872 403 if (CONFIG_IS_ENABLED(LOAD_FIT_APPLY_OVERLAY)) {
ea376ebc
JJH
404 void *tmpbuffer = NULL;
405
9d13b872 406 for (; ; index++) {
3dc20797 407 node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index);
24bf44cf 408 if (node == -E2BIG) {
9d13b872 409 debug("%s: No additional FDT node\n", __func__);
ea376ebc 410 break;
24bf44cf
JJH
411 } else if (node < 0) {
412 debug("%s: unable to find FDT node %d\n",
413 __func__, index);
414 continue;
9d13b872
MS
415 }
416
ea376ebc
JJH
417 if (!tmpbuffer) {
418 /*
419 * allocate memory to store the DT overlay
420 * before it is applied. It may not be used
421 * depending on how the overlay is stored, so
422 * don't fail yet if the allocation failed.
423 */
424 tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ);
425 if (!tmpbuffer)
426 debug("%s: unable to allocate space for overlays\n",
427 __func__);
428 }
429 image_info.load_addr = (ulong)tmpbuffer;
3dc20797 430 ret = spl_load_fit_image(info, sector, ctx,
9d13b872
MS
431 node, &image_info);
432 if (ret < 0)
ea376ebc 433 break;
9d13b872 434
99329be2
JJH
435 /* Make room in FDT for changes from the overlay */
436 ret = fdt_increase_size(spl_image->fdt_addr,
437 image_info.size);
438 if (ret < 0)
ea376ebc 439 break;
99329be2 440
9d13b872
MS
441 ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
442 (void *)image_info.load_addr);
19141d69
JJH
443 if (ret) {
444 pr_err("failed to apply DT overlay %s\n",
3dc20797 445 fit_get_name(ctx->fit, node, NULL));
ea376ebc 446 break;
19141d69 447 }
9d13b872
MS
448
449 debug("%s: DT overlay %s applied\n", __func__,
3dc20797 450 fit_get_name(ctx->fit, node, NULL));
9d13b872 451 }
077e72c6 452 free(tmpbuffer);
ea376ebc
JJH
453 if (ret)
454 return ret;
9d13b872 455 }
99329be2
JJH
456 /* Try to make space, so we can inject details on the loadables */
457 ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
458 if (ret < 0)
459 return ret;
99329be2 460
a616c783
PT
461 return ret;
462}
463
3dc20797 464static int spl_fit_record_loadable(const struct spl_fit_info *ctx, int index,
a616c783
PT
465 void *blob, struct spl_image_info *image)
466{
337bbb62 467 int ret = 0;
c1648d05 468 const char *name;
337bbb62 469 int node;
a616c783 470
aeedeae4
AG
471 if (CONFIG_IS_ENABLED(FIT_IMAGE_TINY))
472 return 0;
473
3dc20797 474 ret = spl_fit_get_image_name(ctx, "loadables", index, &name);
a616c783
PT
475 if (ret < 0)
476 return ret;
477
3dc20797 478 node = spl_fit_get_image_node(ctx, "loadables", index);
a616c783
PT
479
480 ret = fdt_record_loadable(blob, index, name, image->load_addr,
481 image->size, image->entry_point,
3dc20797 482 fdt_getprop(ctx->fit, node, "type", NULL),
be2d1a87
MS
483 fdt_getprop(ctx->fit, node, "os", NULL),
484 fdt_getprop(ctx->fit, node, "arch", NULL));
d879616e
PT
485 return ret;
486}
487
35f4f8e6
AG
488static int spl_fit_image_is_fpga(const void *fit, int node)
489{
490 const char *type;
491
492 if (!IS_ENABLED(CONFIG_SPL_FPGA))
493 return 0;
494
495 type = fdt_getprop(fit, node, FIT_TYPE_PROP, NULL);
496 if (!type)
497 return 0;
498
499 return !strcmp(type, "fpga");
500}
501
337bbb62
PT
502static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
503{
aeedeae4
AG
504 if (!CONFIG_IS_ENABLED(FIT_IMAGE_TINY) || CONFIG_IS_ENABLED(OS_BOOT))
505 return fit_image_get_os(fit, noffset, os);
cf70553e 506
aeedeae4 507 const char *name = fdt_getprop(fit, noffset, FIT_OS_PROP, NULL);
cf70553e
SH
508 if (!name)
509 return -ENOENT;
510
511 /*
512 * We don't care what the type of the image actually is,
513 * only whether or not it is U-Boot. This saves some
514 * space by omitting the large table of OS types.
515 */
516 if (!strcmp(name, "u-boot"))
517 *os = IH_OS_U_BOOT;
518 else
519 *os = IH_OS_INVALID;
520
521 return 0;
337bbb62
PT
522}
523
03f1f78a
AG
524/*
525 * The purpose of the FIT load buffer is to provide a memory location that is
526 * independent of the load address of any FIT component.
527 */
528static void *spl_get_fit_load_buffer(size_t size)
529{
530 void *buf;
531
532 buf = malloc(size);
533 if (!buf) {
534 pr_err("Could not get FIT buffer of %lu bytes\n", (ulong)size);
535 pr_err("\tcheck CONFIG_SYS_SPL_MALLOC_SIZE\n");
536 buf = spl_get_load_buffer(0, size);
537 }
538 return buf;
539}
540
e1eb6ada
AD
541/*
542 * Weak default function to allow customizing SPL fit loading for load-only
543 * use cases by allowing to skip the parsing/processing of the FIT contents
544 * (so that this can be done separately in a more customized fashion)
545 */
546__weak bool spl_load_simple_fit_skip_processing(void)
547{
548 return false;
549}
550
d8a39510
AG
551static void warn_deprecated(const char *msg)
552{
553 printf("DEPRECATED: %s\n", msg);
554 printf("\tSee doc/uImage.FIT/source_file_format.txt\n");
555}
556
55e7a1a4
AG
557static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
558 struct spl_image_info *fpga_image)
559{
35f4f8e6 560 const char *compatible;
55e7a1a4
AG
561 int ret;
562
563 debug("FPGA bitstream at: %x, size: %x\n",
564 (u32)fpga_image->load_addr, fpga_image->size);
565
35f4f8e6
AG
566 compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
567 if (!compatible)
568 warn_deprecated("'fpga' image without 'compatible' property");
569 else if (strcmp(compatible, "u-boot,fpga-legacy"))
570 printf("Ignoring compatible = %s property\n", compatible);
571
55e7a1a4
AG
572 ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
573 BIT_FULL);
574 if (ret) {
575 printf("%s: Cannot load the image to the FPGA\n", __func__);
576 return ret;
577 }
578
579 puts("FPGA image loaded from FIT\n");
580
581 return 0;
582}
583
584static int spl_fit_load_fpga(struct spl_fit_info *ctx,
585 struct spl_load_info *info, ulong sector)
586{
587 int node, ret;
588
589 struct spl_image_info fpga_image = {
590 .load_addr = 0,
591 };
592
593 node = spl_fit_get_image_node(ctx, "fpga", 0);
594 if (node < 0)
595 return node;
596
d8a39510
AG
597 warn_deprecated("'fpga' property in config node. Use 'loadables'");
598
55e7a1a4
AG
599 /* Load the image and set up the fpga_image structure */
600 ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image);
601 if (ret) {
602 printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
603 return ret;
604 }
605
606 return spl_fit_upload_fpga(ctx, node, &fpga_image);
607}
608
917fa369
AG
609static int spl_simple_fit_read(struct spl_fit_info *ctx,
610 struct spl_load_info *info, ulong sector,
611 const void *fit_header)
f1dcee59 612{
917fa369 613 unsigned long count, size;
f1dcee59 614 int sectors;
917fa369 615 void *buf;
f1dcee59
SG
616
617 /*
c8bc3c0c
YS
618 * For FIT with external data, figure out where the external images
619 * start. This is the base for the data-offset properties in each
620 * image.
f1dcee59 621 */
917fa369 622 size = ALIGN(fdt_totalsize(fit_header), 4);
e246bfcf 623 size = board_spl_fit_size_align(size);
917fa369 624 ctx->ext_data_offset = ALIGN(size, 4);
f1dcee59
SG
625
626 /*
627 * So far we only have one block of data from the FIT. Read the entire
03f1f78a 628 * thing, including that first block.
c8bc3c0c
YS
629 *
630 * For FIT with data embedded, data is loaded as part of FIT image.
631 * For FIT with external data, data is not loaded in this step.
f1dcee59 632 */
eafd5410 633 sectors = get_aligned_image_size(info, size, 0);
917fa369 634 buf = spl_get_fit_load_buffer(sectors * info->bl_len);
e246bfcf 635
917fa369
AG
636 count = info->read(info, sector, sectors, buf);
637 ctx->fit = buf;
638 debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
639 sector, sectors, buf, count, size);
f1dcee59 640
917fa369
AG
641 return (count == 0) ? -EIO : 0;
642}
e1eb6ada 643
917fa369
AG
644static int spl_simple_fit_parse(struct spl_fit_info *ctx)
645{
9e9aa0b4
AG
646 /* Find the correct subnode under "/configurations" */
647 ctx->conf_node = fit_find_config_node(ctx->fit);
648 if (ctx->conf_node < 0)
649 return -EINVAL;
7d5b1bf6 650
9e9aa0b4 651 if (IS_ENABLED(CONFIG_SPL_FIT_SIGNATURE)) {
7d5b1bf6 652 printf("## Checking hash(es) for config %s ... ",
9e9aa0b4
AG
653 fit_get_name(ctx->fit, ctx->conf_node, NULL));
654 if (fit_config_verify(ctx->fit, ctx->conf_node))
7d5b1bf6
PR
655 return -EPERM;
656 puts("OK\n");
657 }
658
736806fb 659 /* find the node holding the images information */
917fa369
AG
660 ctx->images_node = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH);
661 if (ctx->images_node < 0) {
662 debug("%s: Cannot find /images node: %d\n", __func__,
663 ctx->images_node);
664 return -EINVAL;
f1dcee59 665 }
736806fb 666
917fa369
AG
667 return 0;
668}
669
670int spl_load_simple_fit(struct spl_image_info *spl_image,
671 struct spl_load_info *info, ulong sector, void *fit)
672{
673 struct spl_image_info image_info;
674 struct spl_fit_info ctx;
675 int node = -1;
3dc20797 676 int ret;
917fa369
AG
677 int index = 0;
678 int firmware_node;
679
680 ret = spl_simple_fit_read(&ctx, info, sector, fit);
681 if (ret < 0)
682 return ret;
683
684 /* skip further processing if requested to enable load-only use cases */
685 if (spl_load_simple_fit_skip_processing())
686 return 0;
687
688 ret = spl_simple_fit_parse(&ctx);
689 if (ret < 0)
690 return ret;
691
55e7a1a4
AG
692 if (IS_ENABLED(CONFIG_SPL_FPGA))
693 spl_fit_load_fpga(&ctx, info, sector);
26a64223 694
d879616e
PT
695 /*
696 * Find the U-Boot image using the following search order:
697 * - start at 'firmware' (e.g. an ARM Trusted Firmware)
698 * - fall back 'kernel' (e.g. a Falcon-mode OS boot
699 * - fall back to using the first 'loadables' entry
700 */
701 if (node < 0)
3dc20797 702 node = spl_fit_get_image_node(&ctx, FIT_FIRMWARE_PROP, 0);
aeedeae4
AG
703
704 if (node < 0 && IS_ENABLED(CONFIG_SPL_OS_BOOT))
3dc20797 705 node = spl_fit_get_image_node(&ctx, FIT_KERNEL_PROP, 0);
aeedeae4 706
f1dcee59 707 if (node < 0) {
736806fb 708 debug("could not find firmware image, trying loadables...\n");
3dc20797 709 node = spl_fit_get_image_node(&ctx, "loadables", 0);
411cf32d
AP
710 /*
711 * If we pick the U-Boot image from "loadables", start at
712 * the second image when later loading additional images.
713 */
714 index = 1;
736806fb
AP
715 }
716 if (node < 0) {
717 debug("%s: Cannot find u-boot image node: %d\n",
718 __func__, node);
f1dcee59
SG
719 return -1;
720 }
721
8baa3818 722 /* Load the image and set up the spl_image structure */
3dc20797 723 ret = spl_load_fit_image(info, sector, &ctx, node, spl_image);
8baa3818
AP
724 if (ret)
725 return ret;
da74d1f3 726
d879616e
PT
727 /*
728 * For backward compatibility, we treat the first node that is
729 * as a U-Boot image, if no OS-type has been declared.
730 */
3dc20797 731 if (!spl_fit_image_get_os(ctx.fit, node, &spl_image->os))
c8bc3c0c 732 debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
aeedeae4 733 else if (!IS_ENABLED(CONFIG_SPL_OS_BOOT))
d879616e 734 spl_image->os = IH_OS_U_BOOT;
f1dcee59 735
d879616e
PT
736 /*
737 * Booting a next-stage U-Boot may require us to append the FDT.
738 * We allow this to fail, as the U-Boot image might embed its FDT.
739 */
71551055 740 if (os_takes_devicetree(spl_image->os)) {
3dc20797 741 ret = spl_fit_append_fdt(spl_image, info, sector, &ctx);
71551055 742 if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
585b468a
DB
743 return ret;
744 }
411cf32d 745
6b8b98d5 746 firmware_node = node;
411cf32d
AP
747 /* Now check if there are more images for us to load */
748 for (; ; index++) {
d879616e
PT
749 uint8_t os_type = IH_OS_INVALID;
750
3dc20797 751 node = spl_fit_get_image_node(&ctx, "loadables", index);
411cf32d
AP
752 if (node < 0)
753 break;
754
6b8b98d5
JJH
755 /*
756 * if the firmware is also a loadable, skip it because
757 * it already has been loaded. This is typically the case with
758 * u-boot.img generated by mkimage.
759 */
760 if (firmware_node == node)
761 continue;
762
f0a6ec36 763 image_info.load_addr = 0;
3dc20797 764 ret = spl_load_fit_image(info, sector, &ctx, node, &image_info);
c61b2bf3
PR
765 if (ret < 0) {
766 printf("%s: can't load image loadables index %d (ret = %d)\n",
767 __func__, index, ret);
768 return ret;
769 }
411cf32d 770
35f4f8e6
AG
771 if (spl_fit_image_is_fpga(ctx.fit, node))
772 spl_fit_upload_fpga(&ctx, node, &image_info);
773
3dc20797 774 if (!spl_fit_image_get_os(ctx.fit, node, &os_type))
d879616e
PT
775 debug("Loadable is %s\n", genimg_get_os_name(os_type));
776
71551055 777 if (os_takes_devicetree(os_type)) {
3dc20797 778 spl_fit_append_fdt(&image_info, info, sector, &ctx);
a616c783
PT
779 spl_image->fdt_addr = image_info.fdt_addr;
780 }
d879616e 781
411cf32d
AP
782 /*
783 * If the "firmware" image did not provide an entry point,
784 * use the first valid entry point from the loadables.
785 */
786 if (spl_image->entry_point == FDT_ERROR &&
787 image_info.entry_point != FDT_ERROR)
788 spl_image->entry_point = image_info.entry_point;
a616c783
PT
789
790 /* Record our loadables into the FDT */
791 if (spl_image->fdt_addr)
3dc20797 792 spl_fit_record_loadable(&ctx, index,
a616c783
PT
793 spl_image->fdt_addr,
794 &image_info);
411cf32d
AP
795 }
796
797 /*
798 * If a platform does not provide CONFIG_SYS_UBOOT_START, U-Boot's
799 * Makefile will set it to 0 and it will end up as the entry point
800 * here. What it actually means is: use the load address.
801 */
802 if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
803 spl_image->entry_point = spl_image->load_addr;
804
e246bfcf
YL
805 spl_image->flags |= SPL_FIT_FOUND;
806
aeedeae4
AG
807 if (IS_ENABLED(CONFIG_IMX_HAB))
808 board_spl_fit_post_load(ctx.fit);
e246bfcf 809
411cf32d 810 return 0;
f1dcee59 811}
This page took 0.391224 seconds and 4 git commands to generate.