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Commit | Line | Data |
---|---|---|
31b51cb1 | 1 | CONFIG_ARM=y |
abf8d963 | 2 | CONFIG_COUNTER_FREQUENCY=400000000 |
31b51cb1 | 3 | CONFIG_ARCH_SOCFPGA=y |
98463903 | 4 | CONFIG_TEXT_BASE=0x200000 |
9802154a | 5 | CONFIG_SYS_MALLOC_LEN=0x500000 |
31b51cb1 | 6 | CONFIG_NR_DRAM_BANKS=2 |
5c873269 | 7 | CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" |
fcb5117d TR |
8 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
9 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 | |
c960c0fd | 10 | CONFIG_SF_DEFAULT_MODE=0x2003 |
31b51cb1 SCL |
11 | CONFIG_ENV_SIZE=0x1000 |
12 | CONFIG_ENV_OFFSET=0x200 | |
31b51cb1 SCL |
13 | CONFIG_DM_GPIO=y |
14 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" | |
15 | CONFIG_SPL_TEXT_BASE=0xFFE00000 | |
fcb5117d TR |
16 | CONFIG_DM_RESET=y |
17 | CONFIG_SPL_STACK=0xffe3f000 | |
18e791c4 TR |
18 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
19 | CONFIG_SPL_BSS_START_ADDR=0x3ff00000 | |
20 | CONFIG_SPL_BSS_MAX_SIZE=0x100000 | |
31b51cb1 SCL |
21 | CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y |
22 | CONFIG_IDENT_STRING="socfpga_n5x" | |
23 | CONFIG_SPL_FS_FAT=y | |
a8c281d4 | 24 | CONFIG_REMAKE_ELF=y |
31b51cb1 SCL |
25 | CONFIG_FIT=y |
26 | CONFIG_SPL_FIT_SIGNATURE=y | |
27 | CONFIG_SPL_LOAD_FIT=y | |
28 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 | |
42fb448a | 29 | CONFIG_SYS_BOOTM_LEN=0x2000000 |
31b51cb1 SCL |
30 | CONFIG_BOOTDELAY=5 |
31 | CONFIG_USE_BOOTARGS=y | |
32 | CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" | |
33 | CONFIG_USE_BOOTCOMMAND=y | |
34 | CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot" | |
42fb448a | 35 | CONFIG_SYS_PBSIZE=2079 |
ca8a329a | 36 | CONFIG_SPL_MAX_SIZE=0x40000 |
f113d7d3 | 37 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
82e26e0d SG |
38 | CONFIG_SPL_SYS_MALLOC=y |
39 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
40 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x3fa00000 | |
41 | CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 | |
31b51cb1 SCL |
42 | CONFIG_SPL_CACHE=y |
43 | CONFIG_SPL_SPI_LOAD=y | |
18f52853 | 44 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 |
31b51cb1 SCL |
45 | CONFIG_SPL_ATF=y |
46 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y | |
a62b7f0c | 47 | CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex" |
31b51cb1 | 48 | CONFIG_HUSH_PARSER=y |
ba6d575e | 49 | CONFIG_SYS_PROMPT="SOCFPGA_N5X # " |
31b51cb1 SCL |
50 | CONFIG_CMD_MEMTEST=y |
51 | CONFIG_CMD_GPIO=y | |
52 | CONFIG_CMD_I2C=y | |
53 | CONFIG_CMD_MMC=y | |
54 | CONFIG_CMD_SPI=y | |
55 | CONFIG_CMD_USB=y | |
18f52853 | 56 | CONFIG_CMD_WDT=y |
31b51cb1 SCL |
57 | CONFIG_CMD_DHCP=y |
58 | CONFIG_CMD_MII=y | |
59 | CONFIG_CMD_PING=y | |
60 | CONFIG_CMD_CACHE=y | |
61 | CONFIG_CMD_EXT4=y | |
62 | CONFIG_CMD_FAT=y | |
63 | CONFIG_CMD_FS_GENERIC=y | |
31b51cb1 | 64 | CONFIG_ENV_IS_IN_MMC=y |
fdfb17b1 TR |
65 | CONFIG_USE_BOOTFILE=y |
66 | CONFIG_BOOTFILE="kernel.itb" | |
31b51cb1 SCL |
67 | CONFIG_NET_RANDOM_ETHADDR=y |
68 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
31b51cb1 SCL |
69 | CONFIG_DWAPB_GPIO=y |
70 | CONFIG_DM_I2C=y | |
71 | CONFIG_SYS_I2C_DW=y | |
75fc79e5 | 72 | CONFIG_SYS_MMC_MAX_BLK_COUNT=256 |
31b51cb1 | 73 | CONFIG_MMC_DW=y |
31b51cb1 SCL |
74 | CONFIG_SPI_FLASH_SPANSION=y |
75 | CONFIG_SPI_FLASH_STMICRO=y | |
76 | CONFIG_PHY_MICREL=y | |
77 | CONFIG_PHY_MICREL_KSZ90X1=y | |
31b51cb1 SCL |
78 | CONFIG_ETH_DESIGNWARE=y |
79 | CONFIG_MII=y | |
9591b635 | 80 | CONFIG_SYS_NS16550_MEM32=y |
31b51cb1 SCL |
81 | CONFIG_SPI=y |
82 | CONFIG_CADENCE_QSPI=y | |
83 | CONFIG_DESIGNWARE_SPI=y | |
84 | CONFIG_USB=y | |
85 | CONFIG_USB_DWC2=y | |
86 | CONFIG_USB_STORAGE=y | |
87 | CONFIG_DESIGNWARE_WATCHDOG=y | |
88 | CONFIG_WDT=y | |
89 | # CONFIG_SPL_USE_TINY_PRINTF is not set | |
90 | CONFIG_PANIC_HANG=y | |
df896743 | 91 | CONFIG_SPL_CRC32=y |