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[J-u-boot.git] / board / sbc405 / strataflash.c
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652a10c0
WD		 1/*
2 * (C) Copyright 2002
3 * Brad Kemp, Seranoa Networks, [email protected]
4 *
3765b3e7 5 * SPDX-License-Identifier: GPL-2.0+
652a10c0
WD		 6 */
7
8#include <common.h>
9#include <asm/processor.h>
10
11#undef DEBUG_FLASH
12/*
13 * This file implements a Common Flash Interface (CFI) driver for ppcboot.
14 * The width of the port and the width of the chips are determined at initialization.
15 * These widths are used to calculate the address for access CFI data structures.
16 * It has been tested on an Intel Strataflash implementation.
17 *
18 * References
19 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
20 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
21 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
22 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
23 *
24 * TODO
25 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
26 * Add support for other command sets Use the PRI and ALT to determine command set
27 * Verify erase and program timeouts.
28 */
29
30#define FLASH_CMD_CFI 0x98
31#define FLASH_CMD_READ_ID 0x90
32#define FLASH_CMD_RESET 0xff
33#define FLASH_CMD_BLOCK_ERASE 0x20
34#define FLASH_CMD_ERASE_CONFIRM 0xD0
35#define FLASH_CMD_WRITE 0x40
36#define FLASH_CMD_PROTECT 0x60
37#define FLASH_CMD_PROTECT_SET 0x01
38#define FLASH_CMD_PROTECT_CLEAR 0xD0
39#define FLASH_CMD_CLEAR_STATUS 0x50
40#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
41#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
42
43#define FLASH_STATUS_DONE 0x80
44#define FLASH_STATUS_ESS 0x40
45#define FLASH_STATUS_ECLBS 0x20
46#define FLASH_STATUS_PSLBS 0x10
47#define FLASH_STATUS_VPENS 0x08
48#define FLASH_STATUS_PSS 0x04
49#define FLASH_STATUS_DPS 0x02
50#define FLASH_STATUS_R 0x01
51#define FLASH_STATUS_PROTECT 0x01
52
53#define FLASH_OFFSET_CFI 0x55
54#define FLASH_OFFSET_CFI_RESP 0x10
55#define FLASH_OFFSET_WTOUT 0x1F
56#define FLASH_OFFSET_WBTOUT 0x20
57#define FLASH_OFFSET_ETOUT 0x21
58#define FLASH_OFFSET_CETOUT 0x22
59#define FLASH_OFFSET_WMAX_TOUT 0x23
60#define FLASH_OFFSET_WBMAX_TOUT 0x24
61#define FLASH_OFFSET_EMAX_TOUT 0x25
62#define FLASH_OFFSET_CEMAX_TOUT 0x26
63#define FLASH_OFFSET_SIZE 0x27
64#define FLASH_OFFSET_INTERFACE 0x28
65#define FLASH_OFFSET_BUFFER_SIZE 0x2A
66#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
67#define FLASH_OFFSET_ERASE_REGIONS 0x2D
68#define FLASH_OFFSET_PROTECT 0x02
69#define FLASH_OFFSET_USER_PROTECTION 0x85
70#define FLASH_OFFSET_INTEL_PROTECTION 0x81
71
72
73#define FLASH_MAN_CFI 0x01000000
74
75
76typedef union {
77 unsigned char c;
78 unsigned short w;
79 unsigned long l;
80} cfiword_t;
81
82typedef union {
83 unsigned char * cp;
84 unsigned short *wp;
85 unsigned long *lp;
86} cfiptr_t;
87
88#define NUM_ERASE_REGIONS 4
89
6d0f6bcf 90flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
652a10c0
WD		 91
92
93/*-----------------------------------------------------------------------
94 * Functions
95 */
96
97
98static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c);
99static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf);
100static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd);
101static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd);
102static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd);
103static int flash_detect_cfi(flash_info_t * info);
104static ulong flash_get_size (ulong base, int banknum);
105static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword);
106static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt);
6d0f6bcf 107#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 108static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len);
109#endif
110/*-----------------------------------------------------------------------
111 * create an address based on the offset and the port width
112 */
113inline uchar * flash_make_addr(flash_info_t * info, int sect, int offset)
114{
115 return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
116}
117/*-----------------------------------------------------------------------
118 * read a character at a port width address
119 */
120inline uchar flash_read_uchar(flash_info_t * info, uchar offset)
121{
122 uchar *cp;
123 cp = flash_make_addr(info, 0, offset);
124 return (cp[info->portwidth - 1]);
125}
126
127/*-----------------------------------------------------------------------
128 * read a short word by swapping for ppc format.
129 */
130ushort flash_read_ushort(flash_info_t * info, int sect, uchar offset)
131{
132 uchar * addr;
133
134 addr = flash_make_addr(info, sect, offset);
135 return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]);
136
137}
138
139/*-----------------------------------------------------------------------
140 * read a long word by picking the least significant byte of each maiximum
141 * port size word. Swap for ppc format.
142 */
143ulong flash_read_long(flash_info_t * info, int sect, uchar offset)
144{
145 uchar * addr;
146
147 addr = flash_make_addr(info, sect, offset);
148 return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) |
149 (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]);
150
151}
152
153/*-----------------------------------------------------------------------
154 */
155unsigned long flash_init (void)
156{
157 unsigned long size;
158 int i;
159 unsigned long address;
160
161
162 /* The flash is positioned back to back, with the demultiplexing of the chip
163 * based on the A24 address line.
164 *
165 */
166
6d0f6bcf 167 address = CONFIG_SYS_FLASH_BASE;
652a10c0
WD		 168 size = 0;
169
170 /* Init: no FLASHes known */
6d0f6bcf 171 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
652a10c0
WD		 172 flash_info[i].flash_id = FLASH_UNKNOWN;
173 size += flash_info[i].size = flash_get_size(address, i);
6d0f6bcf 174 address += CONFIG_SYS_FLASH_INCREMENT;
652a10c0
WD		 175 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
176 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
177 flash_info[0].size, flash_info[i].size<<20);
178 }
179 }
180
181#if 0 /* test-only */
182 /* Monitor protection ON by default */
6d0f6bcf
JCPV		 183#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
184 for(i=0; flash_info[0].start[i] < CONFIG_SYS_MONITOR_BASE+CONFIG_SYS_MONITOR_LEN-1; i++)
652a10c0
WD		 185 (void)flash_real_protect(&flash_info[0], i, 1);
186#endif
187#else
188 /* monitor protection ON by default */
189 flash_protect (FLAG_PROTECT_SET,
6d0f6bcf 190 - CONFIG_SYS_MONITOR_LEN,
652a10c0
WD		 191 - 1, &flash_info[1]);
192#endif
193
194 return (size);
195}
196
197/*-----------------------------------------------------------------------
198 */
199int flash_erase (flash_info_t *info, int s_first, int s_last)
200{
201 int rcode = 0;
202 int prot;
203 int sect;
204
205 if( info->flash_id != FLASH_MAN_CFI) {
206 printf ("Can't erase unknown flash type - aborted\n");
207 return 1;
208 }
209 if ((s_first < 0) || (s_first > s_last)) {
210 printf ("- no sectors to erase\n");
211 return 1;
212 }
213
214 prot = 0;
215 for (sect=s_first; sect<=s_last; ++sect) {
216 if (info->protect[sect]) {
217 prot++;
218 }
219 }
220 if (prot) {
221 printf ("- Warning: %d protected sectors will not be erased!\n",
222 prot);
223 } else {
224 printf ("\n");
225 }
226
227
228 for (sect = s_first; sect<=s_last; sect++) {
229 if (info->protect[sect] == 0) { /* not protected */
230 flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS);
231 flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE);
232 flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
233
234 if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) {
235 rcode = 1;
236 } else
237 printf(".");
238 }
239 }
240 printf (" done\n");
241 return rcode;
242}
243
244/*-----------------------------------------------------------------------
245 */
246void flash_print_info (flash_info_t *info)
247{
248 int i;
249
250 if (info->flash_id != FLASH_MAN_CFI) {
251 printf ("missing or unknown FLASH type\n");
252 return;
253 }
254
255 printf("CFI conformant FLASH (%d x %d)",
256 (info->portwidth << 3 ), (info->chipwidth << 3 ));
257 printf (" Size: %ld MB in %d Sectors\n",
258 info->size >> 20, info->sector_count);
259 printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
260 info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
261
262 printf (" Sector Start Addresses:");
263 for (i=0; i<info->sector_count; ++i) {
6d0f6bcf 264#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
652a10c0
WD		 265 int k;
266 int size;
267 int erased;
268 volatile unsigned long *flash;
269
270 /*
271 * Check if whole sector is erased
272 */
273 if (i != (info->sector_count-1))
274 size = info->start[i+1] - info->start[i];
275 else
276 size = info->start[0] + info->size - info->start[i];
277 erased = 1;
278 flash = (volatile unsigned long *)info->start[i];
279 size = size >> 2; /* divide by 4 for longword access */
280 for (k=0; k<size; k++)
281 {
282 if (*flash++ != 0xffffffff)
283 {
284 erased = 0;
285 break;
286 }
287 }
288
289 if ((i % 5) == 0)
290 printf ("\n ");
291 /* print empty and read-only info */
292 printf (" %08lX%s%s",
293 info->start[i],
294 erased ? " E" : " ",
295 info->protect[i] ? "RO " : " ");
296#else
297 if ((i % 5) == 0)
298 printf ("\n ");
299 printf (" %08lX%s",
300 info->start[i],
301 info->protect[i] ? " (RO)" : " ");
302#endif
303 }
304 printf ("\n");
305 return;
306}
307
308/*-----------------------------------------------------------------------
309 * Copy memory to flash, returns:
310 * 0 - OK
311 * 1 - write timeout
312 * 2 - Flash not erased
313 */
314int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
315{
316 ulong wp;
317 ulong cp;
318 int aln;
319 cfiword_t cword;
320 int i, rc;
321
322 /* get lower aligned address */
323 wp = (addr & ~(info->portwidth - 1));
324
325 /* handle unaligned start */
326 if((aln = addr - wp) != 0) {
327 cword.l = 0;
328 cp = wp;
329 for(i=0;i<aln; ++i, ++cp)
330 flash_add_byte(info, &cword, (*(uchar *)cp));
331
332 for(; (i< info->portwidth) && (cnt > 0) ; i++) {
333 flash_add_byte(info, &cword, *src++);
334 cnt--;
335 cp++;
336 }
337 for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
338 flash_add_byte(info, &cword, (*(uchar *)cp));
339 if((rc = flash_write_cfiword(info, wp, cword)) != 0)
340 return rc;
341 wp = cp;
342 }
343
6d0f6bcf 344#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 345 while(cnt >= info->portwidth) {
346 i = info->buffer_size > cnt? cnt: info->buffer_size;
347 if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK)
348 return rc;
349 wp += i;
350 src += i;
351 cnt -=i;
352 }
353#else
354 /* handle the aligned part */
355 while(cnt >= info->portwidth) {
356 cword.l = 0;
357 for(i = 0; i < info->portwidth; i++) {
358 flash_add_byte(info, &cword, *src++);
359 }
360 if((rc = flash_write_cfiword(info, wp, cword)) != 0)
361 return rc;
362 wp += info->portwidth;
363 cnt -= info->portwidth;
364 }
6d0f6bcf 365#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
652a10c0
WD		 366 if (cnt == 0) {
367 return (0);
368 }
369
370 /*
371 * handle unaligned tail bytes
372 */
373 cword.l = 0;
374 for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) {
375 flash_add_byte(info, &cword, *src++);
376 --cnt;
377 }
378 for (; i<info->portwidth; ++i, ++cp) {
379 flash_add_byte(info, & cword, (*(uchar *)cp));
380 }
381
382 return flash_write_cfiword(info, wp, cword);
383}
384
385/*-----------------------------------------------------------------------
386 */
387int flash_real_protect(flash_info_t *info, long sector, int prot)
388{
389 int retcode = 0;
390
391 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
392 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
393 if(prot)
394 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
395 else
396 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
397
398 if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
399 prot?"protect":"unprotect")) == 0) {
400
401 info->protect[sector] = prot;
402 /* Intel's unprotect unprotects all locking */
403 if(prot == 0) {
404 int i;
405 for(i = 0 ; i<info->sector_count; i++) {
406 if(info->protect[i])
407 flash_real_protect(info, i, 1);
408 }
409 }
410 }
411
412 return retcode;
413}
414/*-----------------------------------------------------------------------
415 * wait for XSR.7 to be set. Time out with an error if it does not.
416 * This routine does not set the flash to read-array mode.
417 */
418static int flash_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
419{
420 ulong start;
421
422 /* Wait for command completion */
423 start = get_timer (0);
424 while(!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
425 if (get_timer(start) > info->erase_blk_tout) {
426 printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]);
427 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
428 return ERR_TIMOUT;
429 }
430 }
431 return ERR_OK;
432}
433/*-----------------------------------------------------------------------
434 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
435 * This routine sets the flash to read-array mode.
436 */
437static int flash_full_status_check(flash_info_t * info, ulong sector, ulong tout, char * prompt)
438{
439 int retcode;
440 retcode = flash_status_check(info, sector, tout, prompt);
441 if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) {
442 retcode = ERR_INVAL;
443 printf("Flash %s error at address %lx\n", prompt,info->start[sector]);
444 if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){
445 printf("Command Sequence Error.\n");
446 } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){
447 printf("Block Erase Error.\n");
448 retcode = ERR_NOT_ERASED;
449 } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) {
450 printf("Locking Error\n");
451 }
452 if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){
453 printf("Block locked.\n");
454 retcode = ERR_PROTECTED;
455 }
456 if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
457 printf("Vpp Low Error.\n");
458 }
459 flash_write_cmd(info, sector, 0, FLASH_CMD_RESET);
460 return retcode;
461}
462/*-----------------------------------------------------------------------
463 */
464static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c)
465{
466 switch(info->portwidth) {
467 case FLASH_CFI_8BIT:
468 cword->c = c;
469 break;
470 case FLASH_CFI_16BIT:
471 cword->w = (cword->w << 8) | c;
472 break;
473 case FLASH_CFI_32BIT:
474 cword->l = (cword->l << 8) | c;
475 }
476}
477
478
479/*-----------------------------------------------------------------------
480 * make a proper sized command based on the port and chip widths
481 */
482static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf)
483{
484 int i;
485 uchar *cp = (uchar *)cmdbuf;
486 for(i=0; i< info->portwidth; i++)
487 *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd;
488}
489
490/*
491 * Write a proper sized command to the correct address
492 */
493static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd)
494{
495
496 volatile cfiptr_t addr;
497 cfiword_t cword;
498 addr.cp = flash_make_addr(info, sect, offset);
499 flash_make_cmd(info, cmd, &cword);
500 switch(info->portwidth) {
501 case FLASH_CFI_8BIT:
502 *addr.cp = cword.c;
503 break;
504 case FLASH_CFI_16BIT:
505 *addr.wp = cword.w;
506 break;
507 case FLASH_CFI_32BIT:
508 *addr.lp = cword.l;
509 break;
510 }
511}
512
513/*-----------------------------------------------------------------------
514 */
515static int flash_isequal(flash_info_t * info, int sect, uchar offset, uchar cmd)
516{
517 cfiptr_t cptr;
518 cfiword_t cword;
519 int retval;
520 cptr.cp = flash_make_addr(info, sect, offset);
521 flash_make_cmd(info, cmd, &cword);
522 switch(info->portwidth) {
523 case FLASH_CFI_8BIT:
524 retval = (cptr.cp[0] == cword.c);
525 break;
526 case FLASH_CFI_16BIT:
527 retval = (cptr.wp[0] == cword.w);
528 break;
529 case FLASH_CFI_32BIT:
530 retval = (cptr.lp[0] == cword.l);
531 break;
532 default:
533 retval = 0;
534 break;
535 }
536 return retval;
537}
538/*-----------------------------------------------------------------------
539 */
540static int flash_isset(flash_info_t * info, int sect, uchar offset, uchar cmd)
541{
542 cfiptr_t cptr;
543 cfiword_t cword;
544 int retval;
545 cptr.cp = flash_make_addr(info, sect, offset);
546 flash_make_cmd(info, cmd, &cword);
547 switch(info->portwidth) {
548 case FLASH_CFI_8BIT:
549 retval = ((cptr.cp[0] & cword.c) == cword.c);
550 break;
551 case FLASH_CFI_16BIT:
552 retval = ((cptr.wp[0] & cword.w) == cword.w);
553 break;
554 case FLASH_CFI_32BIT:
555 retval = ((cptr.lp[0] & cword.l) == cword.l);
556 break;
557 default:
558 retval = 0;
559 break;
560 }
561 return retval;
562}
563
564/*-----------------------------------------------------------------------
565 * detect if flash is compatible with the Common Flash Interface (CFI)
566 * http://www.jedec.org/download/search/jesd68.pdf
567 *
568*/
569static int flash_detect_cfi(flash_info_t * info)
570{
571
572 for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_32BIT;
573 info->portwidth <<= 1) {
574 for(info->chipwidth =FLASH_CFI_BY8;
575 info->chipwidth <= info->portwidth;
576 info->chipwidth <<= 1) {
577 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
578 flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
579 if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') &&
580 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
581 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
582 return 1;
583 }
584 }
585 return 0;
586}
587/*
588 * The following code cannot be run from FLASH!
589 *
590 */
591static ulong flash_get_size (ulong base, int banknum)
592{
593 flash_info_t * info = &flash_info[banknum];
594 int i, j;
595 int sect_cnt;
596 unsigned long sector;
597 unsigned long tmp;
598 int size_ratio;
599 uchar num_erase_regions;
600 int erase_region_size;
601 int erase_region_count;
602
603 info->start[0] = base;
604
605 if(flash_detect_cfi(info)){
606#ifdef DEBUG_FLASH
607 printf("portwidth=%d chipwidth=%d\n", info->portwidth, info->chipwidth); /* test-only */
608#endif
609 size_ratio = info->portwidth / info->chipwidth;
610 num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS);
611#ifdef DEBUG_FLASH
612 printf("found %d erase regions\n", num_erase_regions);
613#endif
614 sect_cnt = 0;
615 sector = base;
616 for(i = 0 ; i < num_erase_regions; i++) {
617 if(i > NUM_ERASE_REGIONS) {
618 printf("%d erase regions found, only %d used\n",
619 num_erase_regions, NUM_ERASE_REGIONS);
620 break;
621 }
622 tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS);
623 erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128;
624 tmp >>= 16;
625 erase_region_count = (tmp & 0xffff) +1;
626 for(j = 0; j< erase_region_count; j++) {
627 info->start[sect_cnt] = sector;
628 sector += (erase_region_size * size_ratio);
629 info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT);
630 sect_cnt++;
631 }
632 }
633
634 info->sector_count = sect_cnt;
635 /* multiply the size by the number of chips */
636 info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio;
637 info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE));
638 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT);
639 info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT)));
640 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT);
641 info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT)));
642 tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT);
643 info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000;
644 info->flash_id = FLASH_MAN_CFI;
645 }
646
647 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
648 return(info->size);
649}
650
651
652/*-----------------------------------------------------------------------
653 */
654static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword)
655{
656
652a10c0
WD		 657 cfiptr_t cptr;
658 int flag;
659
652a10c0
WD		 660 cptr.cp = (uchar *)dest;
661
652a10c0
WD		 662 /* Check if Flash is (sufficiently) erased */
663 switch(info->portwidth) {
664 case FLASH_CFI_8BIT:
665 flag = ((cptr.cp[0] & cword.c) == cword.c);
666 break;
667 case FLASH_CFI_16BIT:
668 flag = ((cptr.wp[0] & cword.w) == cword.w);
669 break;
670 case FLASH_CFI_32BIT:
671 flag = ((cptr.lp[0] & cword.l) == cword.l);
672 break;
673 default:
674 return 2;
675 }
676 if(!flag)
677 return 2;
678
679 /* Disable interrupts which might cause a timeout here */
680 flag = disable_interrupts();
681
682 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
683 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
684
685 switch(info->portwidth) {
686 case FLASH_CFI_8BIT:
687 cptr.cp[0] = cword.c;
688 break;
689 case FLASH_CFI_16BIT:
690 cptr.wp[0] = cword.w;
691 break;
692 case FLASH_CFI_32BIT:
693 cptr.lp[0] = cword.l;
694 break;
695 }
696
697 /* re-enable interrupts if necessary */
698 if(flag)
699 enable_interrupts();
700
701 return flash_full_status_check(info, 0, info->write_tout, "write");
702}
703
6d0f6bcf 704#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
652a10c0
WD		 705
706/* loop through the sectors from the highest address
707 * when the passed address is greater or equal to the sector address
708 * we have a match
709 */
710static int find_sector(flash_info_t *info, ulong addr)
711{
712 int sector;
713 for(sector = info->sector_count - 1; sector >= 0; sector--) {
714 if(addr >= info->start[sector])
715 break;
716 }
717 return sector;
718}
719
720static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len)
721{
722
723 int sector;
724 int cnt;
725 int retcode;
726 volatile cfiptr_t src;
727 volatile cfiptr_t dst;
728
729 src.cp = cp;
730 dst.cp = (uchar *)dest;
731 sector = find_sector(info, dest);
732 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
733 flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
734 if((retcode = flash_status_check(info, sector, info->buffer_write_tout,
735 "write to buffer")) == ERR_OK) {
736 switch(info->portwidth) {
737 case FLASH_CFI_8BIT:
738 cnt = len;
739 break;
740 case FLASH_CFI_16BIT:
741 cnt = len >> 1;
742 break;
743 case FLASH_CFI_32BIT:
744 cnt = len >> 2;
745 break;
746 default:
747 return ERR_INVAL;
748 break;
749 }
750 flash_write_cmd(info, sector, 0, (uchar)cnt-1);
751 while(cnt-- > 0) {
752 switch(info->portwidth) {
753 case FLASH_CFI_8BIT:
754 *dst.cp++ = *src.cp++;
755 break;
756 case FLASH_CFI_16BIT:
757 *dst.wp++ = *src.wp++;
758 break;
759 case FLASH_CFI_32BIT:
760 *dst.lp++ = *src.lp++;
761 break;
762 default:
763 return ERR_INVAL;
764 break;
765 }
766 }
767 flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
768 retcode = flash_full_status_check(info, sector, info->buffer_write_tout,
769 "buffer write");
770 }
771 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
772 return retcode;
773}
6d0f6bcf 774#endif /* CONFIG_SYS_USE_FLASH_BUFFER_WRITE */
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