[J-u-boot.git] / common / altera.c

/*
 * (C) Copyright 2003
 * Steven Scholz, imc Measurement & Control, [email protected]
 *
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, [email protected].
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

/*
 *  Altera FPGA support
 */
#include <common.h>
#include <ACEX1K.h>
#include <stratixII.h>

/* Define FPGA_DEBUG to get debug printf's */
/* #define FPGA_DEBUG */

#ifdef	FPGA_DEBUG
#define	PRINTF(fmt,args...)	printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif

#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)

/* Local Static Functions */
static int altera_validate (Altera_desc * desc, const char *fn);

/* ------------------------------------------------------------------------- */
int altera_load( Altera_desc *desc, void *buf, size_t bsize )
{
	int ret_val = FPGA_FAIL;	/* assume a failure */

	if (!altera_validate (desc, (char *)__FUNCTION__)) {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	} else {
		switch (desc->family) {
		case Altera_ACEX1K:
		case Altera_CYC2:
#if defined(CONFIG_FPGA_ACEX1K)
			PRINTF ("%s: Launching the ACEX1K Loader...\n",
					__FUNCTION__);
			ret_val = ACEX1K_load (desc, buf, bsize);
#elif defined(CONFIG_FPGA_CYCLON2)
			PRINTF ("%s: Launching the CYCLON II Loader...\n",
					__FUNCTION__);
			ret_val = CYC2_load (desc, buf, bsize);
#else
			printf ("%s: No support for ACEX1K devices.\n",
					__FUNCTION__);
#endif
			break;

#if defined(CONFIG_FPGA_STRATIX_II)
		case Altera_StratixII:
			PRINTF ("%s: Launching the Stratix II Loader...\n",
				__FUNCTION__);
			ret_val = StratixII_load (desc, buf, bsize);
			break;
#endif
		default:
			printf ("%s: Unsupported family type, %d\n",
					__FUNCTION__, desc->family);
		}
	}

	return ret_val;
}

int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
{
	int ret_val = FPGA_FAIL;	/* assume a failure */

	if (!altera_validate (desc, (char *)__FUNCTION__)) {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	} else {
		switch (desc->family) {
		case Altera_ACEX1K:
#if defined(CONFIG_FPGA_ACEX)
			PRINTF ("%s: Launching the ACEX1K Reader...\n",
					__FUNCTION__);
			ret_val = ACEX1K_dump (desc, buf, bsize);
#else
			printf ("%s: No support for ACEX1K devices.\n",
					__FUNCTION__);
#endif
			break;

#if defined(CONFIG_FPGA_STRATIX_II)
		case Altera_StratixII:
			PRINTF ("%s: Launching the Stratix II Reader...\n",
				__FUNCTION__);
			ret_val = StratixII_dump (desc, buf, bsize);
			break;
#endif
		default:
			printf ("%s: Unsupported family type, %d\n",
					__FUNCTION__, desc->family);
		}
	}

	return ret_val;
}

int altera_info( Altera_desc *desc )
{
	int ret_val = FPGA_FAIL;

	if (altera_validate (desc, (char *)__FUNCTION__)) {
		printf ("Family:        \t");
		switch (desc->family) {
		case Altera_ACEX1K:
			printf ("ACEX1K\n");
			break;
		case Altera_CYC2:
			printf ("CYCLON II\n");
			break;
		case Altera_StratixII:
			printf ("Stratix II\n");
			break;
			/* Add new family types here */
		default:
			printf ("Unknown family type, %d\n", desc->family);
		}

		printf ("Interface type:\t");
		switch (desc->iface) {
		case passive_serial:
			printf ("Passive Serial (PS)\n");
			break;
		case passive_parallel_synchronous:
			printf ("Passive Parallel Synchronous (PPS)\n");
			break;
		case passive_parallel_asynchronous:
			printf ("Passive Parallel Asynchronous (PPA)\n");
			break;
		case passive_serial_asynchronous:
			printf ("Passive Serial Asynchronous (PSA)\n");
			break;
		case altera_jtag_mode:		/* Not used */
			printf ("JTAG Mode\n");
			break;
		case fast_passive_parallel:
			printf ("Fast Passive Parallel (FPP)\n");
			break;
		case fast_passive_parallel_security:
			printf
			    ("Fast Passive Parallel with Security (FPPS) \n");
			break;
			/* Add new interface types here */
		default:
			printf ("Unsupported interface type, %d\n", desc->iface);
		}

		printf ("Device Size:   \t%d bytes\n"
				"Cookie:        \t0x%x (%d)\n",
				desc->size, desc->cookie, desc->cookie);

		if (desc->iface_fns) {
			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
			switch (desc->family) {
			case Altera_ACEX1K:
			case Altera_CYC2:
#if defined(CONFIG_FPGA_ACEX1K)
				ACEX1K_info (desc);
#elif defined(CONFIG_FPGA_CYCLON2)
				CYC2_info (desc);
#else
				/* just in case */
				printf ("%s: No support for ACEX1K devices.\n",
						__FUNCTION__);
#endif
				break;
#if defined(CONFIG_FPGA_STRATIX_II)
			case Altera_StratixII:
				StratixII_info (desc);
				break;
#endif
				/* Add new family types here */
			default:
				/* we don't need a message here - we give one up above */
				break;
			}
		} else {
			printf ("No Device Function Table.\n");
		}

		ret_val = FPGA_SUCCESS;
	} else {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	}

	return ret_val;
}

int altera_reloc( Altera_desc *desc, ulong reloc_offset)
{
	int ret_val = FPGA_FAIL;	/* assume a failure */

	if (!altera_validate (desc, (char *)__FUNCTION__)) {
		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	} else {
		switch (desc->family) {
		case Altera_ACEX1K:
#if defined(CONFIG_FPGA_ACEX1K)
			ret_val = ACEX1K_reloc (desc, reloc_offset);
#else
			printf ("%s: No support for ACEX devices.\n",
					__FUNCTION__);
#endif
			break;
#if defined(CONFIG_FPGA_STRATIX_II)
		case Altera_StratixII:
			ret_val = StratixII_reloc (desc, reloc_offset);
			break;
#endif
		case Altera_CYC2:
#if defined(CONFIG_FPGA_CYCLON2)
			ret_val = CYC2_reloc (desc, reloc_offset);
#else
			printf ("%s: No support for CYCLON II devices.\n",
					__FUNCTION__);
#endif
			break;
			/* Add new family types here */
		default:
			printf ("%s: Unsupported family type, %d\n",
					__FUNCTION__, desc->family);
		}
	}

	return ret_val;
}

/* ------------------------------------------------------------------------- */

static int altera_validate (Altera_desc * desc, const char *fn)
{
	int ret_val = FALSE;

	if (desc) {
		if ((desc->family > min_altera_type) &&
			(desc->family < max_altera_type)) {
			if ((desc->iface > min_altera_iface_type) &&
				(desc->iface < max_altera_iface_type)) {
				if (desc->size) {
					ret_val = TRUE;
				} else {
					printf ("%s: NULL part size\n", fn);
				}
			} else {
				printf ("%s: Invalid Interface type, %d\n",
					fn, desc->iface);
			}
		} else {
			printf ("%s: Invalid family type, %d\n", fn, desc->family);
		}
	} else {
		printf ("%s: NULL descriptor!\n", fn);
	}

	return ret_val;
}

/* ------------------------------------------------------------------------- */

#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */
Commit	Line	Data
5b845b66	1	/*
5da627a4 WD	2	* (C) Copyright 2003
	3	* Steven Scholz, imc Measurement & Control, [email protected]
	4	*
5b845b66 WD	5	* (C) Copyright 2002
	6	* Rich Ireland, Enterasys Networks, [email protected].
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*
	26	*/
	27
5b845b66 WD	28	/*
	29	* Altera FPGA support
	30	*/
	31	#include <common.h>
5da627a4	32	#include <ACEX1K.h>
3c735e74	33	#include <stratixII.h>
5b845b66	34
5da627a4 WD	35	/* Define FPGA_DEBUG to get debug printf's */
5da627a4 WD	36	/* #define FPGA_DEBUG */
5b845b66 WD	37
	38	#ifdef FPGA_DEBUG
	39	#define PRINTF(fmt,args...) printf (fmt ,##args)
	40	#else
	41	#define PRINTF(fmt,args...)
	42	#endif
	43
0133502e	44	#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
5b845b66	45
5da627a4	46	/* Local Static Functions */
3c735e74	47	static int altera_validate (Altera_desc * desc, const char *fn);
5da627a4	48
5b845b66 WD	49	/* ------------------------------------------------------------------------- */
	50	int altera_load( Altera_desc desc, void buf, size_t bsize )
	51	{
5da627a4 WD	52	int ret_val = FPGA_FAIL; /* assume a failure */
5da627a4 WD	53
64cd52ef	54	if (!altera_validate (desc, (char *)__FUNCTION__)) {
5da627a4 WD	55	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	56	} else {
	57	switch (desc->family) {
	58	case Altera_ACEX1K:
f0ff4692	59	case Altera_CYC2:
0133502e	60	#if defined(CONFIG_FPGA_ACEX1K)
5da627a4 WD	61	PRINTF ("%s: Launching the ACEX1K Loader...\n",
	62	__FUNCTION__);
	63	ret_val = ACEX1K_load (desc, buf, bsize);
3c735e74	64	#elif defined(CONFIG_FPGA_CYCLON2)
f0ff4692 SR	65	PRINTF ("%s: Launching the CYCLON II Loader...\n",
	66	__FUNCTION__);
	67	ret_val = CYC2_load (desc, buf, bsize);
5da627a4 WD	68	#else
	69	printf ("%s: No support for ACEX1K devices.\n",
	70	__FUNCTION__);
	71	#endif
	72	break;
	73
3c735e74	74	#if defined(CONFIG_FPGA_STRATIX_II)
	75	case Altera_StratixII:
	76	PRINTF ("%s: Launching the Stratix II Loader...\n",
	77	__FUNCTION__);
	78	ret_val = StratixII_load (desc, buf, bsize);
	79	break;
	80	#endif
5da627a4 WD	81	default:
	82	printf ("%s: Unsupported family type, %d\n",
	83	__FUNCTION__, desc->family);
	84	}
	85	}
	86
	87	return ret_val;
5b845b66 WD	88	}
	89
	90	int altera_dump( Altera_desc desc, void buf, size_t bsize )
	91	{
5da627a4 WD	92	int ret_val = FPGA_FAIL; /* assume a failure */
5da627a4 WD	93
64cd52ef	94	if (!altera_validate (desc, (char *)__FUNCTION__)) {
5da627a4 WD	95	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	96	} else {
	97	switch (desc->family) {
	98	case Altera_ACEX1K:
0133502e	99	#if defined(CONFIG_FPGA_ACEX)
5da627a4 WD	100	PRINTF ("%s: Launching the ACEX1K Reader...\n",
	101	__FUNCTION__);
	102	ret_val = ACEX1K_dump (desc, buf, bsize);
	103	#else
	104	printf ("%s: No support for ACEX1K devices.\n",
	105	__FUNCTION__);
	106	#endif
	107	break;
	108
3c735e74	109	#if defined(CONFIG_FPGA_STRATIX_II)
	110	case Altera_StratixII:
	111	PRINTF ("%s: Launching the Stratix II Reader...\n",
	112	__FUNCTION__);
	113	ret_val = StratixII_dump (desc, buf, bsize);
	114	break;
	115	#endif
5da627a4 WD	116	default:
	117	printf ("%s: Unsupported family type, %d\n",
	118	__FUNCTION__, desc->family);
	119	}
	120	}
	121
	122	return ret_val;
5b845b66 WD	123	}
	124
	125	int altera_info( Altera_desc *desc )
	126	{
5da627a4 WD	127	int ret_val = FPGA_FAIL;
5da627a4 WD	128
64cd52ef	129	if (altera_validate (desc, (char *)__FUNCTION__)) {
5da627a4 WD	130	printf ("Family: \t");
	131	switch (desc->family) {
	132	case Altera_ACEX1K:
	133	printf ("ACEX1K\n");
	134	break;
f0ff4692 SR	135	case Altera_CYC2:
	136	printf ("CYCLON II\n");
	137	break;
3c735e74	138	case Altera_StratixII:
	139	printf ("Stratix II\n");
	140	break;
	141	/* Add new family types here */
5da627a4 WD	142	default:
	143	printf ("Unknown family type, %d\n", desc->family);
	144	}
	145
	146	printf ("Interface type:\t");
	147	switch (desc->iface) {
	148	case passive_serial:
	149	printf ("Passive Serial (PS)\n");
	150	break;
	151	case passive_parallel_synchronous:
	152	printf ("Passive Parallel Synchronous (PPS)\n");
	153	break;
	154	case passive_parallel_asynchronous:
	155	printf ("Passive Parallel Asynchronous (PPA)\n");
	156	break;
	157	case passive_serial_asynchronous:
	158	printf ("Passive Serial Asynchronous (PSA)\n");
	159	break;
	160	case altera_jtag_mode: /* Not used */
	161	printf ("JTAG Mode\n");
	162	break;
3c735e74	163	case fast_passive_parallel:
	164	printf ("Fast Passive Parallel (FPP)\n");
	165	break;
	166	case fast_passive_parallel_security:
	167	printf
	168	("Fast Passive Parallel with Security (FPPS) \n");
	169	break;
5da627a4 WD	170	/* Add new interface types here */
	171	default:
	172	printf ("Unsupported interface type, %d\n", desc->iface);
	173	}
	174
	175	printf ("Device Size: \t%d bytes\n"
	176	"Cookie: \t0x%x (%d)\n",
	177	desc->size, desc->cookie, desc->cookie);
	178
	179	if (desc->iface_fns) {
	180	printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
	181	switch (desc->family) {
	182	case Altera_ACEX1K:
f0ff4692	183	case Altera_CYC2:
0133502e	184	#if defined(CONFIG_FPGA_ACEX1K)
5da627a4	185	ACEX1K_info (desc);
0133502e	186	#elif defined(CONFIG_FPGA_CYCLON2)
f0ff4692	187	CYC2_info (desc);
5da627a4 WD	188	#else
	189	/* just in case */
	190	printf ("%s: No support for ACEX1K devices.\n",
	191	__FUNCTION__);
	192	#endif
	193	break;
3c735e74	194	#if defined(CONFIG_FPGA_STRATIX_II)
	195	case Altera_StratixII:
	196	StratixII_info (desc);
	197	break;
	198	#endif
5da627a4 WD	199	/* Add new family types here */
	200	default:
	201	/* we don't need a message here - we give one up above */
b77fad3b	202	break;
5da627a4 WD	203	}
	204	} else {
	205	printf ("No Device Function Table.\n");
	206	}
	207
	208	ret_val = FPGA_SUCCESS;
	209	} else {
	210	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	211	}
	212
	213	return ret_val;
	214	}
	215
	216	int altera_reloc( Altera_desc *desc, ulong reloc_offset)
	217	{
	218	int ret_val = FPGA_FAIL; /* assume a failure */
	219
64cd52ef	220	if (!altera_validate (desc, (char *)__FUNCTION__)) {
5da627a4 WD	221	printf ("%s: Invalid device descriptor\n", __FUNCTION__);
	222	} else {
	223	switch (desc->family) {
	224	case Altera_ACEX1K:
0133502e	225	#if defined(CONFIG_FPGA_ACEX1K)
5da627a4 WD	226	ret_val = ACEX1K_reloc (desc, reloc_offset);
	227	#else
	228	printf ("%s: No support for ACEX devices.\n",
f0ff4692 SR	229	__FUNCTION__);
	230	#endif
	231	break;
3c735e74	232	#if defined(CONFIG_FPGA_STRATIX_II)
	233	case Altera_StratixII:
	234	ret_val = StratixII_reloc (desc, reloc_offset);
	235	break;
	236	#endif
f0ff4692	237	case Altera_CYC2:
0133502e	238	#if defined(CONFIG_FPGA_CYCLON2)
f0ff4692 SR	239	ret_val = CYC2_reloc (desc, reloc_offset);
	240	#else
	241	printf ("%s: No support for CYCLON II devices.\n",
5da627a4 WD	242	__FUNCTION__);
	243	#endif
	244	break;
	245	/* Add new family types here */
	246	default:
	247	printf ("%s: Unsupported family type, %d\n",
	248	__FUNCTION__, desc->family);
	249	}
	250	}
	251
	252	return ret_val;
5b845b66 WD	253	}
	254
	255	/* ------------------------------------------------------------------------- */
	256
3c735e74	257	static int altera_validate (Altera_desc * desc, const char *fn)
5da627a4 WD	258	{
	259	int ret_val = FALSE;
	260
	261	if (desc) {
	262	if ((desc->family > min_altera_type) &&
	263	(desc->family < max_altera_type)) {
	264	if ((desc->iface > min_altera_iface_type) &&
	265	(desc->iface < max_altera_iface_type)) {
	266	if (desc->size) {
	267	ret_val = TRUE;
	268	} else {
	269	printf ("%s: NULL part size\n", fn);
	270	}
	271	} else {
	272	printf ("%s: Invalid Interface type, %d\n",
	273	fn, desc->iface);
	274	}
	275	} else {
	276	printf ("%s: Invalid family type, %d\n", fn, desc->family);
	277	}
	278	} else {
	279	printf ("%s: NULL descriptor!\n", fn);
	280	}
	281
	282	return ret_val;
	283	}
5b845b66 WD	284
	285	/* ------------------------------------------------------------------------- */
	286
0133502e	287	#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */