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Commit | Line | Data |
---|---|---|
0b3ce83d | 1 | CONFIG_ARM=y |
a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
abf8d963 | 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
0b3ce83d | 4 | CONFIG_ARCH_ROCKCHIP=y |
98463903 | 5 | CONFIG_TEXT_BASE=0x00200000 |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
554e5514 | 7 | CONFIG_NR_DRAM_BANKS=1 |
052170c6 | 8 | CONFIG_ENV_OFFSET=0x3F8000 |
2bba7807 | 9 | CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" |
0b3ce83d | 10 | CONFIG_ROCKCHIP_RK3399=y |
e5ee24dd | 11 | CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 |
bd9b4ac9 | 12 | CONFIG_ROCKCHIP_SPI_IMAGE=y |
2681e78a | 13 | CONFIG_TARGET_PUMA_RK3399=y |
358b6a20 TR |
14 | CONFIG_DEBUG_UART_BASE=0xFF180000 |
15 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
0b3ce83d | 16 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
ea2ca7e1 | 17 | CONFIG_SPL_SPI=y |
49c8ef0e | 18 | CONFIG_SYS_LOAD_ADDR=0x800800 |
d46e86d2 | 19 | CONFIG_DEBUG_UART=y |
eaf6ea6a TR |
20 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
21 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 | |
a2a5053a | 22 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" |
78eba69d | 23 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
0817daa7 | 24 | CONFIG_MISC_INIT_R=y |
ca8a329a TR |
25 | CONFIG_SPL_MAX_SIZE=0x2e000 |
26 | CONFIG_SPL_PAD_TO=0x7f8000 | |
6600b355 TR |
27 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
28 | CONFIG_SPL_BSS_START_ADDR=0xff8e0000 | |
9b5f9aeb | 29 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 |
0b3ce83d | 30 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
f113d7d3 TR |
31 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
32 | CONFIG_SPL_STACK=0xff8effff | |
0b3ce83d | 33 | CONFIG_SPL_STACK_R=y |
2169e29c | 34 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 |
0b3ce83d | 35 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 |
975e7cf3 | 36 | CONFIG_SPL_I2C=y |
933b2f09 | 37 | CONFIG_SPL_POWER=y |
55500438 | 38 | CONFIG_SPL_SPI_LOAD=y |
2169e29c | 39 | CONFIG_TPL=y |
0b3ce83d | 40 | CONFIG_CMD_BOOTZ=y |
0b3ce83d | 41 | CONFIG_CMD_GPT=y |
88663126 | 42 | CONFIG_CMD_I2C=y |
0b3ce83d | 43 | CONFIG_CMD_MMC=y |
0b3ce83d PT |
44 | CONFIG_CMD_SPI=y |
45 | CONFIG_CMD_USB=y | |
46 | # CONFIG_CMD_SETEXPR is not set | |
5a403a27 PT |
47 | CONFIG_CMD_BMP=y |
48 | CONFIG_CMD_CACHE=y | |
0b3ce83d | 49 | CONFIG_CMD_TIME=y |
5a403a27 PT |
50 | CONFIG_CMD_PMIC=y |
51 | CONFIG_CMD_REGULATOR=y | |
0b3ce83d | 52 | CONFIG_SPL_OF_CONTROL=y |
7b87e3bf | 53 | CONFIG_OF_LIVE=y |
e936e0ec | 54 | CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
e91907a1 | 55 | CONFIG_ENV_OVERWRITE=y |
b1f1b4a5 | 56 | CONFIG_ENV_IS_NOWHERE=y |
5dc4dfd2 | 57 | CONFIG_ENV_IS_IN_MMC=y |
ac471587 QS |
58 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
59 | CONFIG_ENV_SPI_MAX_HZ=50000000 | |
8d8ee47e | 60 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
7d080773 | 61 | CONFIG_SYS_MMC_ENV_DEV=1 |
b9d66a06 | 62 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
a2ca3c60 | 63 | CONFIG_SPL_DM_SEQ_ALIAS=y |
c9bc7f98 QS |
64 | CONFIG_GPIO_HOG=y |
65 | CONFIG_SPL_GPIO_HOG=y | |
0b3ce83d | 66 | CONFIG_ROCKCHIP_GPIO=y |
c5d905ff | 67 | CONFIG_SYS_I2C_ROCKCHIP=y |
1644f381 PT |
68 | CONFIG_MISC=y |
69 | CONFIG_ROCKCHIP_EFUSE=y | |
0b3ce83d PT |
70 | CONFIG_MMC_DW=y |
71 | CONFIG_MMC_DW_ROCKCHIP=y | |
72 | CONFIG_MMC_SDHCI=y | |
f0f7178e | 73 | CONFIG_MMC_SDHCI_SDMA=y |
0b3ce83d | 74 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
a2ca3c60 | 75 | CONFIG_SF_DEFAULT_BUS=1 |
14453fbf | 76 | CONFIG_SF_DEFAULT_SPEED=20000000 |
4abf5d0c | 77 | CONFIG_SPI_FLASH_GIGADEVICE=y |
0b3ce83d PT |
78 | CONFIG_SPI_FLASH_WINBOND=y |
79 | CONFIG_PHY_MICREL=y | |
18a15897 | 80 | CONFIG_PHY_MICREL_KSZ90X1=y |
0b3ce83d PT |
81 | CONFIG_ETH_DESIGNWARE=y |
82 | CONFIG_GMAC_ROCKCHIP=y | |
5872c450 HS |
83 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
84 | CONFIG_PHY_ROCKCHIP_TYPEC=y | |
3839431e | 85 | CONFIG_DM_PMIC_FAN53555=y |
e785e7f6 | 86 | CONFIG_PMIC_RK8XX=y |
7abf178b | 87 | CONFIG_SPL_PMIC_RK8XX=y |
4de2bbb3 | 88 | CONFIG_REGULATOR_PWM=y |
e785e7f6 | 89 | CONFIG_REGULATOR_RK8XX=y |
0b3ce83d | 90 | CONFIG_PWM_ROCKCHIP=y |
5872c450 | 91 | CONFIG_DM_RESET=y |
82a8e6c6 KG |
92 | CONFIG_DM_RTC=y |
93 | CONFIG_RTC_ISL1208=y | |
0b3ce83d | 94 | CONFIG_DEBUG_UART_SHIFT=2 |
9591b635 | 95 | CONFIG_SYS_NS16550_MEM32=y |
0b3ce83d PT |
96 | CONFIG_ROCKCHIP_SPI=y |
97 | CONFIG_SYSRESET=y | |
98 | CONFIG_USB=y | |
99 | CONFIG_USB_XHCI_HCD=y | |
100 | CONFIG_USB_XHCI_DWC3=y | |
101 | CONFIG_USB_EHCI_HCD=y | |
102 | CONFIG_USB_EHCI_GENERIC=y | |
5872c450 HS |
103 | CONFIG_USB_DWC3=y |
104 | CONFIG_USB_DWC3_GENERIC=y | |
ae358449 | 105 | CONFIG_USB_HOST_ETHER=y |
f58ad98a CP |
106 | CONFIG_USB_ETHER_ASIX=y |
107 | CONFIG_USB_ETHER_ASIX88179=y | |
108 | CONFIG_USB_ETHER_MCS7830=y | |
109 | CONFIG_USB_ETHER_RTL8152=y | |
110 | CONFIG_USB_ETHER_SMSC95XX=y | |
b86986c7 | 111 | CONFIG_VIDEO=y |
8a6ffeda | 112 | # CONFIG_VIDEO_BPP8 is not set |
5a403a27 PT |
113 | CONFIG_DISPLAY=y |
114 | CONFIG_VIDEO_ROCKCHIP=y | |
115 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y | |
8fc78fc7 PD |
116 | CONFIG_BMP_16BPP=y |
117 | CONFIG_BMP_24BPP=y | |
118 | CONFIG_BMP_32BPP=y | |
0b3ce83d | 119 | CONFIG_ERRNO_STR=y |