projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 32cb2c70 WD |
1 | /* |
| 2 | * (C) Copyright 2002 | |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
| 4 | * Marius Groeger <[email protected]> | |
| 5 | * Gary Jennejohn <[email protected]> | |
| 6 | * David Mueller <[email protected]> | |
| 7 | * | |
| 8 | * Modified for the friendly-arm SBC-2410X by | |
| 9 | * (C) Copyright 2005 | |
| 10 | * JinHua Luo, GuangDong Linux Center, <[email protected]> | |
| 11 | * | |
| 12 | * Configuation settings for the friendly-arm SBC-2410X board. | |
| 13 | * | |
| 14 | * See file CREDITS for list of people who contributed to this | |
| 15 | * project. | |
| 16 | * | |
| 17 | * This program is free software; you can redistribute it and/or | |
| 18 | * modify it under the terms of the GNU General Public License as | |
| 19 | * published by the Free Software Foundation; either version 2 of | |
| 20 | * the License, or (at your option) any later version. | |
| 21 | * | |
| 22 | * This program is distributed in the hope that it will be useful, | |
| 23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 25 | * GNU General Public License for more details. | |
| 26 | * | |
| 27 | * You should have received a copy of the GNU General Public License | |
| 28 | * along with this program; if not, write to the Free Software | |
| 29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 30 | * MA 02111-1307 USA | |
| 31 | */ | |
| 32 | ||
| 33 | #ifndef __CONFIG_H | |
| 34 | #define __CONFIG_H | |
| 35 | ||
| 36 | /* | |
| 37 | * If we are developing, we might want to start armboot from ram | |
| 38 | * so we MUST NOT initialize critical regs like mem-timing ... | |
| 39 | */ | |
| 40 | #undef CONFIG_SKIP_LOWLEVEL_INIT /* undef for developing */ | |
| 41 | ||
| 42 | /* | |
| 43 | * High Level Configuration Options | |
| 44 | * (easy to change) | |
| 45 | */ | |
| 46 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ | |
| 47 | #define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */ | |
| 48 | #define CONFIG_SBC2410X 1 /* on a friendly-arm SBC-2410X Board */ | |
| 49 | ||
| 50 | /* input clock of PLL */ | |
| 51 | #define CONFIG_SYS_CLK_FREQ 12000000/* the SBC2410X has 12MHz input clock */ | |
| 52 | ||
| 53 | ||
| 54 | #define USE_920T_MMU 1 | |
| 55 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ | |
| 56 | ||
| 57 | /* | |
| 58 | * Size of malloc() pool | |
| 59 | */ | |
| 60 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) | |
| 61 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ | |
| 62 | ||
| 63 | /* | |
| 64 | * Hardware drivers | |
| 65 | */ | |
| 66 | #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ | |
| 67 | #define CS8900_BASE 0x19000300 | |
| 68 | #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ | |
| 69 | ||
| 70 | /* | |
| 71 | * select serial console configuration | |
| 72 | */ | |
| 73 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */ | |
| 74 | ||
| 75 | /************************************************************ | |
| 76 | * RTC | |
| 77 | ************************************************************/ | |
| 78 | #define CONFIG_RTC_S3C24X0 1 | |
| 79 | ||
| 80 | /* allow to overwrite serial and ethaddr */ | |
| 81 | #define CONFIG_ENV_OVERWRITE | |
| 82 | ||
| 83 | #define CONFIG_BAUDRATE 115200 | |
| 84 | ||
| 866e3089 | 85 | |
| 079a136c JL |
86 | /* |
| 87 | * BOOTP options | |
| 88 | */ | |
| 89 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 90 | #define CONFIG_BOOTP_BOOTPATH | |
| 91 | #define CONFIG_BOOTP_GATEWAY | |
| 92 | #define CONFIG_BOOTP_HOSTNAME | |
| 93 | ||
| 94 | ||
| 866e3089 JL |
95 | /* |
| 96 | * Command line configuration. | |
| 97 | */ | |
| 98 | #include <config_cmd_default.h> | |
| 99 | ||
| 100 | #define CONFIG_CMD_ASKENV | |
| 101 | #define CONFIG_CMD_CACHE | |
| 102 | #define CONFIG_CMD_DATE | |
| 103 | #define CONFIG_CMD_DHCP | |
| 104 | #define CONFIG_CMD_ELF | |
| 105 | #define CONFIG_CMD_PING | |
| 106 | #define CONFIG_CMD_REGINFO | |
| 107 | ||
| 32cb2c70 WD |
108 | |
| 109 | #define CONFIG_BOOTDELAY 3 | |
| 110 | #define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off" | |
| 111 | #define CONFIG_ETHADDR 08:00:3e:26:0a:5b | |
| 112 | #define CONFIG_NETMASK 255.255.255.0 | |
| 113 | #define CONFIG_IPADDR 192.168.0.69 | |
| 114 | #define CONFIG_SERVERIP 192.168.0.1 | |
| 115 | /*#define CONFIG_BOOTFILE "elinos-lart" */ | |
| 116 | #define CONFIG_BOOTCOMMAND "dhcp; bootm" | |
| 117 | ||
| 866e3089 | 118 | #if defined(CONFIG_CMD_KGDB) |
| 32cb2c70 WD |
119 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
| 120 | /* what's this ? it's not used anywhere */ | |
| 121 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
| 122 | #endif | |
| 123 | ||
| 124 | /* | |
| 125 | * Miscellaneous configurable options | |
| 126 | */ | |
| 127 | #define CFG_LONGHELP /* undef to save memory */ | |
| 128 | #define CFG_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */ | |
| 129 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ | |
| 130 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ | |
| 131 | #define CFG_MAXARGS 16 /* max number of command args */ | |
| 132 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ | |
| 133 | ||
| 134 | #define CFG_MEMTEST_START 0x30000000 /* memtest works on */ | |
| 135 | #define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ | |
| 136 | ||
| 137 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ | |
| 138 | ||
| 139 | #define CFG_LOAD_ADDR 0x33000000 /* default load address */ | |
| 140 | ||
| 141 | /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ | |
| 142 | /* it to wrap 100 times (total 1562500) to get 1 sec. */ | |
| 143 | #define CFG_HZ 1562500 | |
| 144 | ||
| 145 | /* valid baudrates */ | |
| 146 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
| 147 | ||
| 148 | /*----------------------------------------------------------------------- | |
| 149 | * Stack sizes | |
| 150 | * | |
| 151 | * The stack sizes are set up in start.S using the settings below | |
| 152 | */ | |
| 153 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
| 154 | #ifdef CONFIG_USE_IRQ | |
| 155 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ | |
| 156 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ | |
| 157 | #endif | |
| 158 | ||
| 159 | /*----------------------------------------------------------------------- | |
| 160 | * Physical Memory Map | |
| 161 | */ | |
| 162 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ | |
| 163 | #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ | |
| 164 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ | |
| 165 | ||
| 166 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ | |
| 167 | ||
| 168 | #define CFG_FLASH_BASE PHYS_FLASH_1 | |
| 169 | ||
| 170 | /*----------------------------------------------------------------------- | |
| 171 | * FLASH and environment organization | |
| 172 | */ | |
| 173 | /* #define CONFIG_AMD_LV400 1 /\* uncomment this if you have a LV400 flash *\/ */ | |
| 174 | ||
| 175 | #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ | |
| 176 | ||
| 177 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
| 178 | ||
| 179 | #ifdef CONFIG_AMD_LV800 | |
| 180 | #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ | |
| 181 | #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ | |
| 182 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */ | |
| 183 | #endif | |
| 184 | ||
| 185 | #ifdef CONFIG_AMD_LV400 | |
| 186 | #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ | |
| 187 | #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ | |
| 188 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */ | |
| 189 | #endif | |
| 190 | ||
| 191 | /* timeout values are in ticks */ | |
| 192 | #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ | |
| 193 | #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ | |
| 194 | ||
| 195 | #define CFG_ENV_IS_IN_FLASH 1 | |
| 196 | #define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ | |
| 197 | ||
| 198 | /*----------------------------------------------------------------------- | |
| 199 | * NAND flash settings | |
| 200 | */ | |
| 866e3089 | 201 | #if defined(CONFIG_CMD_NAND) |
| 32cb2c70 WD |
202 | #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ |
| 203 | #define SECTORSIZE 512 | |
| 204 | ||
| 205 | #define ADDR_COLUMN 1 | |
| 206 | #define ADDR_PAGE 2 | |
| 207 | #define ADDR_COLUMN_PAGE 3 | |
| 208 | ||
| 209 | #define NAND_ChipID_UNKNOWN 0x00 | |
| 210 | #define NAND_MAX_FLOORS 1 | |
| 211 | #define NAND_MAX_CHIPS 1 | |
| 212 | ||
| 213 | #define NAND_WAIT_READY(nand) NF_WaitRB() | |
| 214 | #define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) | |
| 215 | #define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) | |
| 216 | #define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) | |
| 217 | #define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) | |
| 218 | #define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) | |
| 219 | #define WRITE_NAND(d, adr) NF_Write(d) | |
| 220 | #define READ_NAND(adr) NF_Read() | |
| 221 | /* the following functions are NOP's because S3C24X0 handles this in hardware */ | |
| 222 | #define NAND_CTL_CLRALE(nandptr) | |
| 223 | #define NAND_CTL_SETALE(nandptr) | |
| 224 | #define NAND_CTL_CLRCLE(nandptr) | |
| 225 | #define NAND_CTL_SETCLE(nandptr) | |
| 226 | /* #undef CONFIG_MTD_NAND_VERIFY_WRITE */ | |
| 866e3089 | 227 | #endif /* CONFIG_CMD_NAND */ |
| 32cb2c70 WD |
228 | |
| 229 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 230 | #define CONFIG_INITRD_TAG | |
| 231 | #define CONFIG_CMDLINE_TAG | |
| 232 | ||
| 233 | #define CFG_HUSH_PARSER | |
| 234 | #define CFG_PROMPT_HUSH_PS2 "> " | |
| 235 | ||
| 236 | #define CONFIG_CMDLINE_EDITING | |
| 237 | ||
| 238 | #ifdef CONFIG_CMDLINE_EDITING | |
| 239 | #undef CONFIG_AUTO_COMPLETE | |
| 240 | #else | |
| 241 | #define CONFIG_AUTO_COMPLETE | |
| 242 | #endif | |
| 243 | ||
| 244 | #endif /* __CONFIG_H */ |