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Commit | Line | Data |
---|---|---|
010e58d4 LM |
1 | CONFIG_ARM=y |
2 | CONFIG_SPL_SYS_THUMB_BUILD=y | |
3 | CONFIG_ARCH_MX28=y | |
4 | CONFIG_SYS_TEXT_BASE=0x40002000 | |
9802154a | 5 | CONFIG_SYS_MALLOC_F_LEN=0x800 |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
010e58d4 LM |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
554e5514 | 9 | CONFIG_NR_DRAM_BANKS=1 |
148b8bb4 | 10 | CONFIG_IMX_CONFIG="" |
052170c6 | 11 | CONFIG_DM_GPIO=y |
010e58d4 | 12 | CONFIG_SPL_DM_SPI=y |
2bba7807 | 13 | CONFIG_DEFAULT_DEVICE_TREE="imx28-xea" |
c5a6e9f8 | 14 | CONFIG_SPL_TEXT_BASE=0x1000 |
010e58d4 | 15 | CONFIG_TARGET_XEA=y |
103c5f18 | 16 | CONFIG_SPL_MMC=y |
2a736066 | 17 | CONFIG_SPL_SERIAL=y |
010e58d4 | 18 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 |
010e58d4 | 19 | CONFIG_SPL=y |
9e1d65f3 | 20 | CONFIG_ENV_OFFSET_REDUND=0x90000 |
010e58d4 | 21 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
ea2ca7e1 | 22 | CONFIG_SPL_SPI=y |
49c8ef0e | 23 | CONFIG_SYS_LOAD_ADDR=0x42000000 |
d46e86d2 | 24 | CONFIG_SPL_PAYLOAD="u-boot.img" |
010e58d4 | 25 | CONFIG_FIT=y |
d6b318de | 26 | CONFIG_TIMESTAMP=y |
d1d731c0 | 27 | CONFIG_OF_BOARD_SETUP=y |
44a666a8 TR |
28 | CONFIG_USE_BOOTARGS=y |
29 | CONFIG_BOOTARGS="console=ttyAMA0,115200n8" | |
970bf860 TR |
30 | CONFIG_USE_BOOTCOMMAND=y |
31 | CONFIG_BOOTCOMMAND="run ${bootpri} ; run ${bootsec}" | |
ee66df14 LM |
32 | CONFIG_USE_PREBOOT=y |
33 | CONFIG_PREBOOT="run prebootcmd" | |
010e58d4 | 34 | CONFIG_BOARD_EARLY_INIT_F=y |
9b5f9aeb | 35 | CONFIG_SPL_NO_BSS_LIMIT=y |
010e58d4 LM |
36 | CONFIG_SPL_BOARD_INIT=y |
37 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | |
38 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y | |
f113d7d3 TR |
39 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
40 | CONFIG_SPL_STACK=0x20000 | |
010e58d4 | 41 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
f76750d1 | 42 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0 |
010e58d4 | 43 | CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y |
74326a32 | 44 | CONFIG_SPL_DMA=y |
010e58d4 | 45 | CONFIG_SPL_MMC_TINY=y |
56c40460 | 46 | CONFIG_SPL_DM_SPI_FLASH=y |
010e58d4 | 47 | CONFIG_SPL_OS_BOOT=y |
22eb1526 AG |
48 | CONFIG_SPL_FALCON_BOOT_MMCSD=y |
49 | CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x800 | |
010e58d4 | 50 | CONFIG_SPL_SPI_LOAD=y |
3e5b62f7 | 51 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 |
949feef0 | 52 | CONFIG_SPL_YMODEM_SUPPORT=y |
010e58d4 | 53 | CONFIG_HUSH_PARSER=y |
cf493582 | 54 | CONFIG_SYS_MAXARGS=32 |
010e58d4 LM |
55 | CONFIG_CMD_SPL=y |
56 | CONFIG_CMD_ASKENV=y | |
57 | CONFIG_CMD_GREPENV=y | |
58 | CONFIG_CMD_DM=y | |
59 | CONFIG_CMD_GPIO=y | |
60 | CONFIG_CMD_MMC=y | |
61 | CONFIG_CMD_MTD=y | |
62 | # CONFIG_CMD_PINMUX is not set | |
63 | CONFIG_CMD_SPI=y | |
64 | CONFIG_CMD_DHCP=y | |
65 | CONFIG_CMD_MII=y | |
66 | CONFIG_CMD_PING=y | |
67 | CONFIG_CMD_CACHE=y | |
68 | CONFIG_CMD_REGULATOR=y | |
69 | CONFIG_CMD_EXT4=y | |
70 | CONFIG_CMD_FS_GENERIC=y | |
71 | CONFIG_CMD_MTDPARTS=y | |
010e58d4 LM |
72 | CONFIG_DOS_PARTITION=y |
73 | CONFIG_OF_CONTROL=y | |
74 | CONFIG_SPL_OF_CONTROL=y | |
010e58d4 LM |
75 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent interrupts" |
76 | CONFIG_SPL_OF_PLATDATA=y | |
c8f2a060 | 77 | # CONFIG_SPL_OF_PLATDATA_PARENT is not set |
e91907a1 | 78 | CONFIG_ENV_OVERWRITE=y |
010e58d4 | 79 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
0081b0a6 | 80 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
fdfb17b1 TR |
81 | CONFIG_USE_BOOTFILE=y |
82 | CONFIG_BOOTFILE="uImage" | |
010e58d4 LM |
83 | CONFIG_NET_RANDOM_ETHADDR=y |
84 | CONFIG_DM=y | |
85 | CONFIG_SPL_DM=y | |
86 | CONFIG_DEVRES=y | |
010e58d4 | 87 | CONFIG_MXS_GPIO=y |
010e58d4 LM |
88 | CONFIG_SUPPORT_EMMC_BOOT=y |
89 | CONFIG_MMC_MXS=y | |
90 | CONFIG_MTD=y | |
c4c3fa98 | 91 | CONFIG_DM_MTD=y |
010e58d4 LM |
92 | CONFIG_DM_SPI_FLASH=y |
93 | CONFIG_SF_DEFAULT_BUS=3 | |
010e58d4 LM |
94 | CONFIG_SF_DEFAULT_SPEED=40000000 |
95 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y | |
96 | CONFIG_SPI_FLASH_ISSI=y | |
97 | CONFIG_SPI_FLASH_SPANSION=y | |
98 | CONFIG_SPI_FLASH_STMICRO=y | |
99 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set | |
c4c3fa98 | 100 | CONFIG_SPI_FLASH_MTD=y |
010e58d4 LM |
101 | CONFIG_PHYLIB=y |
102 | CONFIG_PHY_ADDR_ENABLE=y | |
103 | CONFIG_PHY_ADDR=1 | |
104 | CONFIG_PHY_FIXED=y | |
105 | CONFIG_DM_ETH=y | |
106 | CONFIG_FEC_MXC=y | |
107 | CONFIG_MII=y | |
108 | CONFIG_PINCTRL=y | |
109 | CONFIG_PINCTRL_MXS=y | |
110 | CONFIG_DM_REGULATOR=y | |
111 | CONFIG_DM_REGULATOR_FIXED=y | |
112 | CONFIG_DM_REGULATOR_GPIO=y | |
113 | CONFIG_CONS_INDEX=0 | |
114 | CONFIG_SPI=y | |
115 | CONFIG_DM_SPI=y | |
116 | CONFIG_MXS_SPI=y | |
117 | CONFIG_FS_FAT=y | |
118 | # CONFIG_SPL_OF_LIBFDT is not set |