]> Git Repo - J-u-boot.git/blame - configs/chromebook_speedy_defconfig
Convert CONFIG_TPL_NAND_INIT to Kconfig
[J-u-boot.git] / configs / chromebook_speedy_defconfig
CommitLineData
8e2e601c 1CONFIG_ARM=y
a2ac2b96 2CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
f76750d1 3CONFIG_SYS_ARCH_TIMER=y
7ba79f26 4# CONFIG_SPL_USE_ARCH_MEMCPY is not set
8e2e601c
MP
5CONFIG_ARCH_ROCKCHIP=y
6CONFIG_SYS_TEXT_BASE=0x00100000
554e5514 7CONFIG_NR_DRAM_BANKS=1
2bba7807 8CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
c5a6e9f8 9CONFIG_SPL_TEXT_BASE=0xff704000
8e2e601c 10CONFIG_ROCKCHIP_RK3288=y
103c5f18 11# CONFIG_SPL_MMC is not set
8e2e601c 12CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
d168bcb6 13CONFIG_SPL_STACK_R_ADDR=0x80000
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MP
14CONFIG_DEBUG_UART_BASE=0xff690000
15CONFIG_DEBUG_UART_CLOCK=24000000
8e2e601c 16CONFIG_SPL_SPI_FLASH_SUPPORT=y
ea2ca7e1 17CONFIG_SPL_SPI=y
d46e86d2 18CONFIG_SYS_LOAD_ADDR=0x800800
556fd590 19CONFIG_SPL_PAYLOAD="u-boot.img"
f7d0ae9c 20CONFIG_DEBUG_UART=y
eaf6ea6a
TR
21CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
22CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
37304aaf 23CONFIG_USE_PREBOOT=y
8e2e601c 24CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
0817daa7 25CONFIG_SILENT_CONSOLE=y
8e2e601c
MP
26# CONFIG_DISPLAY_CPUINFO is not set
27CONFIG_DISPLAY_BOARDINFO_LATE=y
fffdf729 28CONFIG_BOARD_EARLY_INIT_R=y
ca8a329a 29CONFIG_SPL_PAD_TO=0x7f8000
9b5f9aeb 30CONFIG_SPL_NO_BSS_LIMIT=y
7ba79f26 31# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
f113d7d3
TR
32# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
33CONFIG_SPL_STACK=0xff718000
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MP
34CONFIG_SPL_STACK_R=y
35CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
7ba79f26 36# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
1e52db67 37# CONFIG_SPL_CRC32 is not set
8e2e601c 38CONFIG_SPL_SPI_LOAD=y
3e5b62f7 39CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
8e2e601c
MP
40CONFIG_CMD_GPIO=y
41CONFIG_CMD_GPT=y
42CONFIG_CMD_I2C=y
43CONFIG_CMD_MMC=y
8e2e601c
MP
44CONFIG_CMD_SF_TEST=y
45CONFIG_CMD_SPI=y
46CONFIG_CMD_USB=y
47# CONFIG_CMD_SETEXPR is not set
48CONFIG_CMD_CACHE=y
49CONFIG_CMD_TIME=y
50CONFIG_CMD_PMIC=y
51CONFIG_CMD_REGULATOR=y
52# CONFIG_SPL_DOS_PARTITION is not set
53# CONFIG_SPL_EFI_PARTITION is not set
8e2e601c 54CONFIG_SPL_OF_CONTROL=y
8e2e601c
MP
55CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
56CONFIG_SPL_OF_PLATDATA=y
8d8ee47e 57CONFIG_SYS_RELOC_GD_ENV_ADDR=y
8e2e601c
MP
58CONFIG_REGMAP=y
59CONFIG_SPL_REGMAP=y
60CONFIG_SYSCON=y
61CONFIG_SPL_SYSCON=y
62# CONFIG_SPL_SIMPLE_BUS is not set
7ba79f26 63# CONFIG_SPL_BLK is not set
8e2e601c
MP
64CONFIG_CLK=y
65CONFIG_SPL_CLK=y
8e2e601c
MP
66CONFIG_ROCKCHIP_GPIO=y
67CONFIG_I2C_CROS_EC_TUNNEL=y
68CONFIG_SYS_I2C_ROCKCHIP=y
69CONFIG_I2C_MUX=y
70CONFIG_DM_KEYBOARD=y
93e1edff 71CONFIG_KEYBOARD=y
8e2e601c
MP
72CONFIG_CROS_EC_KEYB=y
73CONFIG_CROS_EC=y
74CONFIG_CROS_EC_SPI=y
75CONFIG_PWRSEQ=y
144d0574 76CONFIG_MMC_PWRSEQ=y
7ba79f26 77# CONFIG_SPL_DM_MMC is not set
8e2e601c
MP
78CONFIG_MMC_DW=y
79CONFIG_MMC_DW_ROCKCHIP=y
888f184a 80CONFIG_MTD=y
7ba79f26 81CONFIG_SF_DEFAULT_BUS=2
14453fbf 82CONFIG_SF_DEFAULT_SPEED=20000000
64df512e 83CONFIG_SPI_FLASH_GIGADEVICE=y
8e2e601c 84CONFIG_PINCTRL=y
7ba79f26 85CONFIG_PINCONF=y
8e2e601c 86CONFIG_SPL_PINCTRL=y
5e50f878 87# CONFIG_SPL_PINCTRL_FULL is not set
8e2e601c
MP
88CONFIG_DM_PMIC=y
89# CONFIG_SPL_PMIC_CHILDREN is not set
90CONFIG_PMIC_RK8XX=y
91CONFIG_DM_REGULATOR_FIXED=y
92CONFIG_REGULATOR_RK8XX=y
93CONFIG_PWM_ROCKCHIP=y
94CONFIG_RAM=y
95CONFIG_SPL_RAM=y
96CONFIG_DEBUG_UART_SHIFT=2
97CONFIG_ROCKCHIP_SERIAL=y
98CONFIG_ROCKCHIP_SPI=y
99CONFIG_SYSRESET=y
100CONFIG_USB=y
7ba79f26
UR
101# CONFIG_SPL_DM_USB is not set
102CONFIG_USB_DWC2=y
8e2e601c 103CONFIG_ROCKCHIP_USB2_PHY=y
8e2e601c 104CONFIG_DM_VIDEO=y
8a6ffeda 105# CONFIG_VIDEO_BPP8 is not set
8e2e601c
MP
106CONFIG_CONSOLE_TRUETYPE=y
107CONFIG_DISPLAY=y
108CONFIG_VIDEO_ROCKCHIP=y
109CONFIG_DISPLAY_ROCKCHIP_EDP=y
110CONFIG_DISPLAY_ROCKCHIP_HDMI=y
111# CONFIG_USE_PRIVATE_LIBGCC is not set
7ba79f26 112CONFIG_SPL_TINY_MEMSET=y
8e2e601c
MP
113CONFIG_CMD_DHRYSTONE=y
114CONFIG_ERRNO_STR=y
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