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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
a2777ecb 2/*
842ddf8e 3 * Copyright (c) 2016-2020 Toradex
a2777ecb
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4 */
5
6#include <common.h>
7#include "tdx-cfg-block.h"
90526e9f 8#include <asm/cache.h>
a2777ecb 9
4adc9fc1 10#if defined(CONFIG_TARGET_APALIS_IMX6) || \
9d63c7d8 11 defined(CONFIG_TARGET_APALIS_IMX8) || \
842ddf8e 12 defined(CONFIG_TARGET_APALIS_IMX8X) || \
4adc9fc1 13 defined(CONFIG_TARGET_COLIBRI_IMX6) || \
c0c3978c
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14 defined(CONFIG_TARGET_COLIBRI_IMX8X) || \
15 defined(CONFIG_TARGET_VERDIN_IMX8MM) || \
16 defined(CONFIG_TARGET_VERDIN_IMX8MN)
a2777ecb
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17#include <asm/arch/sys_proto.h>
18#else
19#define is_cpu_type(cpu) (0)
20#endif
21#if defined(CONFIG_CPU_PXA27X)
22#include <asm/arch-pxa/pxa.h>
23#else
24#define cpu_is_pxa27x(cpu) (0)
25#endif
26#include <cli.h>
27#include <console.h>
7b51b576 28#include <env.h>
a2777ecb
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29#include <flash.h>
30#include <malloc.h>
31#include <mmc.h>
32#include <nand.h>
c62db35d 33#include <asm/mach-types.h>
a2777ecb
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34
35DECLARE_GLOBAL_DATA_PTR;
36
37#define TAG_VALID 0xcf01
38#define TAG_MAC 0x0000
39#define TAG_HW 0x0008
40#define TAG_INVALID 0xffff
41
42#define TAG_FLAG_VALID 0x1
43
44#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
45#define TDX_CFG_BLOCK_MAX_SIZE 512
46#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
47#define TDX_CFG_BLOCK_MAX_SIZE 64
48#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
49#define TDX_CFG_BLOCK_MAX_SIZE 64
50#else
51#error Toradex config block location not set
52#endif
53
54struct toradex_tag {
55 u32 len:14;
56 u32 flags:2;
57 u32 id:16;
58};
59
60bool valid_cfgblock;
61struct toradex_hw tdx_hw_tag;
62struct toradex_eth_addr tdx_eth_addr;
63u32 tdx_serial;
64
65const char * const toradex_modules[] = {
66 [0] = "UNKNOWN MODULE",
67 [1] = "Colibri PXA270 312MHz",
68 [2] = "Colibri PXA270 520MHz",
69 [3] = "Colibri PXA320 806MHz",
70 [4] = "Colibri PXA300 208MHz",
71 [5] = "Colibri PXA310 624MHz",
72 [6] = "Colibri PXA320 806MHz IT",
73 [7] = "Colibri PXA300 208MHz XT",
74 [8] = "Colibri PXA270 312MHz",
75 [9] = "Colibri PXA270 520MHz",
76 [10] = "Colibri VF50 128MB", /* not currently on sale */
77 [11] = "Colibri VF61 256MB",
78 [12] = "Colibri VF61 256MB IT",
79 [13] = "Colibri VF50 128MB IT",
80 [14] = "Colibri iMX6 Solo 256MB",
81 [15] = "Colibri iMX6 DualLite 512MB",
82 [16] = "Colibri iMX6 Solo 256MB IT",
83 [17] = "Colibri iMX6 DualLite 512MB IT",
84 [18] = "UNKNOWN MODULE",
85 [19] = "UNKNOWN MODULE",
86 [20] = "Colibri T20 256MB",
87 [21] = "Colibri T20 512MB",
88 [22] = "Colibri T20 512MB IT",
89 [23] = "Colibri T30 1GB",
90 [24] = "Colibri T20 256MB IT",
91 [25] = "Apalis T30 2GB",
92 [26] = "Apalis T30 1GB",
93 [27] = "Apalis iMX6 Quad 1GB",
94 [28] = "Apalis iMX6 Quad 2GB IT",
95 [29] = "Apalis iMX6 Dual 512MB",
96 [30] = "Colibri T30 1GB IT",
97 [31] = "Apalis T30 1GB IT",
98 [32] = "Colibri iMX7 Solo 256MB",
99 [33] = "Colibri iMX7 Dual 512MB",
100 [34] = "Apalis TK1 2GB",
101 [35] = "Apalis iMX6 Dual 1GB IT",
d826b875 102 [36] = "Colibri iMX6ULL 256MB",
4adc9fc1
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103 [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT",
104 [38] = "Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
d826b875 105 [39] = "Colibri iMX7 Dual 1GB (eMMC)",
4adc9fc1 106 [40] = "Colibri iMX6ULL 512MB Wi-Fi / BT IT",
d826b875
SA
107 [41] = "Colibri iMX7 Dual 512MB EPDC",
108 [42] = "Apalis TK1 4GB",
08f80555
GS
109 [43] = "Colibri T20 512MB IT SETEK",
110 [44] = "Colibri iMX6ULL 512MB IT",
111 [45] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth",
6988a3af
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112 [46] = "Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
113 [47] = "Apalis iMX8 QuadMax 4GB IT",
114 [48] = "Apalis iMX8 QuadPlus 2GB Wi-Fi / BT",
115 [49] = "Apalis iMX8 QuadPlus 2GB",
116 [50] = "Colibri iMX8 QuadXPlus 2GB IT",
117 [51] = "Colibri iMX8 DualX 1GB Wi-Fi / Bluetooth",
118 [52] = "Colibri iMX8 DualX 1GB",
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119 [53] = "Apalis iMX8 QuadXPlus 2GB ECC IT",
120 [54] = "Apalis iMX8 DualXPlus 1GB",
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121 [55] = "Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT",
122 [56] = "Verdin iMX8M Nano SoloLite 1GB", /* not currently on sale */
123 [57] = "Verdin iMX8M Mini DualLite 1GB",
a2777ecb
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124};
125
126#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
127static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
128{
129 struct mmc *mmc;
130 int dev = CONFIG_TDX_CFG_BLOCK_DEV;
131 int offset = CONFIG_TDX_CFG_BLOCK_OFFSET;
132 uint part = CONFIG_TDX_CFG_BLOCK_PART;
133 uint blk_start;
134 int ret = 0;
135
136 /* Read production parameter config block from eMMC */
137 mmc = find_mmc_device(dev);
138 if (!mmc) {
139 puts("No MMC card found\n");
140 ret = -ENODEV;
141 goto out;
142 }
42a4f182
SA
143 if (mmc_init(mmc)) {
144 puts("MMC init failed\n");
145 return -EINVAL;
146 }
0e513e78 147 if (part != mmc_get_blk_desc(mmc)->hwpart) {
a2777ecb
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148 if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
149 puts("MMC partition switch failed\n");
150 ret = -ENODEV;
151 goto out;
152 }
153 }
154 if (offset < 0)
155 offset += mmc->capacity;
156 blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
157
158 if (!write) {
159 /* Careful reads a whole block of 512 bytes into config_block */
160 if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1,
161 (unsigned char *)config_block) != 1) {
162 ret = -EIO;
163 goto out;
164 }
a2777ecb
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165 } else {
166 /* Just writing one 512 byte block */
167 if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
168 (unsigned char *)config_block) != 1) {
169 ret = -EIO;
170 goto out;
171 }
172 }
173
174out:
175 /* Switch back to regular eMMC user partition */
176 blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0);
177
178 return ret;
179}
180#endif
181
182#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND
183static int read_tdx_cfg_block_from_nand(unsigned char *config_block)
184{
185 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
bc53fb19
SA
186 struct mtd_info *mtd = get_nand_dev_by_index(0);
187
188 if (!mtd)
189 return -ENODEV;
a2777ecb
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190
191 /* Read production parameter config block from NAND page */
bc53fb19 192 return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET,
bf264cd0
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193 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
194 config_block);
a2777ecb
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195}
196
197static int write_tdx_cfg_block_to_nand(unsigned char *config_block)
198{
199 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
200
201 /* Write production parameter config block to NAND page */
bf264cd0
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202 return nand_write_skip_bad(get_nand_dev_by_index(0),
203 CONFIG_TDX_CFG_BLOCK_OFFSET,
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204 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
205 config_block, WITH_WR_VERIFY);
206}
207#endif
208
209#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR
210static int read_tdx_cfg_block_from_nor(unsigned char *config_block)
211{
212 /* Read production parameter config block from NOR flash */
213 memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET,
214 TDX_CFG_BLOCK_MAX_SIZE);
215 return 0;
216}
217
218static int write_tdx_cfg_block_to_nor(unsigned char *config_block)
219{
220 /* Write production parameter config block to NOR flash */
221 return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET,
222 TDX_CFG_BLOCK_MAX_SIZE);
223}
224#endif
225
226int read_tdx_cfg_block(void)
227{
228 int ret = 0;
229 u8 *config_block = NULL;
230 struct toradex_tag *tag;
231 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
232 int offset;
233
234 /* Allocate RAM area for config block */
235 config_block = memalign(ARCH_DMA_MINALIGN, size);
236 if (!config_block) {
237 printf("Not enough malloc space available!\n");
238 return -ENOMEM;
239 }
240
241 memset(config_block, 0, size);
242
243#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
244 ret = tdx_cfg_block_mmc_storage(config_block, 0);
245#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
246 ret = read_tdx_cfg_block_from_nand(config_block);
247#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
248 ret = read_tdx_cfg_block_from_nor(config_block);
249#else
250 ret = -EINVAL;
251#endif
252 if (ret)
253 goto out;
254
255 /* Expect a valid tag first */
256 tag = (struct toradex_tag *)config_block;
257 if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) {
258 valid_cfgblock = false;
259 ret = -EINVAL;
260 goto out;
261 }
262 valid_cfgblock = true;
263 offset = 4;
264
265 while (offset < TDX_CFG_BLOCK_MAX_SIZE) {
266 tag = (struct toradex_tag *)(config_block + offset);
267 offset += 4;
268 if (tag->id == TAG_INVALID)
269 break;
270
271 if (tag->flags == TAG_FLAG_VALID) {
272 switch (tag->id) {
273 case TAG_MAC:
274 memcpy(&tdx_eth_addr, config_block + offset,
275 6);
276
277 /* NIC part of MAC address is serial number */
278 tdx_serial = ntohl(tdx_eth_addr.nic) >> 8;
279 break;
280 case TAG_HW:
281 memcpy(&tdx_hw_tag, config_block + offset, 8);
282 break;
283 }
284 }
285
286 /* Get to next tag according to current tags length */
287 offset += tag->len * 4;
288 }
289
290 /* Cap product id to avoid issues with a yet unknown one */
ccdd3713 291 if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) /
a2777ecb
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292 sizeof(toradex_modules[0])))
293 tdx_hw_tag.prodid = 0;
294
295out:
296 free(config_block);
297 return ret;
298}
299
300static int get_cfgblock_interactive(void)
301{
302 char message[CONFIG_SYS_CBSIZE];
303 char *soc;
304 char it = 'n';
d1aa1444 305 char wb = 'n';
c0c3978c 306 int len = 0;
a2777ecb 307
89315f31
SA
308 /* Unknown module by default */
309 tdx_hw_tag.prodid = 0;
310
a2777ecb
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311 if (cpu_is_pxa27x())
312 sprintf(message, "Is the module the 312 MHz version? [y/N] ");
c0c3978c 313#if !defined(CONFIG_TARGET_VERDIN_IMX8MM) || !defined(CONFIG_TARGET_VERDIN_IMX8MN)
a2777ecb
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314 else
315 sprintf(message, "Is the module an IT version? [y/N] ");
c0c3978c 316
a2777ecb
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317 len = cli_readline(message);
318 it = console_buffer[0];
c0c3978c
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319#else
320 else
321 it = 'y';
322#endif
323
a2777ecb 324
d1aa1444 325#if defined(CONFIG_TARGET_APALIS_IMX8) || \
842ddf8e 326 defined(CONFIG_TARGET_APALIS_IMX8X) || \
d1aa1444
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327 defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
328 defined(CONFIG_TARGET_COLIBRI_IMX8X)
329 sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] ");
330 len = cli_readline(message);
331 wb = console_buffer[0];
332#endif
333
00caae6d 334 soc = env_get("soc");
a2777ecb 335 if (!strcmp("mx6", soc)) {
89315f31
SA
336#ifdef CONFIG_TARGET_APALIS_IMX6
337 if (it == 'y' || it == 'Y') {
a2777ecb
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338 if (is_cpu_type(MXC_CPU_MX6Q))
339 tdx_hw_tag.prodid = APALIS_IMX6Q_IT;
340 else
341 tdx_hw_tag.prodid = APALIS_IMX6D_IT;
89315f31 342 } else {
a2777ecb
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343 if (is_cpu_type(MXC_CPU_MX6Q))
344 tdx_hw_tag.prodid = APALIS_IMX6Q;
345 else
346 tdx_hw_tag.prodid = APALIS_IMX6D;
89315f31
SA
347 }
348#elif CONFIG_TARGET_COLIBRI_IMX6
08f80555 349 if (it == 'y' || it == 'Y') {
89315f31 350 if (is_cpu_type(MXC_CPU_MX6DL))
a2777ecb 351 tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT;
89315f31 352 else if (is_cpu_type(MXC_CPU_MX6SOLO))
a2777ecb 353 tdx_hw_tag.prodid = COLIBRI_IMX6S_IT;
08f80555 354 } else {
89315f31 355 if (is_cpu_type(MXC_CPU_MX6DL))
a2777ecb 356 tdx_hw_tag.prodid = COLIBRI_IMX6DL;
89315f31 357 else if (is_cpu_type(MXC_CPU_MX6SOLO))
a2777ecb 358 tdx_hw_tag.prodid = COLIBRI_IMX6S;
08f80555 359 }
89315f31 360#elif CONFIG_TARGET_COLIBRI_IMX6ULL
89315f31
SA
361 if (it == 'y' || it == 'Y') {
362 if (wb == 'y' || wb == 'Y')
363 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT;
364 else
365 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT;
366 } else {
367 if (wb == 'y' || wb == 'Y')
368 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT;
369 else
370 tdx_hw_tag.prodid = COLIBRI_IMX6ULL;
371 }
372#endif
08f80555 373 } else if (!strcmp("imx7d", soc))
a2777ecb 374 tdx_hw_tag.prodid = COLIBRI_IMX7D;
08f80555 375 else if (!strcmp("imx7s", soc))
a2777ecb 376 tdx_hw_tag.prodid = COLIBRI_IMX7S;
c0c3978c
MZ
377 else if (is_cpu_type(MXC_CPU_IMX8MM))
378 tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT;
379 else if (is_cpu_type(MXC_CPU_IMX8MMDL))
380 tdx_hw_tag.prodid = VERDIN_IMX8MMDL;
381 else if (is_cpu_type(MXC_CPU_IMX8MN))
382 tdx_hw_tag.prodid = VERDIN_IMX8MNSL;
9d63c7d8
MZ
383 else if (is_cpu_type(MXC_CPU_IMX8QM)) {
384 if (it == 'y' || it == 'Y') {
385 if (wb == 'y' || wb == 'Y')
386 tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
387 else
388 tdx_hw_tag.prodid = APALIS_IMX8QM_IT;
389 } else {
390 if (wb == 'y' || wb == 'Y')
391 tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT;
392 else
393 tdx_hw_tag.prodid = APALIS_IMX8QP;
394 }
395 } else if (is_cpu_type(MXC_CPU_IMX8QXP)) {
842ddf8e
MZ
396#ifdef CONFIG_TARGET_APALIS_IMX8X
397 if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') {
398 tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT;
399 } else {
400 if (gd->ram_size == 0x40000000)
401 tdx_hw_tag.prodid = APALIS_IMX8DXP;
402 else
403 tdx_hw_tag.prodid = APALIS_IMX8QXP;
404 }
405#elif CONFIG_TARGET_COLIBRI_IMX8X
6c297ee8
MZ
406 if (it == 'y' || it == 'Y') {
407 if (wb == 'y' || wb == 'Y')
408 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
409 else
410 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT;
411 } else {
412 if (wb == 'y' || wb == 'Y')
413 tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT;
414 else
415 tdx_hw_tag.prodid = COLIBRI_IMX8DX;
416 }
842ddf8e 417#endif
6c297ee8 418 } else if (!strcmp("tegra20", soc)) {
a2777ecb
MZ
419 if (it == 'y' || it == 'Y')
420 if (gd->ram_size == 0x10000000)
421 tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT;
422 else
423 tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT;
424 else
425 if (gd->ram_size == 0x10000000)
426 tdx_hw_tag.prodid = COLIBRI_T20_256MB;
427 else
428 tdx_hw_tag.prodid = COLIBRI_T20_512MB;
429 } else if (cpu_is_pxa27x()) {
430 if (it == 'y' || it == 'Y')
431 tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ;
432 else
433 tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
08f80555 434 }
a2777ecb 435#ifdef CONFIG_MACH_TYPE
08f80555 436 else if (!strcmp("tegra30", soc)) {
a2777ecb
MZ
437 if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) {
438 if (it == 'y' || it == 'Y')
439 tdx_hw_tag.prodid = APALIS_T30_IT;
440 else
441 if (gd->ram_size == 0x40000000)
442 tdx_hw_tag.prodid = APALIS_T30_1GB;
443 else
444 tdx_hw_tag.prodid = APALIS_T30_2GB;
445 } else {
446 if (it == 'y' || it == 'Y')
447 tdx_hw_tag.prodid = COLIBRI_T30_IT;
448 else
449 tdx_hw_tag.prodid = COLIBRI_T30;
450 }
08f80555 451 }
a2777ecb 452#endif /* CONFIG_MACH_TYPE */
08f80555 453 else if (!strcmp("tegra124", soc)) {
a2777ecb
MZ
454 tdx_hw_tag.prodid = APALIS_TK1_2GB;
455 } else if (!strcmp("vf500", soc)) {
456 if (it == 'y' || it == 'Y')
457 tdx_hw_tag.prodid = COLIBRI_VF50_IT;
458 else
459 tdx_hw_tag.prodid = COLIBRI_VF50;
460 } else if (!strcmp("vf610", soc)) {
461 if (it == 'y' || it == 'Y')
462 tdx_hw_tag.prodid = COLIBRI_VF61_IT;
463 else
464 tdx_hw_tag.prodid = COLIBRI_VF61;
89315f31
SA
465 }
466
467 if (!tdx_hw_tag.prodid) {
a2777ecb
MZ
468 printf("Module type not detectable due to unknown SoC\n");
469 return -1;
470 }
471
472 while (len < 4) {
473 sprintf(message, "Enter the module version (e.g. V1.1B): V");
474 len = cli_readline(message);
475 }
476
477 tdx_hw_tag.ver_major = console_buffer[0] - '0';
478 tdx_hw_tag.ver_minor = console_buffer[2] - '0';
479 tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
480
08f80555 481 if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
a2777ecb
MZ
482 tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
483 COLIBRI_PXA270_V1_312MHZ);
484
485 while (len < 8) {
486 sprintf(message, "Enter module serial number: ");
487 len = cli_readline(message);
488 }
489
490 tdx_serial = simple_strtoul(console_buffer, NULL, 10);
491
492 return 0;
493}
494
495static int get_cfgblock_barcode(char *barcode)
496{
497 if (strlen(barcode) < 16) {
498 printf("Argument too short, barcode is 16 chars long\n");
499 return -1;
500 }
501
502 /* Get hardware information from the first 8 digits */
503 tdx_hw_tag.ver_major = barcode[4] - '0';
504 tdx_hw_tag.ver_minor = barcode[5] - '0';
505 tdx_hw_tag.ver_assembly = barcode[7] - '0';
506
507 barcode[4] = '\0';
508 tdx_hw_tag.prodid = simple_strtoul(barcode, NULL, 10);
509
510 /* Parse second part of the barcode (serial number */
511 barcode += 8;
512 tdx_serial = simple_strtoul(barcode, NULL, 10);
513
514 return 0;
515}
516
517static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
518 char * const argv[])
519{
520 u8 *config_block;
521 struct toradex_tag *tag;
522 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
523 int offset = 0;
524 int ret = CMD_RET_SUCCESS;
525 int err;
587b13c6 526 int force_overwrite = 0;
a2777ecb
MZ
527
528 /* Allocate RAM area for config block */
529 config_block = memalign(ARCH_DMA_MINALIGN, size);
530 if (!config_block) {
531 printf("Not enough malloc space available!\n");
532 return CMD_RET_FAILURE;
533 }
534
535 memset(config_block, 0xff, size);
536
587b13c6
DS
537 if (argc >= 3) {
538 if (argv[2][0] == '-' && argv[2][1] == 'y')
539 force_overwrite = 1;
540 }
541
a2777ecb
MZ
542 read_tdx_cfg_block();
543 if (valid_cfgblock) {
544#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
545 /*
546 * On NAND devices, recreation is only allowed if the page is
547 * empty (config block invalid...)
548 */
9d364ebd 549 printf("NAND erase block %d need to be erased before creating a Toradex config block\n",
bf264cd0
GS
550 CONFIG_TDX_CFG_BLOCK_OFFSET /
551 get_nand_dev_by_index(0)->erasesize);
a2777ecb
MZ
552 goto out;
553#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
554 /*
555 * On NOR devices, recreation is only allowed if the sector is
556 * empty and write protection is off (config block invalid...)
557 */
9d364ebd 558 printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n",
a2777ecb
MZ
559 CONFIG_TDX_CFG_BLOCK_OFFSET);
560 goto out;
561#else
587b13c6
DS
562 if (!force_overwrite) {
563 char message[CONFIG_SYS_CBSIZE];
a2777ecb 564
587b13c6
DS
565 sprintf(message,
566 "A valid Toradex config block is present, still recreate? [y/N] ");
a2777ecb 567
587b13c6
DS
568 if (!cli_readline(message))
569 goto out;
570
571 if (console_buffer[0] != 'y' &&
572 console_buffer[0] != 'Y')
573 goto out;
574 }
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575#endif
576 }
577
578 /* Parse new Toradex config block data... */
587b13c6 579 if (argc < 3 || (force_overwrite && argc < 4)) {
a2777ecb 580 err = get_cfgblock_interactive();
587b13c6
DS
581 } else {
582 if (force_overwrite)
583 err = get_cfgblock_barcode(argv[3]);
584 else
585 err = get_cfgblock_barcode(argv[2]);
586 }
a2777ecb
MZ
587 if (err) {
588 ret = CMD_RET_FAILURE;
589 goto out;
590 }
591
592 /* Convert serial number to MAC address (the storage format) */
593 tdx_eth_addr.oui = htonl(0x00142dUL << 8);
594 tdx_eth_addr.nic = htonl(tdx_serial << 8);
595
596 /* Valid Tag */
597 tag = (struct toradex_tag *)config_block;
598 tag->id = TAG_VALID;
599 tag->flags = TAG_FLAG_VALID;
600 tag->len = 0;
601 offset += 4;
602
603 /* Product Tag */
604 tag = (struct toradex_tag *)(config_block + offset);
605 tag->id = TAG_HW;
606 tag->flags = TAG_FLAG_VALID;
607 tag->len = 2;
608 offset += 4;
609
610 memcpy(config_block + offset, &tdx_hw_tag, 8);
611 offset += 8;
612
613 /* MAC Tag */
614 tag = (struct toradex_tag *)(config_block + offset);
615 tag->id = TAG_MAC;
616 tag->flags = TAG_FLAG_VALID;
617 tag->len = 2;
618 offset += 4;
619
620 memcpy(config_block + offset, &tdx_eth_addr, 6);
621 offset += 6;
622 memset(config_block + offset, 0, 32 - offset);
623
624#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
625 err = tdx_cfg_block_mmc_storage(config_block, 1);
626#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
627 err = write_tdx_cfg_block_to_nand(config_block);
628#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
629 err = write_tdx_cfg_block_to_nor(config_block);
630#else
631 err = -EINVAL;
632#endif
633 if (err) {
634 printf("Failed to write Toradex config block: %d\n", ret);
635 ret = CMD_RET_FAILURE;
636 goto out;
637 }
638
639 printf("Toradex config block successfully written\n");
640
641out:
642 free(config_block);
643 return ret;
644}
645
646static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc,
647 char * const argv[])
648{
649 int ret;
650
651 if (argc < 2)
652 return CMD_RET_USAGE;
653
654 if (!strcmp(argv[1], "create")) {
655 return do_cfgblock_create(cmdtp, flag, argc, argv);
656 } else if (!strcmp(argv[1], "reload")) {
657 ret = read_tdx_cfg_block();
658 if (ret) {
659 printf("Failed to reload Toradex config block: %d\n",
660 ret);
661 return CMD_RET_FAILURE;
662 }
663 return CMD_RET_SUCCESS;
664 }
665
666 return CMD_RET_USAGE;
667}
668
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669U_BOOT_CMD(cfgblock, 4, 0, do_cfgblock,
670 "Toradex config block handling commands",
671 "create [-y] [barcode] - (Re-)create Toradex config block\n"
672 "cfgblock reload - Reload Toradex config block from flash"
a2777ecb 673);
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