[J-u-boot.git] / include / configs / sh7763rdp.h

/*
 * Configuation settings for the Renesas SH7763RDP board
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Copyright (C) 2008 Nobuhiro Iwamatsu <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __SH7763RDP_H
#define __SH7763RDP_H

#define CONFIG_SH		1
#define CONFIG_SH4		1
#define CONFIG_CPU_SH7763	1
#define CONFIG_SH7763RDP	1
#define __LITTLE_ENDIAN		1

/*
 * Command line configuration.
 */
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_NFS
#define CONFIG_CMD_JFFS2

#define CONFIG_BOOTDELAY        -1
#define CONFIG_BOOTARGS         "console=ttySC2,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE    1

#define CONFIG_VERSION_VARIABLE
#undef  CONFIG_SHOW_BOOT_PROGRESS

/* SCIF */
#define CONFIG_SCIF_CONSOLE        1
#define CONFIG_BAUDRATE         115200
#define CONFIG_CONS_SCIF2		1

#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE		256	/* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE		256	/* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS		16	/* max args accepted for monitor commands */
#define CONFIG_SYS_BARGSIZE	512	/* Buffer size for Boot Arguments
								passed to kernel */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate
												settings for this board */

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE		(0x8C000000)
#define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))

/* Flash(NOR) */
#define CONFIG_SYS_FLASH_BASE		(0xA0000000)
#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
#define CONFIG_SYS_MAX_FLASH_BANKS (1)
#define CONFIG_SYS_MAX_FLASH_SECT  (520)

/* U-boot setting */
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
/* Size of DRAM reserved for malloc() use */
#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE	(256)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#undef  CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
/* Timeout for Flash erase operations (in ms) */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
/* Timeout for Flash write operations (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
/* Timeout for Flash set sector lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
/* Timeout for Flash clear lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
/* Use hardware flash sectors protection instead of U-Boot software protection */
#undef  CONFIG_SYS_FLASH_PROTECTION
#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))

/* Clock */
#define CONFIG_SYS_CLK_FREQ	66666666
#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
#define CONFIG_SYS_HZ		1000

/* Ether */
#define CONFIG_NET_MULTI 1
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x01)

#endif /* __SH7763RDP_H */
Commit	Line	Data
7faddaec NI	1	/*
	2	* Configuation settings for the Renesas SH7763RDP board
	3	*
	4	* Copyright (C) 2008 Renesas Solutions Corp.
	5	* Copyright (C) 2008 Nobuhiro Iwamatsu <[email protected]>
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __SH7763RDP_H
	27	#define __SH7763RDP_H
	28
	29	#define CONFIG_SH 1
	30	#define CONFIG_SH4 1
	31	#define CONFIG_CPU_SH7763 1
	32	#define CONFIG_SH7763RDP 1
	33	#define __LITTLE_ENDIAN 1
	34
	35	/*
	36	* Command line configuration.
	37	*/
	38	#define CONFIG_CMD_SDRAM
	39	#define CONFIG_CMD_FLASH
	40	#define CONFIG_CMD_MEMORY
ba932445 NI	41	#define CONFIG_CMD_NET
ba932445 NI	42	#define CONFIG_CMD_PING
bdab39d3	43	#define CONFIG_CMD_SAVEENV
ba932445 NI	44	#define CONFIG_CMD_NFS
ba932445 NI	45	#define CONFIG_CMD_JFFS2
7faddaec NI	46
	47	#define CONFIG_BOOTDELAY -1
	48	#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
	49	#define CONFIG_ENV_OVERWRITE 1
	50
	51	#define CONFIG_VERSION_VARIABLE
	52	#undef CONFIG_SHOW_BOOT_PROGRESS
	53
	54	/* SCIF */
6c58a030	55	#define CONFIG_SCIF_CONSOLE 1
7faddaec NI	56	#define CONFIG_BAUDRATE 115200
	57	#define CONFIG_CONS_SCIF2 1
	58
6d0f6bcf JCPV	59	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	60	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
	61	#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
	62	#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
	63	#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
	64	#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
7faddaec	65	passed to kernel */
6d0f6bcf	66	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
7faddaec NI	67	settings for this board */
7faddaec NI	68
7faddaec	69	/* SDRAM */
6d0f6bcf JCPV	70	#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
	71	#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
	72	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
	73	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
7faddaec NI	74
7faddaec NI	75	/* Flash(NOR) */
6d0f6bcf JCPV	76	#define CONFIG_SYS_FLASH_BASE (0xA0000000)
	77	#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
	78	#define CONFIG_SYS_MAX_FLASH_BANKS (1)
	79	#define CONFIG_SYS_MAX_FLASH_SECT (520)
7faddaec NI	80
7faddaec NI	81	/* U-boot setting */
6d0f6bcf JCPV	82	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
	83	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
	84	#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
7faddaec	85	/* Size of DRAM reserved for malloc() use */
6d0f6bcf	86	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
7faddaec	87	/* size in bytes reserved for initial data */
6d0f6bcf JCPV	88	#define CONFIG_SYS_GBL_DATA_SIZE (256)
6d0f6bcf JCPV	89	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
7faddaec	90
6d0f6bcf	91	#define CONFIG_SYS_FLASH_CFI
00b1883a	92	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf JCPV	93	#undef CONFIG_SYS_FLASH_QUIET_TEST
6d0f6bcf JCPV	94	#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
7faddaec	95	/* Timeout for Flash erase operations (in ms) */
6d0f6bcf	96	#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
7faddaec	97	/* Timeout for Flash write operations (in ms) */
6d0f6bcf	98	#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
7faddaec	99	/* Timeout for Flash set sector lock bit operations (in ms) */
6d0f6bcf	100	#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
7faddaec	101	/* Timeout for Flash clear lock bit operations (in ms) */
6d0f6bcf	102	#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
7faddaec	103	/* Use hardware flash sectors protection instead of U-Boot software protection */
6d0f6bcf JCPV	104	#undef CONFIG_SYS_FLASH_PROTECTION
6d0f6bcf JCPV	105	#undef CONFIG_SYS_DIRECT_FLASH_TFTP
5a1aceb0	106	#define CONFIG_ENV_IS_IN_FLASH
0e8d1586 JCPV	107	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
0e8d1586 JCPV	108	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
6d0f6bcf JCPV	109	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
	110	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
	111	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
0e8d1586	112	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
6d0f6bcf	113	#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
7faddaec NI	114
	115	/* Clock */
	116	#define CONFIG_SYS_CLK_FREQ 66666666
	117	#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
8dd29c87	118	#define CONFIG_SYS_HZ 1000
7faddaec	119
ba932445	120	/* Ether */
71a040f4	121	#define CONFIG_NET_MULTI 1
ba932445 NI	122	#define CONFIG_SH_ETHER 1
	123	#define CONFIG_SH_ETHER_USE_PORT (1)
	124	#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
	125
7faddaec	126	#endif /* __SH7763RDP_H */