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8a3f6bb6 | 1 | /* |
dc7a9e64 EBS |
2 | * Common configuration settings for IGEP technology based boards |
3 | * | |
4 | * (C) Copyright 2012 | |
8a3f6bb6 EBS |
5 | * ISEE 2007 SL, <www.iseebcn.com> |
6 | * | |
3765b3e7 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
8a3f6bb6 EBS |
8 | */ |
9 | ||
dc7a9e64 EBS |
10 | #ifndef __IGEP00X0_H |
11 | #define __IGEP00X0_H | |
12 | ||
e37e954e | 13 | #define CONFIG_NR_DRAM_BANKS 2 |
8a3f6bb6 | 14 | |
e37e954e | 15 | #include <configs/ti_omap3_common.h> |
8a3f6bb6 | 16 | |
fa2f81b0 TR |
17 | /* |
18 | * We are only ever GP parts and will utilize all of the "downloaded image" | |
19 | * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). | |
20 | */ | |
e7fbcbc2 | 21 | #undef CONFIG_SPL_TEXT_BASE |
e7fbcbc2 EBS |
22 | #define CONFIG_SPL_TEXT_BASE 0x40200000 |
23 | ||
8a3f6bb6 EBS |
24 | #define CONFIG_MISC_INIT_R |
25 | ||
8a3f6bb6 EBS |
26 | #define CONFIG_REVISION_TAG 1 |
27 | ||
195dc231 PP |
28 | /* GPIO banks */ |
29 | #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO bank 2 */ | |
30 | #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO bank 4 */ | |
31 | ||
32 | /* TPS65950 */ | |
33 | #define PBIASLITEVMODE1 (1 << 8) | |
34 | ||
35 | /* LED */ | |
36 | #define IGEP0020_GPIO_LED 27 | |
37 | #define IGEP0030_GPIO_LED 16 | |
38 | ||
39 | /* Board and revision detection GPIOs */ | |
40 | #define IGEP0030_USB_TRANSCEIVER_RESET 54 | |
41 | #define GPIO_IGEP00X0_BOARD_DETECTION 28 | |
42 | #define GPIO_IGEP00X0_REVISION_DETECTION 129 | |
9d4f5421 | 43 | |
8a3f6bb6 | 44 | /* USB */ |
d636f2a7 | 45 | #define CONFIG_USB_MUSB_UDC 1 |
8a3f6bb6 EBS |
46 | #define CONFIG_USB_OMAP3 1 |
47 | #define CONFIG_TWL4030_USB 1 | |
48 | ||
49 | /* USB device configuration */ | |
50 | #define CONFIG_USB_DEVICE 1 | |
51 | #define CONFIG_USB_TTY 1 | |
8a3f6bb6 EBS |
52 | |
53 | /* Change these to suit your needs */ | |
54 | #define CONFIG_USBD_VENDORID 0x0451 | |
55 | #define CONFIG_USBD_PRODUCTID 0x5678 | |
56 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" | |
57 | #define CONFIG_USBD_PRODUCT_NAME "IGEP" | |
58 | ||
40372244 EBS |
59 | #ifndef CONFIG_SPL_BUILD |
60 | ||
40372244 EBS |
61 | /* Environment */ |
62 | #define ENV_DEVICE_SETTINGS \ | |
63 | "stdin=serial\0" \ | |
64 | "stdout=serial\0" \ | |
65 | "stderr=serial\0" | |
66 | ||
67 | #define MEM_LAYOUT_SETTINGS \ | |
68 | DEFAULT_LINUX_BOOT_ENV \ | |
69 | "scriptaddr=0x87E00000\0" \ | |
70 | "pxefile_addr_r=0x87F00000\0" | |
71 | ||
72 | #define BOOT_TARGET_DEVICES(func) \ | |
73 | func(MMC, mmc, 0) | |
74 | ||
195dc231 PP |
75 | #define CONFIG_BOOTCOMMAND \ |
76 | "run findfdt; " \ | |
77 | "run distro_bootcmd" | |
78 | ||
40372244 EBS |
79 | #include <config_distro_bootcmd.h> |
80 | ||
195dc231 PP |
81 | #define ENV_FINDFDT \ |
82 | "findfdt="\ | |
83 | "if test ${board_name} = igep0020; then " \ | |
84 | "if test ${board_rev} = F; then " \ | |
85 | "setenv fdtfile omap3-igep0020-rev-f.dtb; " \ | |
86 | "else " \ | |
87 | "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \ | |
88 | "if test ${board_name} = igep0030; then " \ | |
89 | "if test ${board_rev} = G; then " \ | |
90 | "setenv fdtfile omap3-igep0030-rev-g.dtb; " \ | |
91 | "else " \ | |
92 | "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \ | |
93 | "if test ${fdtfile} = ''; then " \ | |
94 | "echo WARNING: Could not determine device tree to use; fi; \0" | |
95 | ||
8a3f6bb6 | 96 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
195dc231 | 97 | ENV_FINDFDT \ |
40372244 EBS |
98 | ENV_DEVICE_SETTINGS \ |
99 | MEM_LAYOUT_SETTINGS \ | |
100 | BOOTENV | |
101 | ||
102 | #endif | |
8a3f6bb6 | 103 | |
4b9dc7c2 | 104 | #define CONFIG_MTD_PARTITIONS |
a5debaa3 | 105 | #define CONFIG_SYS_MTDPARTS_RUNTIME |
d271a611 | 106 | |
4b9dc7c2 | 107 | /* OneNAND config */ |
4b9dc7c2 LM |
108 | #define CONFIG_USE_ONENAND_BOARD_INIT |
109 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP | |
110 | #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) | |
d271a611 | 111 | |
4b9dc7c2 | 112 | /* NAND config */ |
d271a611 JMC |
113 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
114 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
115 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
116 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
117 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
81fd858c LM |
118 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
119 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
120 | 10, 11, 12, 13, 14, 15, 16, 17, \ | |
121 | 18, 19, 20, 21, 22, 23, 24, 25, \ | |
122 | 26, 27, 28, 29, 30, 31, 32, 33, \ | |
123 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
124 | 42, 43, 44, 45, 46, 47, 48, 49, \ | |
125 | 50, 51, 52, 53, 54, 55, 56, 57, } | |
d271a611 | 126 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
81fd858c LM |
127 | #define CONFIG_SYS_NAND_ECCBYTES 14 |
128 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
81fd858c | 129 | |
4b9dc7c2 LM |
130 | /* UBI configuration */ |
131 | #define CONFIG_SPL_UBI 1 | |
132 | #define CONFIG_SPL_UBI_MAX_VOL_LEBS 256 | |
133 | #define CONFIG_SPL_UBI_MAX_PEB_SIZE (256*1024) | |
134 | #define CONFIG_SPL_UBI_MAX_PEBS 4096 | |
135 | #define CONFIG_SPL_UBI_VOL_IDS 8 | |
136 | #define CONFIG_SPL_UBI_LOAD_MONITOR_ID 0 | |
137 | #define CONFIG_SPL_UBI_LOAD_KERNEL_ID 3 | |
138 | #define CONFIG_SPL_UBI_LOAD_ARGS_ID 4 | |
139 | #define CONFIG_SPL_UBI_PEB_OFFSET 4 | |
140 | #define CONFIG_SPL_UBI_VID_OFFSET 512 | |
141 | #define CONFIG_SPL_UBI_LEB_START 2048 | |
142 | #define CONFIG_SPL_UBI_INFO_ADDR 0x88080000 | |
143 | ||
144 | /* environment organization */ | |
4b9dc7c2 LM |
145 | #define CONFIG_ENV_UBI_PART "UBI" |
146 | #define CONFIG_ENV_UBI_VOLUME "config" | |
147 | #define CONFIG_ENV_UBI_VOLUME_REDUND "config_r" | |
148 | #define CONFIG_UBI_SILENCE_MSG 1 | |
149 | #define CONFIG_UBIFS_SILENCE_MSG 1 | |
150 | #define CONFIG_ENV_SIZE (32*1024) | |
151 | ||
dc7a9e64 | 152 | #endif /* __IGEP00X0_H */ |