projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c021880a WD |
1 | /* incaAscSio.h - (INCA) ASC UART tty driver header */ |
| 2 | ||
| 3 | #ifndef __INCincaAscSioh | |
| 4 | #define __INCincaAscSioh | |
| 5 | ||
| 6 | #include <asm/inca-ip.h> | |
| 7 | ||
| 8 | /* channel operating modes */ | |
| 9 | #define ASCOPT_CSIZE 0x00000003 | |
| 10 | #define ASCOPT_CS7 0x00000001 | |
| 11 | #define ASCOPT_CS8 0x00000002 | |
| 12 | #define ASCOPT_PARENB 0x00000004 | |
| 13 | #define ASCOPT_STOPB 0x00000008 | |
| 14 | #define ASCOPT_PARODD 0x00000010 | |
| 15 | #define ASCOPT_CREAD 0x00000020 | |
| 16 | ||
| 17 | #define ASC_OPTIONS (ASCOPT_CREAD | ASCOPT_CS8) | |
| 18 | ||
| 19 | /* ASC input select (0 or 1) */ | |
| 20 | #define CONSOLE_TTY 0 | |
| 21 | ||
| 22 | /* use fractional divider for baudrate settings */ | |
| 23 | #define INCAASC_USE_FDV | |
| 24 | ||
| 25 | #ifdef INCAASC_USE_FDV | |
| 26 | #define INCAASC_FDV_LOW_BAUDRATE 71 | |
| 8bde7f77 | 27 | #define INCAASC_FDV_HIGH_BAUDRATE 453 |
| c021880a WD |
28 | #endif /*INCAASC_USE_FDV*/ |
| 29 | ||
| 30 | ||
| 31 | #define INCAASC_TXFIFO_FL 1 | |
| 32 | #define INCAASC_RXFIFO_FL 1 | |
| 33 | #define INCAASC_TXFIFO_FULL 16 | |
| 34 | ||
| 35 | /* interrupt lines masks for the ASC device interrupts*/ | |
| 36 | /* change these macroses if it's necessary */ | |
| 37 | #define INCAASC_IRQ_LINE_ALL 0x000F0000 /* all IRQs */ | |
| 38 | ||
| 39 | #define INCAASC_IRQ_LINE_TIR 0x00010000 /* TIR - Tx */ | |
| 40 | #define INCAASC_IRQ_LINE_RIR 0x00020000 /* RIR - Rx */ | |
| 41 | #define INCAASC_IRQ_LINE_EIR 0x00040000 /* EIR - Err */ | |
| 42 | #define INCAASC_IRQ_LINE_TBIR 0x00080000 /* TBIR - Tx Buf*/ | |
| 43 | ||
| 8bde7f77 | 44 | /* interrupt controller access macros */ |
| c021880a WD |
45 | #define ASC_INTERRUPTS_ENABLE(X) \ |
| 46 | *((volatile unsigned int*) INCA_IP_ICU_IM2_IER) |= X; | |
| 47 | #define ASC_INTERRUPTS_DISABLE(X) \ | |
| 48 | *((volatile unsigned int*) INCA_IP_ICU_IM2_IER) &= ~X; | |
| 49 | #define ASC_INTERRUPTS_CLEAR(X) \ | |
| 50 | *((volatile unsigned int*) INCA_IP_ICU_IM2_ISR) = X; | |
| 51 | ||
| 52 | /* CLC register's bits and bitfields */ | |
| 53 | #define ASCCLC_DISR 0x00000001 | |
| 54 | #define ASCCLC_DISS 0x00000002 | |
| 55 | #define ASCCLC_RMCMASK 0x0000FF00 | |
| 56 | #define ASCCLC_RMCOFFSET 8 | |
| 57 | ||
| 58 | /* CON register's bits and bitfields */ | |
| 59 | #define ASCCON_MODEMASK 0x0007 | |
| 60 | #define ASCCON_M_8SYNC 0x0 | |
| 61 | #define ASCCON_M_8ASYNC 0x1 | |
| 62 | #define ASCCON_M_8IRDAASYNC 0x2 | |
| 63 | #define ASCCON_M_7ASYNCPAR 0x3 | |
| 64 | #define ASCCON_M_9ASYNC 0x4 | |
| 65 | #define ASCCON_M_8WAKEUPASYNC 0x5 | |
| 66 | #define ASCCON_M_8ASYNCPAR 0x7 | |
| 67 | #define ASCCON_STP 0x0008 | |
| 68 | #define ASCCON_REN 0x0010 | |
| 69 | #define ASCCON_PEN 0x0020 | |
| 70 | #define ASCCON_FEN 0x0040 | |
| 71 | #define ASCCON_OEN 0x0080 | |
| 72 | #define ASCCON_PE 0x0100 | |
| 73 | #define ASCCON_FE 0x0200 | |
| 74 | #define ASCCON_OE 0x0400 | |
| 75 | #define ASCCON_FDE 0x0800 | |
| 76 | #define ASCCON_ODD 0x1000 | |
| 77 | #define ASCCON_BRS 0x2000 | |
| 78 | #define ASCCON_LB 0x4000 | |
| 79 | #define ASCCON_R 0x8000 | |
| 80 | ||
| 81 | /* WHBCON register's bits and bitfields */ | |
| 82 | #define ASCWHBCON_CLRREN 0x0010 | |
| 83 | #define ASCWHBCON_SETREN 0x0020 | |
| 84 | #define ASCWHBCON_CLRPE 0x0100 | |
| 85 | #define ASCWHBCON_CLRFE 0x0200 | |
| 86 | #define ASCWHBCON_CLROE 0x0400 | |
| 87 | #define ASCWHBCON_SETPE 0x0800 | |
| 88 | #define ASCWHBCON_SETFE 0x1000 | |
| 89 | #define ASCWHBCON_SETOE 0x2000 | |
| 90 | ||
| 91 | /* ABCON register's bits and bitfields */ | |
| 92 | #define ASCABCON_ABEN 0x0001 | |
| 93 | #define ASCABCON_AUREN 0x0002 | |
| 94 | #define ASCABCON_ABSTEN 0x0004 | |
| 95 | #define ASCABCON_ABDETEN 0x0008 | |
| 96 | #define ASCABCON_FCDETEN 0x0010 | |
| 97 | #define ASCABCON_EMMASK 0x0300 | |
| 98 | #define ASCABCON_EMOFF 8 | |
| 8bde7f77 WD |
99 | #define ASCABCON_EM_DISAB 0x0 |
| 100 | #define ASCABCON_EM_DURAB 0x1 | |
| 101 | #define ASCABCON_EM_ALWAYS 0x2 | |
| c021880a WD |
102 | #define ASCABCON_TXINV 0x0400 |
| 103 | #define ASCABCON_RXINV 0x0800 | |
| 104 | ||
| 105 | /* FDV register mask, offset and bitfields*/ | |
| 106 | #define ASCFDV_VALUE_MASK 0x000001FF | |
| 107 | ||
| 108 | /* WHBABCON register's bits and bitfields */ | |
| 109 | #define ASCWHBABCON_SETABEN 0x0001 | |
| 110 | #define ASCWHBABCON_CLRABEN 0x0002 | |
| 111 | ||
| 112 | /* ABSTAT register's bits and bitfields */ | |
| 113 | #define ASCABSTAT_FCSDET 0x0001 | |
| 114 | #define ASCABSTAT_FCCDET 0x0002 | |
| 115 | #define ASCABSTAT_SCSDET 0x0004 | |
| 116 | #define ASCABSTAT_SCCDET 0x0008 | |
| 117 | #define ASCABSTAT_DETWAIT 0x0010 | |
| 118 | ||
| 119 | /* WHBABSTAT register's bits and bitfields */ | |
| 120 | #define ASCWHBABSTAT_CLRFCSDET 0x0001 | |
| 121 | #define ASCWHBABSTAT_SETFCSDET 0x0002 | |
| 122 | #define ASCWHBABSTAT_CLRFCCDET 0x0004 | |
| 123 | #define ASCWHBABSTAT_SETFCCDET 0x0008 | |
| 124 | #define ASCWHBABSTAT_CLRSCSDET 0x0010 | |
| 125 | #define ASCWHBABSTAT_SETSCSDET 0x0020 | |
| 126 | #define ASCWHBABSTAT_SETSCCDET 0x0040 | |
| 127 | #define ASCWHBABSTAT_CLRSCCDET 0x0080 | |
| 128 | #define ASCWHBABSTAT_CLRDETWAIT 0x0100 | |
| 129 | #define ASCWHBABSTAT_SETDETWAIT 0x0200 | |
| 130 | ||
| 131 | /* TXFCON register's bits and bitfields */ | |
| 132 | #define ASCTXFCON_TXFEN 0x0001 | |
| 133 | #define ASCTXFCON_TXFFLU 0x0002 | |
| 134 | #define ASCTXFCON_TXTMEN 0x0004 | |
| 135 | #define ASCTXFCON_TXFITLMASK 0x3F00 | |
| 136 | #define ASCTXFCON_TXFITLOFF 8 | |
| 137 | ||
| 138 | /* RXFCON register's bits and bitfields */ | |
| 139 | #define ASCRXFCON_RXFEN 0x0001 | |
| 140 | #define ASCRXFCON_RXFFLU 0x0002 | |
| 141 | #define ASCRXFCON_RXTMEN 0x0004 | |
| 142 | #define ASCRXFCON_RXFITLMASK 0x3F00 | |
| 143 | #define ASCRXFCON_RXFITLOFF 8 | |
| 144 | ||
| 145 | /* FSTAT register's bits and bitfields */ | |
| 146 | #define ASCFSTAT_RXFFLMASK 0x003F | |
| 147 | #define ASCFSTAT_TXFFLMASK 0x3F00 | |
| 148 | #define ASCFSTAT_TXFFLOFF 8 | |
| 149 | ||
| 150 | #define INCAASC_PMU_ENABLE(BIT) *((volatile ulong*)0xBF102000) |= (0x1 << BIT); | |
| 151 | ||
| 152 | typedef struct /* incaAsc_t */ | |
| 153 | { | |
| 154 | volatile unsigned long asc_clc; /*0x0000*/ | |
| 155 | volatile unsigned long asc_pisel; /*0x0004*/ | |
| 156 | volatile unsigned long asc_rsvd1[2]; /* for mapping */ /*0x0008*/ | |
| 157 | volatile unsigned long asc_con; /*0x0010*/ | |
| 158 | volatile unsigned long asc_bg; /*0x0014*/ | |
| 159 | volatile unsigned long asc_fdv; /*0x0018*/ | |
| 160 | volatile unsigned long asc_pmw; /* not used */ /*0x001C*/ | |
| 161 | volatile unsigned long asc_tbuf; /*0x0020*/ | |
| 162 | volatile unsigned long asc_rbuf; /*0x0024*/ | |
| 163 | volatile unsigned long asc_rsvd2[2]; /* for mapping */ /*0x0028*/ | |
| 164 | volatile unsigned long asc_abcon; /*0x0030*/ | |
| 165 | volatile unsigned long asc_abstat; /* not used */ /*0x0034*/ | |
| 166 | volatile unsigned long asc_rsvd3[2]; /* for mapping */ /*0x0038*/ | |
| 167 | volatile unsigned long asc_rxfcon; /*0x0040*/ | |
| 168 | volatile unsigned long asc_txfcon; /*0x0044*/ | |
| 169 | volatile unsigned long asc_fstat; /*0x0048*/ | |
| 170 | volatile unsigned long asc_rsvd4; /* for mapping */ /*0x004C*/ | |
| 171 | volatile unsigned long asc_whbcon; /*0x0050*/ | |
| 172 | volatile unsigned long asc_whbabcon; /*0x0054*/ | |
| 173 | volatile unsigned long asc_whbabstat; /* not used */ /*0x0058*/ | |
| 174 | ||
| 175 | } incaAsc_t; | |
| 176 | ||
| 177 | #endif /* __INCincaAscSioh */ |