[J-u-boot.git] / arch / arm / mach-rockchip / rk3288 / rk3288.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (c) 2016 Rockchip Electronics Co., Ltd
 */
#include <asm/io.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_rk3288.h>

#define GRF_BASE	0xff770000

int arch_cpu_init(void)
{
	/* We do some SoC one time setting here. */
	struct rk3288_grf * const grf = (void *)GRF_BASE;

	/* Use rkpwm by default */
	rk_setreg(&grf->soc_con2, 1 << 0);

	return 0;
}

#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
	/* Enable early UART on the RK3288 */
	struct rk3288_grf * const grf = (void *)GRF_BASE;

	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
		     GPIO7C6_MASK << GPIO7C6_SHIFT,
		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
}
#endif
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
aa89b554 KY	2	/*
aa89b554 KY	3	* Copyright (c) 2016 Rockchip Electronics Co., Ltd
aa89b554 KY	4	*/
aa89b554 KY	5	#include <asm/io.h>
15f09a1a	6	#include <asm/arch-rockchip/hardware.h>
070e48b3	7	#include <asm/arch-rockchip/grf_rk3288.h>
aa89b554	8
070e48b3	9	#define GRF_BASE 0xff770000
aa89b554 KY	10
	11	int arch_cpu_init(void)
	12	{
	13	/* We do some SoC one time setting here. */
070e48b3	14	struct rk3288_grf * const grf = (void *)GRF_BASE;
aa89b554 KY	15
aa89b554 KY	16	/* Use rkpwm by default */
070e48b3	17	rk_setreg(&grf->soc_con2, 1 << 0);
aa89b554 KY	18
	19	return 0;
	20	}
e83e885e KY	21
	22	#ifdef CONFIG_DEBUG_UART_BOARD_INIT
	23	void board_debug_uart_init(void)
	24	{
	25	/* Enable early UART on the RK3288 */
	26	struct rk3288_grf * const grf = (void *)GRF_BASE;
	27
	28	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT \|
	29	GPIO7C6_MASK << GPIO7C6_SHIFT,
	30	GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT \|
	31	GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
	32	}
	33	#endif