[J-u-boot.git] / drivers / serial / serial_arc.c

/*
 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <common.h>
#include <dm.h>
#include <serial.h>

DECLARE_GLOBAL_DATA_PTR;

struct arc_serial_regs {
	unsigned int id0;
	unsigned int id1;
	unsigned int id2;
	unsigned int id3;
	unsigned int data;
	unsigned int status;
	unsigned int baudl;
	unsigned int baudh;
};


struct arc_serial_plat {
	struct arc_serial_regs *reg;
	unsigned int uartclk;
};

/* Bit definitions of STATUS register */
#define UART_RXEMPTY		(1 << 5)
#define UART_OVERFLOW_ERR	(1 << 1)
#define UART_TXEMPTY		(1 << 7)

static int arc_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct arc_serial_plat *plat = dev->plat;
	struct arc_serial_regs *const regs = plat->reg;
	int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;

	writeb(arc_console_baud & 0xff, &regs->baudl);
	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);

	return 0;
}

static int arc_serial_putc(struct udevice *dev, const char c)
{
	struct arc_serial_plat *plat = dev->plat;
	struct arc_serial_regs *const regs = plat->reg;

	while (!(readb(&regs->status) & UART_TXEMPTY))
		;

	writeb(c, &regs->data);

	return 0;
}

static int arc_serial_tstc(struct arc_serial_regs *const regs)
{
	return !(readb(&regs->status) & UART_RXEMPTY);
}

static int arc_serial_pending(struct udevice *dev, bool input)
{
	struct arc_serial_plat *plat = dev->plat;
	struct arc_serial_regs *const regs = plat->reg;
	uint32_t status = readb(&regs->status);

	if (input)
		return status & UART_RXEMPTY ? 0 : 1;
	else
		return status & UART_TXEMPTY ? 0 : 1;
}

static int arc_serial_getc(struct udevice *dev)
{
	struct arc_serial_plat *plat = dev->plat;
	struct arc_serial_regs *const regs = plat->reg;

	while (!arc_serial_tstc(regs))
		;

	/* Check for overflow errors */
	if (readb(&regs->status) & UART_OVERFLOW_ERR)
		return 0;

	return readb(&regs->data) & 0xFF;
}

static int arc_serial_probe(struct udevice *dev)
{
	return 0;
}

static const struct dm_serial_ops arc_serial_ops = {
	.putc = arc_serial_putc,
	.pending = arc_serial_pending,
	.getc = arc_serial_getc,
	.setbrg = arc_serial_setbrg,
};

static const struct udevice_id arc_serial_ids[] = {
	{ .compatible = "snps,arc-uart" },
	{ }
};

static int arc_serial_of_to_plat(struct udevice *dev)
{
	struct arc_serial_plat *plat = dev_get_plat(dev);
	DECLARE_GLOBAL_DATA_PTR;

	plat->reg = dev_read_addr_ptr(dev);
	plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
				       "clock-frequency", 0);

	return 0;
}

U_BOOT_DRIVER(serial_arc) = {
	.name	= "serial_arc",
	.id	= UCLASS_SERIAL,
	.of_match = arc_serial_ids,
	.of_to_plat = arc_serial_of_to_plat,
	.plat_auto	= sizeof(struct arc_serial_plat),
	.probe = arc_serial_probe,
	.ops	= &arc_serial_ops,
};

#ifdef CONFIG_DEBUG_ARC_SERIAL
#include <debug_uart.h>

static inline void _debug_uart_init(void)
{
	struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE;
	int arc_console_baud = CONFIG_DEBUG_UART_CLOCK / (CONFIG_BAUDRATE * 4) - 1;

	writeb(arc_console_baud & 0xff, &regs->baudl);
	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
}

static inline void _debug_uart_putc(int c)
{
	struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE;

	while (!(readb(&regs->status) & UART_TXEMPTY))
		;

	writeb(c, &regs->data);
}

DEBUG_UART_FUNCS

#endif
Commit	Line	Data
22a240c3 AB	1	/*
	2	* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	*/
	9
	10	#include <common.h>
01496c4f	11	#include <dm.h>
22a240c3 AB	12	#include <serial.h>
	13
	14	DECLARE_GLOBAL_DATA_PTR;
	15
	16	struct arc_serial_regs {
	17	unsigned int id0;
	18	unsigned int id1;
	19	unsigned int id2;
	20	unsigned int id3;
	21	unsigned int data;
	22	unsigned int status;
	23	unsigned int baudl;
	24	unsigned int baudh;
	25	};
	26
01496c4f	27
8a8d24bd	28	struct arc_serial_plat {
01496c4f AB	29	struct arc_serial_regs *reg;
	30	unsigned int uartclk;
	31	};
	32
22a240c3 AB	33	/* Bit definitions of STATUS register */
	34	#define UART_RXEMPTY (1 << 5)
	35	#define UART_OVERFLOW_ERR (1 << 1)
	36	#define UART_TXEMPTY (1 << 7)
	37
01496c4f	38	static int arc_serial_setbrg(struct udevice *dev, int baudrate)
22a240c3	39	{
8a8d24bd	40	struct arc_serial_plat *plat = dev->plat;
01496c4f AB	41	struct arc_serial_regs *const regs = plat->reg;
01496c4f AB	42	int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;
22a240c3	43
94b5400e	44	writeb(arc_console_baud & 0xff, &regs->baudl);
94b5400e	45	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
22a240c3	46
22a240c3 AB	47	return 0;
	48	}
	49
01496c4f	50	static int arc_serial_putc(struct udevice *dev, const char c)
22a240c3	51	{
8a8d24bd	52	struct arc_serial_plat *plat = dev->plat;
01496c4f AB	53	struct arc_serial_regs *const regs = plat->reg;
01496c4f AB	54
94b5400e	55	while (!(readb(&regs->status) & UART_TXEMPTY))
22a240c3 AB	56	;
22a240c3 AB	57
94b5400e	58	writeb(c, &regs->data);
01496c4f AB	59
01496c4f AB	60	return 0;
22a240c3 AB	61	}
22a240c3 AB	62
01496c4f	63	static int arc_serial_tstc(struct arc_serial_regs *const regs)
22a240c3	64	{
94b5400e	65	return !(readb(&regs->status) & UART_RXEMPTY);
22a240c3 AB	66	}
22a240c3 AB	67
01496c4f AB	68	static int arc_serial_pending(struct udevice *dev, bool input)
01496c4f AB	69	{
8a8d24bd	70	struct arc_serial_plat *plat = dev->plat;
01496c4f AB	71	struct arc_serial_regs *const regs = plat->reg;
	72	uint32_t status = readb(&regs->status);
	73
	74	if (input)
	75	return status & UART_RXEMPTY ? 0 : 1;
	76	else
	77	return status & UART_TXEMPTY ? 0 : 1;
	78	}
	79
	80	static int arc_serial_getc(struct udevice *dev)
22a240c3	81	{
8a8d24bd	82	struct arc_serial_plat *plat = dev->plat;
01496c4f AB	83	struct arc_serial_regs *const regs = plat->reg;
	84
	85	while (!arc_serial_tstc(regs))
22a240c3 AB	86	;
	87
	88	/* Check for overflow errors */
94b5400e	89	if (readb(&regs->status) & UART_OVERFLOW_ERR)
22a240c3 AB	90	return 0;
22a240c3 AB	91
94b5400e	92	return readb(&regs->data) & 0xFF;
22a240c3 AB	93	}
22a240c3 AB	94
01496c4f	95	static int arc_serial_probe(struct udevice *dev)
22a240c3	96	{
01496c4f	97	return 0;
22a240c3 AB	98	}
22a240c3 AB	99
01496c4f AB	100	static const struct dm_serial_ops arc_serial_ops = {
	101	.putc = arc_serial_putc,
	102	.pending = arc_serial_pending,
	103	.getc = arc_serial_getc,
	104	.setbrg = arc_serial_setbrg,
	105	};
	106
	107	static const struct udevice_id arc_serial_ids[] = {
	108	{ .compatible = "snps,arc-uart" },
	109	{ }
	110	};
	111
d1998a9f	112	static int arc_serial_of_to_plat(struct udevice *dev)
22a240c3	113	{
8a8d24bd	114	struct arc_serial_plat *plat = dev_get_plat(dev);
01496c4f AB	115	DECLARE_GLOBAL_DATA_PTR;
01496c4f AB	116
8613c8d8	117	plat->reg = dev_read_addr_ptr(dev);
e160f7d4	118	plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
01496c4f AB	119	"clock-frequency", 0);
	120
	121	return 0;
22a240c3	122	}
01496c4f AB	123
	124	U_BOOT_DRIVER(serial_arc) = {
	125	.name = "serial_arc",
	126	.id = UCLASS_SERIAL,
	127	.of_match = arc_serial_ids,
d1998a9f	128	.of_to_plat = arc_serial_of_to_plat,
8a8d24bd	129	.plat_auto = sizeof(struct arc_serial_plat),
01496c4f AB	130	.probe = arc_serial_probe,
01496c4f AB	131	.ops = &arc_serial_ops,
01496c4f	132	};
54705016 AB	133
	134	#ifdef CONFIG_DEBUG_ARC_SERIAL
	135	#include <debug_uart.h>
	136
	137	static inline void _debug_uart_init(void)
	138	{
	139	struct arc_serial_regs regs = (struct arc_serial_regs )CONFIG_DEBUG_UART_BASE;
	140	int arc_console_baud = CONFIG_DEBUG_UART_CLOCK / (CONFIG_BAUDRATE * 4) - 1;
	141
	142	writeb(arc_console_baud & 0xff, &regs->baudl);
	143	writeb((arc_console_baud & 0xff00) >> 8, &regs->baudh);
	144	}
	145
	146	static inline void _debug_uart_putc(int c)
	147	{
	148	struct arc_serial_regs regs = (struct arc_serial_regs )CONFIG_DEBUG_UART_BASE;
	149
	150	while (!(readb(&regs->status) & UART_TXEMPTY))
	151	;
	152
	153	writeb(c, &regs->data);
	154	}
	155
	156	DEBUG_UART_FUNCS
	157
	158	#endif