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Commit | Line | Data |
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2be2c6cc | 1 | /* |
73225245 GI |
2 | * (C) Copyright 2008-2010 |
3 | * GraÅžvydas Ignotas <[email protected]> | |
2be2c6cc DB |
4 | * |
5 | * Configuration settings for the OMAP3 Pandora. | |
6 | * | |
3765b3e7 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
2be2c6cc DB |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
2be2c6cc | 12 | |
76375454 GI |
13 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
14 | #define CONFIG_NAND | |
2be2c6cc | 15 | |
76375454 GI |
16 | /* override base for compatibility with MLO the device ships with */ |
17 | #define CONFIG_SYS_TEXT_BASE 0x80008000 | |
cae377b5 | 18 | |
76375454 | 19 | #include <configs/ti_omap3_common.h> |
2be2c6cc | 20 | |
6a6b62e3 SP |
21 | /* |
22 | * Display CPU and Board information | |
23 | */ | |
24 | #define CONFIG_DISPLAY_CPUINFO 1 | |
25 | #define CONFIG_DISPLAY_BOARDINFO 1 | |
26 | ||
2be2c6cc | 27 | #define CONFIG_MISC_INIT_R |
2be2c6cc DB |
28 | #define CONFIG_REVISION_TAG 1 |
29 | ||
9c44ddcc | 30 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
76375454 GI |
31 | |
32 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
33 | #define CONFIG_SYS_DEVICE_NULLDEV 1 | |
2be2c6cc DB |
34 | |
35 | /* | |
36 | * Hardware drivers | |
37 | */ | |
38 | ||
76375454 GI |
39 | /* I2C Support */ |
40 | #define CONFIG_SYS_I2C_OMAP34XX | |
73225245 | 41 | |
76375454 GI |
42 | /* TWL4030 LED */ |
43 | #define CONFIG_TWL4030_LED | |
73225245 | 44 | |
76375454 GI |
45 | /* Initialize GPIOs by default */ |
46 | #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ | |
47 | #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ | |
73225245 | 48 | |
2be2c6cc DB |
49 | /* |
50 | * NS16550 Configuration | |
51 | */ | |
c7b9686d | 52 | #undef CONFIG_SYS_NS16550_CLK |
2be2c6cc DB |
53 | #define CONFIG_SYS_NS16550_SERIAL |
54 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
55 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
2be2c6cc DB |
56 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
57 | #define CONFIG_SERIAL3 3 | |
58 | ||
2be2c6cc | 59 | /* commands to include */ |
2be2c6cc | 60 | |
2be2c6cc DB |
61 | /* |
62 | * Board NAND Info. | |
63 | */ | |
2be2c6cc DB |
64 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
65 | /* to access nand */ | |
55f1b39f | 66 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
76375454 GI |
67 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW |
68 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
69 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
70 | ||
71 | #ifdef CONFIG_NAND | |
72 | #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ | |
73 | #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ | |
74 | ||
75 | #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ | |
76 | #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ | |
77 | ||
78 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ | |
79 | ||
80 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
81 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\ | |
73225245 GI |
82 | "1920k(uboot),128k(uboot-env),"\ |
83 | "10m(boot),-(rootfs)" | |
84 | #else | |
85 | #define MTDPARTS_DEFAULT | |
86 | #endif | |
2be2c6cc | 87 | |
2be2c6cc | 88 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
76375454 | 89 | DEFAULT_LINUX_BOOT_ENV \ |
73225245 | 90 | "usbtty=cdc_acm\0" \ |
73225245 | 91 | "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \ |
9baa37b1 | 92 | "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \ |
73225245 | 93 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
2be2c6cc DB |
94 | |
95 | #define CONFIG_BOOTCOMMAND \ | |
86c5c544 | 96 | "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \ |
73225245 GI |
97 | "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \ |
98 | "source ${loadaddr}; " \ | |
99 | "fi; " \ | |
949a7710 JH |
100 | "ubi part boot && ubifsmount ubi:boot && " \ |
101 | "ubifsload ${loadaddr} uImage && bootm ${loadaddr}" | |
2be2c6cc | 102 | |
2be2c6cc DB |
103 | /* memtest works on */ |
104 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
105 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
106 | 0x01F00000) /* 31MB */ | |
107 | ||
76375454 | 108 | #if defined(CONFIG_NAND) |
222a3113 | 109 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 110 | #endif |
2be2c6cc DB |
111 | |
112 | /* Monitor at start of flash */ | |
113 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
2be2c6cc DB |
114 | |
115 | #define CONFIG_ENV_IS_IN_NAND 1 | |
73225245 | 116 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
2be2c6cc | 117 | |
6cbec7b3 LC |
118 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
119 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET | |
2be2c6cc DB |
120 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
121 | ||
8e40852f A |
122 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
123 | ||
2be2c6cc | 124 | #endif /* __CONFIG_H */ |