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Commit | Line | Data |
---|---|---|
57c4c5d3 | 1 | CONFIG_ARM=y |
a2ac2b96 | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
abf8d963 | 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
57c4c5d3 | 4 | CONFIG_ARCH_ROCKCHIP=y |
98463903 | 5 | CONFIG_TEXT_BASE=0x00200000 |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
554e5514 | 7 | CONFIG_NR_DRAM_BANKS=1 |
052170c6 | 8 | CONFIG_ENV_OFFSET=0x3F8000 |
2bba7807 | 9 | CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" |
57c4c5d3 | 10 | CONFIG_ROCKCHIP_RK3328=y |
df33f864 | 11 | CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y |
df33f864 TR |
12 | CONFIG_TPL_LIBCOMMON_SUPPORT=y |
13 | CONFIG_TPL_LIBGENERIC_SUPPORT=y | |
9ca00684 | 14 | CONFIG_SPL_DRIVERS_MISC=y |
57c4c5d3 MK |
15 | CONFIG_SPL_STACK_R_ADDR=0x600000 |
16 | CONFIG_DEBUG_UART_BASE=0xFF130000 | |
17 | CONFIG_DEBUG_UART_CLOCK=24000000 | |
d46e86d2 | 18 | CONFIG_SYS_LOAD_ADDR=0x800800 |
57c4c5d3 | 19 | CONFIG_DEBUG_UART=y |
eaf6ea6a TR |
20 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
21 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 | |
df33f864 | 22 | CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 |
57c4c5d3 MK |
23 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
24 | CONFIG_FIT=y | |
25 | CONFIG_FIT_VERBOSE=y | |
26 | CONFIG_SPL_LOAD_FIT=y | |
57c4c5d3 MK |
27 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" |
28 | # CONFIG_DISPLAY_CPUINFO is not set | |
29 | CONFIG_DISPLAY_BOARDINFO_LATE=y | |
0817daa7 | 30 | CONFIG_MISC_INIT_R=y |
ca8a329a TR |
31 | CONFIG_SPL_MAX_SIZE=0x40000 |
32 | CONFIG_SPL_PAD_TO=0x7f8000 | |
6600b355 TR |
33 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
34 | CONFIG_SPL_BSS_START_ADDR=0x2000000 | |
9b5f9aeb | 35 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 |
8b221f5e | 36 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
f113d7d3 TR |
37 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
38 | CONFIG_SPL_STACK=0x400000 | |
57c4c5d3 | 39 | CONFIG_SPL_STACK_R=y |
975e7cf3 | 40 | CONFIG_SPL_I2C=y |
933b2f09 | 41 | CONFIG_SPL_POWER=y |
57c4c5d3 MK |
42 | CONFIG_SPL_ATF=y |
43 | CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y | |
41e47b42 | 44 | CONFIG_TPL_SYS_MALLOC_SIMPLE=y |
57c4c5d3 MK |
45 | CONFIG_CMD_BOOTZ=y |
46 | CONFIG_CMD_GPT=y | |
47 | CONFIG_CMD_MMC=y | |
57c4c5d3 MK |
48 | CONFIG_CMD_USB=y |
49 | # CONFIG_CMD_SETEXPR is not set | |
50 | CONFIG_CMD_TIME=y | |
57c4c5d3 | 51 | CONFIG_SPL_OF_CONTROL=y |
ff3dd0a4 | 52 | CONFIG_TPL_OF_CONTROL=y |
33863f74 | 53 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
ff3dd0a4 | 54 | CONFIG_TPL_OF_PLATDATA=y |
57c4c5d3 | 55 | CONFIG_ENV_IS_IN_MMC=y |
8d8ee47e | 56 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
7d080773 | 57 | CONFIG_SYS_MMC_ENV_DEV=1 |
57c4c5d3 | 58 | CONFIG_NET_RANDOM_ETHADDR=y |
df33f864 | 59 | CONFIG_TPL_DM=y |
57c4c5d3 MK |
60 | CONFIG_REGMAP=y |
61 | CONFIG_SPL_REGMAP=y | |
ff3dd0a4 | 62 | CONFIG_TPL_REGMAP=y |
57c4c5d3 MK |
63 | CONFIG_SYSCON=y |
64 | CONFIG_SPL_SYSCON=y | |
ff3dd0a4 | 65 | CONFIG_TPL_SYSCON=y |
57c4c5d3 MK |
66 | CONFIG_CLK=y |
67 | CONFIG_SPL_CLK=y | |
df33f864 | 68 | CONFIG_FASTBOOT_BUF_ADDR=0x800800 |
57c4c5d3 MK |
69 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
70 | CONFIG_ROCKCHIP_GPIO=y | |
71 | CONFIG_SYS_I2C_ROCKCHIP=y | |
72 | CONFIG_MMC_DW=y | |
73 | CONFIG_MMC_DW_ROCKCHIP=y | |
57c4c5d3 | 74 | CONFIG_SF_DEFAULT_SPEED=20000000 |
f7d0ae9c | 75 | CONFIG_SPI_FLASH_GIGADEVICE=y |
57c4c5d3 MK |
76 | CONFIG_ETH_DESIGNWARE=y |
77 | CONFIG_GMAC_ROCKCHIP=y | |
57c4c5d3 MK |
78 | CONFIG_PINCTRL=y |
79 | CONFIG_SPL_PINCTRL=y | |
57c4c5d3 MK |
80 | CONFIG_DM_PMIC=y |
81 | CONFIG_PMIC_RK8XX=y | |
7abf178b | 82 | CONFIG_SPL_PMIC_RK8XX=y |
33863f74 | 83 | CONFIG_SPL_DM_REGULATOR=y |
57c4c5d3 MK |
84 | CONFIG_REGULATOR_PWM=y |
85 | CONFIG_DM_REGULATOR_FIXED=y | |
32a8f800 | 86 | CONFIG_SPL_DM_REGULATOR_FIXED=y |
57c4c5d3 MK |
87 | CONFIG_REGULATOR_RK8XX=y |
88 | CONFIG_PWM_ROCKCHIP=y | |
89 | CONFIG_RAM=y | |
90 | CONFIG_SPL_RAM=y | |
ff3dd0a4 | 91 | CONFIG_TPL_RAM=y |
57c4c5d3 MK |
92 | CONFIG_DM_RESET=y |
93 | CONFIG_BAUDRATE=1500000 | |
94 | CONFIG_DEBUG_UART_SHIFT=2 | |
f7d0ae9c | 95 | CONFIG_ROCKCHIP_SPI=y |
74f11b55 TR |
96 | CONFIG_SYSINFO=y |
97 | CONFIG_SYSINFO_SMBIOS=y | |
57c4c5d3 | 98 | CONFIG_SYSRESET=y |
ca93e321 | 99 | # CONFIG_TPL_SYSRESET is not set |
57c4c5d3 MK |
100 | CONFIG_USB=y |
101 | CONFIG_USB_XHCI_HCD=y | |
102 | CONFIG_USB_XHCI_DWC3=y | |
103 | CONFIG_USB_EHCI_HCD=y | |
104 | CONFIG_USB_EHCI_GENERIC=y | |
105 | CONFIG_USB_OHCI_HCD=y | |
106 | CONFIG_USB_OHCI_GENERIC=y | |
107 | CONFIG_USB_DWC2=y | |
108 | CONFIG_USB_DWC3=y | |
3e6ab732 | 109 | # CONFIG_USB_DWC3_GADGET is not set |
57c4c5d3 | 110 | CONFIG_USB_GADGET=y |
57c4c5d3 | 111 | CONFIG_USB_GADGET_DWC2_OTG=y |
57c4c5d3 | 112 | CONFIG_SPL_TINY_MEMSET=y |
ff3dd0a4 | 113 | CONFIG_TPL_TINY_MEMSET=y |
57c4c5d3 | 114 | CONFIG_ERRNO_STR=y |