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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0 |
da5337a6 NH |
2 | /* |
3 | * SII Semiconductor Corporation S35392A RTC driver. | |
4 | * | |
5 | * Copyright (c) 2017, General Electric Company | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms and conditions of the GNU General Public License, | |
9 | * version 2, as published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
da5337a6 NH |
18 | */ |
19 | ||
20 | #include <command.h> | |
da5337a6 NH |
21 | #include <dm.h> |
22 | #include <i2c.h> | |
23 | #include <linux/bitrev.h> | |
24 | #include <rtc.h> | |
c05ed00a | 25 | #include <linux/delay.h> |
da5337a6 | 26 | |
e1d26a76 IR |
27 | #define S35390A_CHIP_ADDR 0x30 |
28 | ||
29 | #define S35390A_CMD_STATUS1 0x0 | |
30 | #define S35390A_CMD_STATUS2 0x1 | |
31 | #define S35390A_CMD_TIME1 0x2 | |
32 | #define S35390A_CMD_TIME2 0x3 | |
33 | #define S35390A_CMD_INT2_REG1 0x5 | |
da5337a6 NH |
34 | |
35 | #define S35390A_BYTE_YEAR 0 | |
36 | #define S35390A_BYTE_MONTH 1 | |
37 | #define S35390A_BYTE_DAY 2 | |
38 | #define S35390A_BYTE_WDAY 3 | |
39 | #define S35390A_BYTE_HOURS 4 | |
40 | #define S35390A_BYTE_MINS 5 | |
41 | #define S35390A_BYTE_SECS 6 | |
42 | ||
43 | /* flags for STATUS1 */ | |
44 | #define S35390A_FLAG_POC 0x01 | |
45 | #define S35390A_FLAG_BLD 0x02 | |
46 | #define S35390A_FLAG_INT2 0x04 | |
47 | #define S35390A_FLAG_24H 0x40 | |
48 | #define S35390A_FLAG_RESET 0x80 | |
49 | ||
50 | /* | |
51 | * If either BLD or POC is set, then the chip has lost power long enough for | |
52 | * the time value to become invalid. | |
53 | */ | |
54 | #define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD) | |
55 | ||
56 | /*---------------------------------------------------------------------*/ | |
57 | #undef DEBUG_RTC | |
58 | ||
59 | #ifdef DEBUG_RTC | |
60 | #define DEBUGR(fmt, args...) printf(fmt, ##args) | |
61 | #else | |
62 | #define DEBUGR(fmt, args...) | |
63 | #endif | |
64 | /*---------------------------------------------------------------------*/ | |
65 | ||
66 | #ifdef CONFIG_DM_RTC | |
67 | #define DEV_TYPE struct udevice | |
68 | #else | |
69 | /* Local udevice */ | |
70 | struct ludevice { | |
71 | u8 chip; | |
72 | }; | |
73 | ||
74 | #define DEV_TYPE struct ludevice | |
75 | struct ludevice dev; | |
76 | ||
77 | #endif | |
78 | ||
79 | #define msleep(a) udelay(a * 1000) | |
80 | ||
81 | int lowvoltage; | |
82 | ||
83 | static int s35392a_rtc_reset(DEV_TYPE *dev); | |
84 | ||
85 | static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len) | |
86 | { | |
87 | int ret; | |
88 | ||
89 | #ifdef CONFIG_DM_RTC | |
e1d26a76 | 90 | ret = dm_i2c_read(dev, reg, buf, len); |
da5337a6 NH |
91 | #else |
92 | (void)dev; | |
e1d26a76 | 93 | ret = i2c_read(S35390A_CHIP_ADDR | reg, 0, -1, buf, len); |
da5337a6 NH |
94 | #endif |
95 | ||
96 | return ret; | |
97 | } | |
98 | ||
99 | static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len) | |
100 | { | |
101 | int ret; | |
102 | ||
103 | #ifdef CONFIG_DM_RTC | |
e1d26a76 | 104 | ret = dm_i2c_write(dev, reg, buf, len); |
da5337a6 NH |
105 | #else |
106 | (void)dev; | |
e1d26a76 | 107 | ret = i2c_write(S35390A_CHIP_ADDR | reg, 0, 0, buf, len); |
da5337a6 NH |
108 | #endif |
109 | ||
110 | return ret; | |
111 | } | |
112 | ||
113 | static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg) | |
114 | { | |
115 | u8 val; | |
116 | int ret; | |
117 | ||
118 | ret = s35392a_rtc_read(dev, reg, &val, sizeof(val)); | |
119 | return ret < 0 ? ret : val; | |
120 | } | |
121 | ||
122 | static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val) | |
123 | { | |
124 | int ret; | |
125 | u8 lval = val; | |
126 | ||
127 | ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval)); | |
128 | return ret < 0 ? ret : 0; | |
129 | } | |
130 | ||
131 | static int validate_time(const struct rtc_time *tm) | |
132 | { | |
133 | if ((tm->tm_year < 2000) || (tm->tm_year > 2099)) | |
134 | return -EINVAL; | |
135 | ||
136 | if ((tm->tm_mon < 1) || (tm->tm_mon > 12)) | |
137 | return -EINVAL; | |
138 | ||
139 | if ((tm->tm_mday < 1) || (tm->tm_mday > 31)) | |
140 | return -EINVAL; | |
141 | ||
142 | if ((tm->tm_wday < 0) || (tm->tm_wday > 6)) | |
143 | return -EINVAL; | |
144 | ||
145 | if ((tm->tm_hour < 0) || (tm->tm_hour > 23)) | |
146 | return -EINVAL; | |
147 | ||
148 | if ((tm->tm_min < 0) || (tm->tm_min > 59)) | |
149 | return -EINVAL; | |
150 | ||
151 | if ((tm->tm_sec < 0) || (tm->tm_sec > 59)) | |
152 | return -EINVAL; | |
153 | ||
154 | return 0; | |
155 | } | |
156 | ||
157 | void s35392a_rtc_init(DEV_TYPE *dev) | |
158 | { | |
159 | int status; | |
160 | ||
161 | status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); | |
162 | if (status < 0) | |
163 | goto error; | |
164 | ||
165 | DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status); | |
166 | ||
167 | lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0; | |
168 | ||
169 | if (status & S35390A_FLAG_POC) | |
170 | /* | |
171 | * Do not communicate for 0.5 seconds since the power-on | |
172 | * detection circuit is in operation. | |
173 | */ | |
174 | msleep(500); | |
175 | ||
176 | else if (!lowvoltage) | |
177 | /* | |
178 | * If both POC and BLD are unset everything is fine. | |
179 | */ | |
180 | return; | |
181 | ||
182 | if (lowvoltage) | |
183 | printf("RTC low voltage detected\n"); | |
184 | ||
185 | if (!s35392a_rtc_reset(dev)) | |
186 | return; | |
187 | ||
188 | error: | |
189 | printf("Error RTC init.\n"); | |
190 | } | |
191 | ||
192 | /* Get the current time from the RTC */ | |
193 | static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm) | |
194 | { | |
195 | u8 date[7]; | |
196 | int ret, i; | |
197 | ||
198 | if (lowvoltage) { | |
199 | DEBUGR("RTC low voltage detected\n"); | |
200 | return -EINVAL; | |
201 | } | |
202 | ||
203 | ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date)); | |
204 | if (ret < 0) { | |
205 | DEBUGR("Error reading date from RTC\n"); | |
206 | return -EIO; | |
207 | } | |
208 | ||
209 | /* This chip returns the bits of each byte in reverse order */ | |
210 | for (i = 0; i < 7; ++i) | |
211 | date[i] = bitrev8(date[i]); | |
212 | ||
213 | tm->tm_sec = bcd2bin(date[S35390A_BYTE_SECS]); | |
214 | tm->tm_min = bcd2bin(date[S35390A_BYTE_MINS]); | |
215 | tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H); | |
216 | tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]); | |
217 | tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]); | |
218 | tm->tm_mon = bcd2bin(date[S35390A_BYTE_MONTH]); | |
219 | tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000; | |
220 | ||
221 | DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
222 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, | |
223 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
224 | ||
225 | return 0; | |
226 | } | |
227 | ||
228 | /* Set the RTC */ | |
229 | static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm) | |
230 | { | |
231 | int i, ret; | |
232 | int status; | |
233 | u8 date[7]; | |
234 | ||
235 | DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
236 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, | |
237 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
238 | ||
239 | ret = validate_time(tm); | |
240 | if (ret < 0) | |
241 | return -EINVAL; | |
242 | ||
243 | /* We support only 24h mode */ | |
244 | ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); | |
245 | if (ret < 0) | |
246 | return -EIO; | |
247 | status = ret; | |
248 | ||
249 | ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, | |
250 | status | S35390A_FLAG_24H); | |
251 | if (ret < 0) | |
252 | return -EIO; | |
253 | ||
254 | date[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 2000); | |
255 | date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon); | |
256 | date[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); | |
257 | date[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); | |
258 | date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour); | |
259 | date[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); | |
260 | date[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); | |
261 | ||
262 | /* This chip expects the bits of each byte to be in reverse order */ | |
263 | for (i = 0; i < 7; ++i) | |
264 | date[i] = bitrev8(date[i]); | |
265 | ||
266 | ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date)); | |
267 | if (ret < 0) { | |
268 | DEBUGR("Error writing date to RTC\n"); | |
269 | return -EIO; | |
270 | } | |
271 | ||
272 | /* Now we have time. Reset the low voltage status */ | |
273 | lowvoltage = 0; | |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
278 | /* Reset the RTC. */ | |
279 | static int s35392a_rtc_reset(DEV_TYPE *dev) | |
280 | { | |
281 | int buf; | |
282 | int ret; | |
283 | unsigned int initcount = 0; | |
284 | ||
285 | buf = S35390A_FLAG_RESET; | |
286 | ||
287 | initialize: | |
288 | ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf); | |
289 | if (ret < 0) | |
290 | return -EIO; | |
291 | ||
292 | ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); | |
293 | if (ret < 0) | |
294 | return -EIO; | |
295 | buf = ret; | |
296 | ||
297 | if (!lowvoltage) | |
298 | lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0; | |
299 | ||
300 | if (buf & S35390A_LOW_VOLTAGE) { | |
301 | /* Try up to five times to reset the chip */ | |
302 | if (initcount < 5) { | |
303 | ++initcount; | |
304 | goto initialize; | |
305 | } else { | |
306 | return -EIO; | |
307 | } | |
308 | } | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | #ifndef CONFIG_DM_RTC | |
314 | ||
315 | int rtc_get(struct rtc_time *tm) | |
316 | { | |
317 | return s35392a_rtc_get(&dev, tm); | |
318 | } | |
319 | ||
320 | int rtc_set(struct rtc_time *tm) | |
321 | { | |
322 | return s35392a_rtc_set(&dev, tm); | |
323 | } | |
324 | ||
325 | void rtc_reset(void) | |
326 | { | |
327 | s35392a_rtc_reset(&dev); | |
328 | } | |
329 | ||
330 | void rtc_init(void) | |
331 | { | |
332 | s35392a_rtc_init(&dev); | |
333 | } | |
334 | ||
335 | #else | |
336 | ||
337 | static int s35392a_probe(struct udevice *dev) | |
338 | { | |
e1d26a76 IR |
339 | #if defined(CONFIG_DM_RTC) |
340 | /* 3-bit "command", or register, is encoded within the device address. | |
341 | */ | |
342 | i2c_set_chip_offset_len(dev, 0); | |
343 | i2c_set_chip_addr_offset_mask(dev, 0x7); | |
344 | #endif | |
345 | ||
da5337a6 NH |
346 | s35392a_rtc_init(dev); |
347 | return 0; | |
348 | } | |
349 | ||
350 | static const struct rtc_ops s35392a_rtc_ops = { | |
351 | .get = s35392a_rtc_get, | |
352 | .set = s35392a_rtc_set, | |
353 | .read8 = s35392a_rtc_read8, | |
354 | .write8 = s35392a_rtc_write8, | |
355 | .reset = s35392a_rtc_reset, | |
356 | }; | |
357 | ||
358 | static const struct udevice_id s35392a_rtc_ids[] = { | |
359 | { .compatible = "sii,s35392a-rtc" }, | |
0ba12166 RB |
360 | { .compatible = "sii,s35392a" }, |
361 | { .compatible = "s35392a" }, | |
da5337a6 NH |
362 | { } |
363 | }; | |
364 | ||
365 | U_BOOT_DRIVER(s35392a_rtc) = { | |
366 | .name = "s35392a_rtc", | |
367 | .id = UCLASS_RTC, | |
368 | .probe = s35392a_probe, | |
369 | .of_match = s35392a_rtc_ids, | |
370 | .ops = &s35392a_rtc_ops, | |
371 | }; | |
372 | ||
373 | #endif |