[J-u-boot.git] / include / configs / xpress.h

/*
 * Copyright (C) 2015-2016 Stefan Roese <[email protected]>
 *
 * Configuration settings for the CCV xPress board
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __XPRESS_CONFIG_H
#define __XPRESS_CONFIG_H

#include "mx6_common.h"
#include <asm/imx-common/gpio.h>

/* SPL options */
#include "imx6_spl.h"

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(16 << 20)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
#define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */

/* I2C configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C4		/* enable I2C bus 4 */
#define CONFIG_SYS_I2C_SPEED		100000

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ			1000

#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			(128 << 20)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

/* Environment is in stored in the eMMC boot partition */
#define CONFIG_ENV_SIZE			(16 << 10)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET		(512 << 10)
#define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC2 */
#define CONFIG_SYS_MMC_ENV_PART		1	/* boot parition */
#define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* USDHC2 */

#define CONFIG_CMD_BMODE

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_ENET_DEV		0
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR          0x0
#define CONFIG_FEC_XCV_TYPE             RMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC

#define CONFIG_IMX_THERMAL

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#define CONFIG_UBOOT_SECTOR_START	0x2
#define CONFIG_UBOOT_SECTOR_COUNT	0x3fe

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=undefined\0" \
	"fdt_addr=0x83000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"uboot=ccv/u-boot.imx\0"					\
	"uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0"	\
	"uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0"		\
	"update_uboot=if tftp ${uboot}; then "				\
		"if itest ${filesize} > 0; then "			\
			"mmc dev 0 1;"					\
			"setexpr blkc ${filesize} / 0x200;"		\
			"setexpr blkc ${blkc} + 1;"			\
			"if itest ${blkc} <= ${uboot_size}; then "	\
				"mmc write ${loadaddr} ${uboot_start} "	\
					"${blkc};"			\
			"fi;"						\
		"fi; fi;"						\
		"setenv filesize; setenv blkc\0"			\
	"update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0"

#endif /* __XPRESS_CONFIG_H */
Commit	Line	Data
a7f480d9 SR	1	/*
	2	* Copyright (C) 2015-2016 Stefan Roese <[email protected]>
	3	*
	4	* Configuration settings for the CCV xPress board
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8	#ifndef __XPRESS_CONFIG_H
	9	#define __XPRESS_CONFIG_H
	10
	11	#include "mx6_common.h"
	12	#include <asm/imx-common/gpio.h>
	13
	14	/* SPL options */
a7f480d9 SR	15	#include "imx6_spl.h"
a7f480d9 SR	16
a7f480d9 SR	17	/* Size of malloc() pool */
	18	#define CONFIG_SYS_MALLOC_LEN (16 << 20)
	19
	20	#define CONFIG_BOARD_EARLY_INIT_F
	21	#define CONFIG_BOARD_LATE_INIT
	22
	23	#define CONFIG_MXC_UART
	24	#define CONFIG_MXC_UART_BASE UART1_BASE
	25
	26	/* MMC Configs */
	27	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
	28	#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
	29
	30	/* I2C configs */
a7f480d9 SR	31	#define CONFIG_SYS_I2C
	32	#define CONFIG_SYS_I2C_MXC
	33	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	34	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	35	#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
	36	#define CONFIG_SYS_I2C_SPEED 100000
	37
	38	/* Miscellaneous configurable options */
a7f480d9 SR	39	#define CONFIG_SYS_MEMTEST_START 0x80000000
	40	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
	41
	42	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	43	#define CONFIG_SYS_HZ 1000
	44
	45	#define CONFIG_SYS_CONSOLE_INFO_QUIET
	46	#define CONFIG_CMDLINE_EDITING
	47
	48	/* Physical Memory Map */
	49	#define CONFIG_NR_DRAM_BANKS 1
	50	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	51	#define PHYS_SDRAM_SIZE (128 << 20)
	52
	53	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	54	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	55	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	56
	57	#define CONFIG_SYS_INIT_SP_OFFSET \
	58	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	59	#define CONFIG_SYS_INIT_SP_ADDR \
	60	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	61
	62	/* FLASH and environment organization */
	63	#define CONFIG_SYS_NO_FLASH
	64
	65	/* Environment is in stored in the eMMC boot partition */
	66	#define CONFIG_ENV_SIZE (16 << 10)
	67	#define CONFIG_ENV_IS_IN_MMC
	68	#define CONFIG_ENV_OFFSET (512 << 10)
	69	#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
	70	#define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */
	71	#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */
	72
a7f480d9	73	#define CONFIG_CMD_BMODE
a7f480d9 SR	74
a7f480d9 SR	75	/* USB Configs */
a7f480d9 SR	76	#define CONFIG_USB_EHCI
a7f480d9 SR	77	#define CONFIG_USB_EHCI_MX6
a7f480d9 SR	78	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	79	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	80	#define CONFIG_MXC_USB_FLAGS 0
	81	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	82
	83	#define CONFIG_FEC_MXC
	84	#define CONFIG_MII
a7f480d9 SR	85	#define CONFIG_FEC_ENET_DEV 0
	86	#define IMX_FEC_BASE ENET_BASE_ADDR
	87	#define CONFIG_FEC_MXC_PHYADDR 0x0
	88	#define CONFIG_FEC_XCV_TYPE RMII
	89	#define CONFIG_ETHPRIME "FEC"
	90	#define CONFIG_PHYLIB
	91	#define CONFIG_PHY_SMSC
	92
	93	#define CONFIG_IMX_THERMAL
	94
	95	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	96
	97	#define CONFIG_UBOOT_SECTOR_START 0x2
	98	#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe
	99
	100	#define CONFIG_EXTRA_ENV_SETTINGS \
	101	"script=boot.scr\0" \
	102	"image=zImage\0" \
	103	"console=ttymxc0\0" \
	104	"fdt_high=0xffffffff\0" \
	105	"initrd_high=0xffffffff\0" \
	106	"fdt_file=undefined\0" \
	107	"fdt_addr=0x83000000\0" \
	108	"boot_fdt=try\0" \
	109	"ip_dyn=yes\0" \
	110	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	111	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	112	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	113	"mmcautodetect=yes\0" \
	114	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	115	"root=${mmcroot}\0" \
	116	"loadbootscript=" \
	117	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	118	"bootscript=echo Running bootscript from mmc ...; " \
	119	"source\0" \
	120	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	121	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	122	"mmcboot=echo Booting from mmc ...; " \
	123	"run mmcargs; " \
	124	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	125	"if run loadfdt; then " \
	126	"bootz ${loadaddr} - ${fdt_addr}; " \
	127	"else " \
	128	"if test ${boot_fdt} = try; then " \
	129	"bootz; " \
	130	"else " \
	131	"echo WARN: Cannot load the DT; " \
	132	"fi; " \
	133	"fi; " \
	134	"else " \
	135	"bootz; " \
	136	"fi;\0" \
	137	"uboot=ccv/u-boot.imx\0" \
	138	"uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \
	139	"uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \
	140	"update_uboot=if tftp ${uboot}; then " \
	141	"if itest ${filesize} > 0; then " \
	142	"mmc dev 0 1;" \
	143	"setexpr blkc ${filesize} / 0x200;" \
	144	"setexpr blkc ${blkc} + 1;" \
	145	"if itest ${blkc} <= ${uboot_size}; then " \
	146	"mmc write ${loadaddr} ${uboot_start} " \
	147	"${blkc};" \
	148	"fi;" \
149	"fi; fi;" \
150	"setenv filesize; setenv blkc\0" \
151	"update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0"
152
153	#endif /* __XPRESS_CONFIG_H */