projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7769776a AK |
1 | /* |
| 2 | * NXP ls1088a QDS board device tree source | |
| 3 | * | |
| 4 | * Copyright 2017 NXP | |
| 5 | * | |
| 6d48d1c4 | 6 | * SPDX-License-Identifier: GPL-2.0+ X11 |
| 7769776a AK |
7 | */ |
| 8 | ||
| 9 | /dts-v1/; | |
| 10 | ||
| 11 | #include "fsl-ls1088a.dtsi" | |
| 12 | ||
| 13 | / { | |
| 14 | model = "NXP Layerscape 1088a QDS Board"; | |
| 15 | compatible = "fsl,ls1088a-qds", "fsl,ls1088a"; | |
| 16 | aliases { | |
| 17 | spi0 = &qspi; | |
| 18 | spi1 = &dspi; | |
| 19 | }; | |
| 20 | }; | |
| 21 | ||
| c1c597e8 AK |
22 | &ifc { |
| 23 | #address-cells = <2>; | |
| 24 | #size-cells = <1>; | |
| 25 | /* NOR, NAND Flashes and FPGA on board */ | |
| 26 | ranges = <0 0 0x5 0x80000000 0x08000000 | |
| 27 | 2 0 0x5 0x30000000 0x00010000 | |
| 28 | 3 0 0x5 0x20000000 0x00010000>; | |
| 29 | status = "okay"; | |
| 30 | ||
| 31 | nor@0,0 { | |
| 32 | #address-cells = <1>; | |
| 33 | #size-cells = <1>; | |
| 34 | compatible = "cfi-flash"; | |
| 35 | reg = <0x0 0x0 0x8000000>; | |
| 36 | bank-width = <2>; | |
| 37 | device-width = <1>; | |
| 38 | }; | |
| 39 | ||
| 40 | nand@2,0 { | |
| 41 | compatible = "fsl,ifc-nand"; | |
| 42 | #address-cells = <1>; | |
| 43 | #size-cells = <1>; | |
| 44 | reg = <0x1 0x0 0x10000>; | |
| 45 | }; | |
| 46 | ||
| 47 | fpga: board-control@3,0 { | |
| 48 | #address-cells = <1>; | |
| 49 | #size-cells = <1>; | |
| 50 | compatible = "simple-bus", "fsl,ls1088aqds-fpga", | |
| 51 | "fsl,fpga-qixis"; | |
| 52 | reg = <0x2 0x0 0x0000100>; | |
| 53 | bank-width = <1>; | |
| 54 | device-width = <1>; | |
| 55 | ranges = <0 2 0 0x100>; | |
| 56 | }; | |
| 57 | }; | |
| 58 | ||
| 7769776a AK |
59 | &dspi { |
| 60 | bus-num = <0>; | |
| 61 | status = "okay"; | |
| 62 | ||
| 63 | dflash0: n25q128a { | |
| 64 | #address-cells = <1>; | |
| 65 | #size-cells = <1>; | |
| 66 | compatible = "spi-flash"; | |
| 67 | reg = <0>; | |
| 68 | spi-max-frequency = <1000000>; /* input clock */ | |
| 69 | }; | |
| 70 | ||
| 71 | dflash1: sst25wf040b { | |
| 72 | #address-cells = <1>; | |
| 73 | #size-cells = <1>; | |
| 74 | compatible = "spi-flash"; | |
| 75 | spi-max-frequency = <3500000>; | |
| 76 | reg = <1>; | |
| 77 | }; | |
| 78 | ||
| 79 | dflash2: en25s64 { | |
| 80 | #address-cells = <1>; | |
| 81 | #size-cells = <1>; | |
| 82 | compatible = "spi-flash"; | |
| 83 | spi-max-frequency = <3500000>; | |
| 84 | reg = <2>; | |
| 85 | }; | |
| 86 | }; | |
| 87 | ||
| 88 | &qspi { | |
| 89 | bus-num = <0>; | |
| 90 | status = "okay"; | |
| 91 | ||
| 92 | qflash0: s25fs512s@0 { | |
| 93 | #address-cells = <1>; | |
| 94 | #size-cells = <1>; | |
| 95 | compatible = "spi-flash"; | |
| 96 | spi-max-frequency = <50000000>; | |
| 97 | reg = <0>; | |
| 98 | }; | |
| 99 | ||
| 100 | qflash1: s25fs512s@1 { | |
| 101 | #address-cells = <1>; | |
| 102 | #size-cells = <1>; | |
| 103 | compatible = "spi-flash"; | |
| 104 | spi-max-frequency = <50000000>; | |
| 105 | reg = <1>; | |
| 106 | }; | |
| 107 | }; |