[J-u-boot.git] / include / spartan2.h

/*
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, [email protected].
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SPARTAN2_H_
#define _SPARTAN2_H_

#include <xilinx.h>

/* Slave Parallel Implementation function table */
typedef struct {
	xilinx_pre_fn	pre;
	xilinx_pgm_fn	pgm;
	xilinx_init_fn	init;
	xilinx_err_fn	err;
	xilinx_done_fn	done;
	xilinx_clk_fn	clk;
	xilinx_cs_fn	cs;
	xilinx_wr_fn	wr;
	xilinx_rdata_fn	rdata;
	xilinx_wdata_fn	wdata;
	xilinx_busy_fn	busy;
	xilinx_abort_fn	abort;
	xilinx_post_fn	post;
} xilinx_spartan2_slave_parallel_fns;

/* Slave Serial Implementation function table */
typedef struct {
	xilinx_pre_fn	pre;
	xilinx_pgm_fn	pgm;
	xilinx_clk_fn	clk;
	xilinx_init_fn	init;
	xilinx_done_fn	done;
	xilinx_wr_fn	wr;
	xilinx_post_fn	post;
} xilinx_spartan2_slave_serial_fns;

extern struct xilinx_fpga_op spartan2_op;

/* Device Image Sizes
 *********************************************************************/
/* Spartan-II (2.5V) */
#define XILINX_XC2S15_SIZE	197728/8
#define XILINX_XC2S30_SIZE	336800/8
#define XILINX_XC2S50_SIZE	559232/8
#define XILINX_XC2S100_SIZE	781248/8
#define XILINX_XC2S150_SIZE	1040128/8
#define XILINX_XC2S200_SIZE	1335872/8

/* Spartan-IIE (1.8V) */
#define XILINX_XC2S50E_SIZE     630048/8
#define XILINX_XC2S100E_SIZE    863840/8
#define XILINX_XC2S150E_SIZE    1134496/8
#define XILINX_XC2S200E_SIZE    1442016/8
#define XILINX_XC2S300E_SIZE    1875648/8

/* Descriptor Macros
 *********************************************************************/
/* Spartan-II devices */
#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op }

#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op }

#endif /* _SPARTAN2_H_ */
Commit	Line	Data
c609719b WD	1	/*
	2	* (C) Copyright 2002
	3	* Rich Ireland, Enterasys Networks, [email protected].
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
c609719b WD	6	*/
	7
	8	#ifndef _SPARTAN2_H_
	9	#define _SPARTAN2_H_
	10
	11	#include <xilinx.h>
	12
c609719b WD	13	/* Slave Parallel Implementation function table */
c609719b WD	14	typedef struct {
2df9d5c4 MS	15	xilinx_pre_fn pre;
	16	xilinx_pgm_fn pgm;
	17	xilinx_init_fn init;
	18	xilinx_err_fn err;
	19	xilinx_done_fn done;
	20	xilinx_clk_fn clk;
	21	xilinx_cs_fn cs;
	22	xilinx_wr_fn wr;
	23	xilinx_rdata_fn rdata;
	24	xilinx_wdata_fn wdata;
	25	xilinx_busy_fn busy;
	26	xilinx_abort_fn abort;
	27	xilinx_post_fn post;
b625b9ae	28	} xilinx_spartan2_slave_parallel_fns;
c609719b WD	29
	30	/* Slave Serial Implementation function table */
	31	typedef struct {
2df9d5c4 MS	32	xilinx_pre_fn pre;
	33	xilinx_pgm_fn pgm;
	34	xilinx_clk_fn clk;
	35	xilinx_init_fn init;
	36	xilinx_done_fn done;
	37	xilinx_wr_fn wr;
	38	xilinx_post_fn post;
b625b9ae	39	} xilinx_spartan2_slave_serial_fns;
c609719b	40
14cfc4f3 MS	41	extern struct xilinx_fpga_op spartan2_op;
14cfc4f3 MS	42
c609719b WD	43	/* Device Image Sizes
	44	*********************************************************************/
	45	/* Spartan-II (2.5V) */
53677ef1 WD	46	#define XILINX_XC2S15_SIZE 197728/8
	47	#define XILINX_XC2S30_SIZE 336800/8
	48	#define XILINX_XC2S50_SIZE 559232/8
	49	#define XILINX_XC2S100_SIZE 781248/8
	50	#define XILINX_XC2S150_SIZE 1040128/8
	51	#define XILINX_XC2S200_SIZE 1335872/8
c609719b	52
9dd611b8 WD	53	/* Spartan-IIE (1.8V) */
	54	#define XILINX_XC2S50E_SIZE 630048/8
	55	#define XILINX_XC2S100E_SIZE 863840/8
	56	#define XILINX_XC2S150E_SIZE 1134496/8
	57	#define XILINX_XC2S200E_SIZE 1442016/8
	58	#define XILINX_XC2S300E_SIZE 1875648/8
	59
c609719b WD	60	/* Descriptor Macros
	61	*********************************************************************/
	62	/* Spartan-II devices */
	63	#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
14cfc4f3	64	{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op }
c609719b WD	65
c609719b WD	66	#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
14cfc4f3	67	{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op }
c609719b WD	68
c609719b WD	69	#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
14cfc4f3	70	{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op }
c609719b WD	71
c609719b WD	72	#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
14cfc4f3	73	{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op }
c609719b WD	74
c609719b WD	75	#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
14cfc4f3	76	{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op }
c609719b	77
3bff4ffa	78	#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
14cfc4f3	79	{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op }
3bff4ffa	80
9dd611b8	81	#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
14cfc4f3	82	{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op }
9dd611b8 WD	83
9dd611b8 WD	84	#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
14cfc4f3	85	{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op }
9dd611b8 WD	86
9dd611b8 WD	87	#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
14cfc4f3	88	{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op }
9dd611b8 WD	89
9dd611b8 WD	90	#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
14cfc4f3	91	{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op }
9dd611b8 WD	92
9dd611b8 WD	93	#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
14cfc4f3	94	{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op }
9dd611b8	95
c609719b	96	#endif /* _SPARTAN2_H_ */