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common: cmd_bdinfo: Fix compilation warning for microblaze
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CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, [email protected].
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
d88af4da 29#include <linux/compiler.h>
8bde7f77 30
d87080b7 31DECLARE_GLOBAL_DATA_PTR;
8bde7f77 32
d88af4da
MF
33__maybe_unused
34static void print_num(const char *name, ulong value)
35{
36 printf("%-12s= 0x%08lX\n", name, value);
37}
8bde7f77 38
5f3dfadc 39__maybe_unused
d88af4da
MF
40static void print_eth(int idx)
41{
42 char name[10], *val;
43 if (idx)
44 sprintf(name, "eth%iaddr", idx);
45 else
46 strcpy(name, "ethaddr");
47 val = getenv(name);
48 if (!val)
49 val = "(not set)";
50 printf("%-12s= %s\n", name, val);
51}
de2dff6f 52
9fc6a06a
MS
53__maybe_unused
54static void print_eths(void)
55{
56 struct eth_device *dev;
57 int i = 0;
58
59 do {
60 dev = eth_get_dev_by_index(i);
61 if (dev) {
62 printf("eth%dname = %s\n", i, dev->name);
63 print_eth(i);
64 i++;
65 }
66 } while (dev);
67
68 printf("current eth = %s\n", eth_get_name());
69 printf("ip_addr = %s\n", getenv("ipaddr"));
70}
71
d88af4da 72__maybe_unused
47708457 73static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
74{
75 printf("%-12s= 0x%.8llX\n", name, value);
76}
77
78__maybe_unused
79static void print_mhz(const char *name, unsigned long hz)
80{
81 char buf[32];
82
83 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
84}
8bde7f77 85
c99ea790 86#if defined(CONFIG_PPC)
8bde7f77 87
5902e8f7 88int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 89{
8bde7f77 90 bd_t *bd = gd->bd;
8bde7f77
WD
91
92#ifdef DEBUG
5902e8f7
ML
93 print_num("bd address", (ulong)bd);
94#endif
95 print_num("memstart", bd->bi_memstart);
96 print_lnum("memsize", bd->bi_memsize);
97 print_num("flashstart", bd->bi_flashstart);
98 print_num("flashsize", bd->bi_flashsize);
99 print_num("flashoffset", bd->bi_flashoffset);
100 print_num("sramstart", bd->bi_sramstart);
101 print_num("sramsize", bd->bi_sramsize);
102#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
103 defined(CONFIG_8260) || defined(CONFIG_E500)
104 print_num("immr_base", bd->bi_immr_base);
105#endif
106 print_num("bootflags", bd->bi_bootflags);
107#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
108 defined(CONFIG_405GP) || \
109 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
110 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
111 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
112 defined(CONFIG_XILINX_405)
0c277ef9
TT
113 print_mhz("procfreq", bd->bi_procfreq);
114 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
115#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
116 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
117 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
118 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 119 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 120#endif
9fea65a6 121#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 122#if defined(CONFIG_CPM2)
0c277ef9
TT
123 print_mhz("vco", bd->bi_vco);
124 print_mhz("sccfreq", bd->bi_sccfreq);
125 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 126#endif
0c277ef9 127 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 128#if defined(CONFIG_CPM2)
0c277ef9 129 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 130#endif
0c277ef9 131 print_mhz("busfreq", bd->bi_busfreq);
9fea65a6 132#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
983fda83 133#if defined(CONFIG_MPC8220)
0c277ef9
TT
134 print_mhz("inpfreq", bd->bi_inpfreq);
135 print_mhz("flbfreq", bd->bi_flbfreq);
136 print_mhz("pcifreq", bd->bi_pcifreq);
137 print_mhz("vcofreq", bd->bi_vcofreq);
138 print_mhz("pevfreq", bd->bi_pevfreq);
983fda83 139#endif
03f5c550 140
34e210f5
TT
141#ifdef CONFIG_ENABLE_36BIT_PHYS
142#ifdef CONFIG_PHYS_64BIT
143 puts("addressing = 36-bit\n");
144#else
145 puts("addressing = 32-bit\n");
146#endif
147#endif
148
de2dff6f 149 print_eth(0);
e2ffd59b 150#if defined(CONFIG_HAS_ETH1)
de2dff6f 151 print_eth(1);
03f5c550 152#endif
e2ffd59b 153#if defined(CONFIG_HAS_ETH2)
de2dff6f 154 print_eth(2);
42d1f039 155#endif
e2ffd59b 156#if defined(CONFIG_HAS_ETH3)
de2dff6f 157 print_eth(3);
03f5c550 158#endif
c68a05fe 159#if defined(CONFIG_HAS_ETH4)
de2dff6f 160 print_eth(4);
c68a05fe 161#endif
c68a05fe 162#if defined(CONFIG_HAS_ETH5)
de2dff6f 163 print_eth(5);
c68a05fe 164#endif
165
8bde7f77 166#ifdef CONFIG_HERMES
0c277ef9 167 print_mhz("ethspeed", bd->bi_ethspeed);
8bde7f77 168#endif
50a47d05 169 printf("IP addr = %s\n", getenv("ipaddr"));
a7e5ee9e 170 printf("baudrate = %6u bps\n", bd->bi_baudrate);
5902e8f7 171 print_num("relocaddr", gd->relocaddr);
8bde7f77
WD
172 return 0;
173}
174
c99ea790 175#elif defined(CONFIG_NIOS2)
5c952cf0 176
5902e8f7 177int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 178{
5c952cf0
WD
179 bd_t *bd = gd->bd;
180
5902e8f7
ML
181 print_num("mem start", (ulong)bd->bi_memstart);
182 print_lnum("mem size", (u64)bd->bi_memsize);
183 print_num("flash start", (ulong)bd->bi_flashstart);
184 print_num("flash size", (ulong)bd->bi_flashsize);
185 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 186
6d0f6bcf 187#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
188 print_num ("sram start", (ulong)bd->bi_sramstart);
189 print_num ("sram size", (ulong)bd->bi_sramsize);
190#endif
191
90253178 192#if defined(CONFIG_CMD_NET)
de2dff6f 193 print_eth(0);
50a47d05 194 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
195#endif
196
7fffe2fa 197 printf("baudrate = %u bps\n", bd->bi_baudrate);
5c952cf0
WD
198
199 return 0;
200}
c99ea790
RM
201
202#elif defined(CONFIG_MICROBLAZE)
cfc67116 203
5902e8f7 204int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 205{
cfc67116 206 bd_t *bd = gd->bd;
5902e8f7
ML
207 print_num("mem start ", (ulong)bd->bi_memstart);
208 print_lnum("mem size ", (u64)bd->bi_memsize);
209 print_num("flash start ", (ulong)bd->bi_flashstart);
210 print_num("flash size ", (ulong)bd->bi_flashsize);
211 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 212#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
213 print_num("sram start ", (ulong)bd->bi_sramstart);
214 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 215#endif
90253178 216#if defined(CONFIG_CMD_NET)
9fc6a06a 217 print_eths();
cfc67116 218#endif
82b6a476 219 printf("baudrate = %u bps\n", bd->bi_baudrate);
cfc67116
MS
220 return 0;
221}
4a551709 222
c99ea790
RM
223#elif defined(CONFIG_SPARC)
224
54841ab5 225int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
226{
227 bd_t *bd = gd->bd;
00ab32c8
DH
228
229#ifdef DEBUG
230 print_num("bd address ", (ulong) bd);
231#endif
232 print_num("memstart ", bd->bi_memstart);
b57ca3e1 233 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 234 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 235 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 236 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 237 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 238 CONFIG_SYS_MONITOR_LEN);
d97f01a6 239 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 240 CONFIG_SYS_MALLOC_LEN);
d97f01a6 241 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 242 CONFIG_SYS_STACK_SIZE);
d97f01a6 243 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 244 CONFIG_SYS_PROM_SIZE);
d97f01a6 245 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 246 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
247
248#if defined(CONFIG_CMD_NET)
de2dff6f 249 print_eth(0);
50a47d05 250 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 251#endif
a8f1f1cd 252 printf("baudrate = %6u bps\n", bd->bi_baudrate);
00ab32c8
DH
253 return 0;
254}
255
c99ea790
RM
256#elif defined(CONFIG_M68K)
257
5902e8f7 258int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 259{
8e585f02 260 bd_t *bd = gd->bd;
8ae158cd 261
5902e8f7
ML
262 print_num("memstart", (ulong)bd->bi_memstart);
263 print_lnum("memsize", (u64)bd->bi_memsize);
264 print_num("flashstart", (ulong)bd->bi_flashstart);
265 print_num("flashsize", (ulong)bd->bi_flashsize);
266 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 267#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
268 print_num("sramstart", (ulong)bd->bi_sramstart);
269 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 270#endif
6d0f6bcf 271#if defined(CONFIG_SYS_MBAR)
5902e8f7 272 print_num("mbar", bd->bi_mbar_base);
8e585f02 273#endif
0c277ef9
TT
274 print_mhz("cpufreq", bd->bi_intfreq);
275 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 276#ifdef CONFIG_PCI
0c277ef9 277 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
278#endif
279#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
280 print_mhz("flbfreq", bd->bi_flbfreq);
281 print_mhz("inpfreq", bd->bi_inpfreq);
282 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 283#endif
26667b7f 284#if defined(CONFIG_CMD_NET)
de2dff6f 285 print_eth(0);
8e585f02 286#if defined(CONFIG_HAS_ETH1)
de2dff6f 287 print_eth(1);
8e585f02 288#endif
8e585f02 289#if defined(CONFIG_HAS_ETH2)
de2dff6f 290 print_eth(2);
8e585f02 291#endif
8e585f02 292#if defined(CONFIG_HAS_ETH3)
de2dff6f 293 print_eth(3);
8e585f02
TL
294#endif
295
50a47d05 296 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 297#endif
f5a5b3c5 298 printf("baudrate = %u bps\n", bd->bi_baudrate);
8e585f02
TL
299
300 return 0;
301}
302
8dc48d71 303#elif defined(CONFIG_BLACKFIN)
c99ea790 304
54841ab5 305int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 306{
8dc48d71
MF
307 bd_t *bd = gd->bd;
308
309 printf("U-Boot = %s\n", bd->bi_r_version);
310 printf("CPU = %s\n", bd->bi_cpu);
311 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
312 print_mhz("VCO", bd->bi_vco);
313 print_mhz("CCLK", bd->bi_cclk);
314 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 315
5902e8f7
ML
316 print_num("boot_params", (ulong)bd->bi_boot_params);
317 print_num("memstart", (ulong)bd->bi_memstart);
318 print_lnum("memsize", (u64)bd->bi_memsize);
319 print_num("flashstart", (ulong)bd->bi_flashstart);
320 print_num("flashsize", (ulong)bd->bi_flashsize);
321 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 322
de2dff6f 323 print_eth(0);
50a47d05 324 printf("ip_addr = %s\n", getenv("ipaddr"));
5e84e5a7 325 printf("baudrate = %u bps\n", bd->bi_baudrate);
8dc48d71
MF
326
327 return 0;
328}
329
c99ea790 330#elif defined(CONFIG_MIPS)
8bde7f77 331
5902e8f7 332int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 333{
8bde7f77
WD
334 bd_t *bd = gd->bd;
335
5902e8f7
ML
336 print_num("boot_params", (ulong)bd->bi_boot_params);
337 print_num("memstart", (ulong)bd->bi_memstart);
338 print_lnum("memsize", (u64)bd->bi_memsize);
339 print_num("flashstart", (ulong)bd->bi_flashstart);
340 print_num("flashsize", (ulong)bd->bi_flashsize);
341 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 342
de2dff6f 343 print_eth(0);
50a47d05 344 printf("ip_addr = %s\n", getenv("ipaddr"));
8dc22b00 345 printf("baudrate = %u bps\n", bd->bi_baudrate);
8bde7f77
WD
346
347 return 0;
348}
8bde7f77 349
c99ea790
RM
350#elif defined(CONFIG_AVR32)
351
5902e8f7 352int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
353{
354 bd_t *bd = gd->bd;
355
5902e8f7
ML
356 print_num("boot_params", (ulong)bd->bi_boot_params);
357 print_num("memstart", (ulong)bd->bi_memstart);
358 print_lnum("memsize", (u64)bd->bi_memsize);
359 print_num("flashstart", (ulong)bd->bi_flashstart);
360 print_num("flashsize", (ulong)bd->bi_flashsize);
361 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
362
363 print_eth(0);
50a47d05 364 printf("ip_addr = %s\n", getenv("ipaddr"));
15dc95d4 365 printf("baudrate = %u bps\n", bd->bi_baudrate);
c99ea790
RM
366
367 return 0;
368}
369
370#elif defined(CONFIG_ARM)
8bde7f77 371
5902e8f7 372int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 373{
8bde7f77
WD
374 int i;
375 bd_t *bd = gd->bd;
376
5902e8f7
ML
377 print_num("arch_number", bd->bi_arch_number);
378 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 379
5902e8f7 380 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
381 print_num("DRAM bank", i);
382 print_num("-> start", bd->bi_dram[i].start);
383 print_num("-> size", bd->bi_dram[i].size);
384 }
385
a41dbbd9 386#if defined(CONFIG_CMD_NET)
9fc6a06a 387 print_eths();
a41dbbd9 388#endif
e46e31a8 389 printf("baudrate = %u bps\n", bd->bi_baudrate);
e47f2db5 390#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
5902e8f7 391 print_num("TLB addr", gd->tlb_addr);
f1d2b313 392#endif
5902e8f7
ML
393 print_num("relocaddr", gd->relocaddr);
394 print_num("reloc off", gd->reloc_off);
395 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
396 print_num("sp start ", gd->start_addr_sp);
397 print_num("FB base ", gd->fb_base);
8f5d4687
HM
398 /*
399 * TODO: Currently only support for davinci SOC's is added.
400 * Remove this check once all the board implement this.
401 */
402#ifdef CONFIG_CLOCKS
403 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
404 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
405 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
406#endif
8bde7f77
WD
407 return 0;
408}
409
ebd0d062
NI
410#elif defined(CONFIG_SH)
411
5902e8f7 412int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
413{
414 bd_t *bd = gd->bd;
5902e8f7
ML
415 print_num("mem start ", (ulong)bd->bi_memstart);
416 print_lnum("mem size ", (u64)bd->bi_memsize);
417 print_num("flash start ", (ulong)bd->bi_flashstart);
418 print_num("flash size ", (ulong)bd->bi_flashsize);
419 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
420
421#if defined(CONFIG_CMD_NET)
422 print_eth(0);
50a47d05 423 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 424#endif
ecd4551f 425 printf("baudrate = %u bps\n", bd->bi_baudrate);
ebd0d062
NI
426 return 0;
427}
428
a806ee6f
GR
429#elif defined(CONFIG_X86)
430
5902e8f7 431int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
432{
433 int i;
434 bd_t *bd = gd->bd;
a806ee6f 435
5902e8f7
ML
436 print_num("boot_params", (ulong)bd->bi_boot_params);
437 print_num("bi_memstart", bd->bi_memstart);
438 print_num("bi_memsize", bd->bi_memsize);
439 print_num("bi_flashstart", bd->bi_flashstart);
440 print_num("bi_flashsize", bd->bi_flashsize);
441 print_num("bi_flashoffset", bd->bi_flashoffset);
442 print_num("bi_sramstart", bd->bi_sramstart);
443 print_num("bi_sramsize", bd->bi_sramsize);
444 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
445 print_mhz("cpufreq", bd->bi_intfreq);
446 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
447
448 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
449 print_num("DRAM bank", i);
450 print_num("-> start", bd->bi_dram[i].start);
451 print_num("-> size", bd->bi_dram[i].size);
452 }
453
454#if defined(CONFIG_CMD_NET)
455 print_eth(0);
50a47d05 456 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 457 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 458#endif
55f97c1b 459 printf("baudrate = %u bps\n", bd->bi_baudrate);
a806ee6f
GR
460
461 return 0;
462}
463
6fcc3be4
SG
464#elif defined(CONFIG_SANDBOX)
465
466int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
467{
468 int i;
469 bd_t *bd = gd->bd;
470
471 print_num("boot_params", (ulong)bd->bi_boot_params);
472
473 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
474 print_num("DRAM bank", i);
475 print_num("-> start", bd->bi_dram[i].start);
476 print_num("-> size", bd->bi_dram[i].size);
477 }
478
479#if defined(CONFIG_CMD_NET)
480 print_eth(0);
50a47d05 481 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4
SG
482#endif
483 print_num("FB base ", gd->fb_base);
484 return 0;
485}
486
64d61461
ML
487#elif defined(CONFIG_NDS32)
488
489int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
490{
491 int i;
492 bd_t *bd = gd->bd;
493
494 print_num("arch_number", bd->bi_arch_number);
495 print_num("boot_params", (ulong)bd->bi_boot_params);
496
497 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
498 print_num("DRAM bank", i);
499 print_num("-> start", bd->bi_dram[i].start);
500 print_num("-> size", bd->bi_dram[i].size);
501 }
502
503#if defined(CONFIG_CMD_NET)
504 print_eth(0);
50a47d05 505 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 506#endif
a25356d7 507 printf("baudrate = %u bps\n", bd->bi_baudrate);
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508
509 return 0;
510}
511
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512#elif defined(CONFIG_OPENRISC)
513
514int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
515{
516 bd_t *bd = gd->bd;
517
518 print_num("mem start", (ulong)bd->bi_memstart);
519 print_lnum("mem size", (u64)bd->bi_memsize);
520 print_num("flash start", (ulong)bd->bi_flashstart);
521 print_num("flash size", (ulong)bd->bi_flashsize);
522 print_num("flash offset", (ulong)bd->bi_flashoffset);
523
524#if defined(CONFIG_CMD_NET)
525 print_eth(0);
50a47d05 526 printf("ip_addr = %s\n", getenv("ipaddr"));
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527#endif
528
7a68e330 529 printf("baudrate = %u bps\n", bd->bi_baudrate);
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530
531 return 0;
532}
533
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534#else
535 #error "a case for this architecture does not exist!"
536#endif
8bde7f77 537
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538/* -------------------------------------------------------------------- */
539
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540U_BOOT_CMD(
541 bdinfo, 1, 1, do_bdinfo,
2fb2604d 542 "print Board Info structure",
a89c33db 543 ""
8bde7f77 544);
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