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Commit | Line | Data |
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281e00a3 WD |
1 | /* |
2 | * (c) 2004 Sascha Hauer <[email protected]> | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
281e00a3 WD |
5 | */ |
6 | ||
7 | #include <common.h> | |
281e00a3 | 8 | #include <asm/arch/imx-regs.h> |
7882e7c1 MV |
9 | #include <serial.h> |
10 | #include <linux/compiler.h> | |
281e00a3 | 11 | |
281e00a3 WD |
12 | #if defined CONFIG_IMX_SERIAL1 |
13 | #define UART_BASE IMX_UART1_BASE | |
14 | #elif defined CONFIG_IMX_SERIAL2 | |
15 | #define UART_BASE IMX_UART2_BASE | |
16 | #else | |
17 | #error "define CONFIG_IMX_SERIAL1, CONFIG_IMX_SERIAL2 or CONFIG_IMX_SERIAL_NONE" | |
18 | #endif | |
19 | ||
20 | struct imx_serial { | |
21 | volatile uint32_t urxd[16]; | |
22 | volatile uint32_t utxd[16]; | |
23 | volatile uint32_t ucr1; | |
24 | volatile uint32_t ucr2; | |
25 | volatile uint32_t ucr3; | |
26 | volatile uint32_t ucr4; | |
27 | volatile uint32_t ufcr; | |
28 | volatile uint32_t usr1; | |
29 | volatile uint32_t usr2; | |
30 | volatile uint32_t uesc; | |
31 | volatile uint32_t utim; | |
32 | volatile uint32_t ubir; | |
33 | volatile uint32_t ubmr; | |
34 | volatile uint32_t ubrc; | |
35 | volatile uint32_t bipr[4]; | |
36 | volatile uint32_t bmpr[4]; | |
37 | volatile uint32_t uts; | |
38 | }; | |
39 | ||
48fed405 AD |
40 | DECLARE_GLOBAL_DATA_PTR; |
41 | ||
7882e7c1 | 42 | static void imx_serial_setbrg(void) |
281e00a3 WD |
43 | { |
44 | serial_init(); | |
45 | } | |
46 | ||
47 | extern void imx_gpio_mode(int gpio_mode); | |
48 | ||
49 | /* | |
50 | * Initialise the serial port with the given baudrate. The settings | |
51 | * are always 8 data bits, no parity, 1 stop bit, no start bits. | |
52 | * | |
53 | */ | |
7882e7c1 | 54 | static int imx_serial_init(void) |
281e00a3 WD |
55 | { |
56 | volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; | |
48fed405 AD |
57 | unsigned int ufcr_rfdiv; |
58 | unsigned int refclk; | |
59 | ||
281e00a3 WD |
60 | #ifdef CONFIG_IMX_SERIAL1 |
61 | imx_gpio_mode(PC11_PF_UART1_TXD); | |
62 | imx_gpio_mode(PC12_PF_UART1_RXD); | |
63 | #else | |
64 | imx_gpio_mode(PB30_PF_UART2_TXD); | |
65 | imx_gpio_mode(PB31_PF_UART2_RXD); | |
66 | #endif | |
67 | ||
68 | /* Disable UART */ | |
69 | base->ucr1 &= ~UCR1_UARTEN; | |
70 | ||
71 | /* Set to default POR state */ | |
72 | ||
73 | base->ucr1 = 0x00000004; | |
74 | base->ucr2 = 0x00000000; | |
75 | base->ucr3 = 0x00000000; | |
76 | base->ucr4 = 0x00008040; | |
77 | base->uesc = 0x0000002B; | |
78 | base->utim = 0x00000000; | |
79 | base->ubir = 0x00000000; | |
80 | base->ubmr = 0x00000000; | |
81 | base->uts = 0x00000000; | |
82 | /* Set clocks */ | |
83 | base->ucr4 |= UCR4_REF16; | |
84 | ||
85 | /* Configure FIFOs */ | |
86 | base->ufcr = 0xa81; | |
87 | ||
48fed405 AD |
88 | /* set the baud rate. |
89 | * | |
90 | * baud * 16 x | |
91 | * --------- = - | |
92 | * refclk y | |
93 | * | |
94 | * x - 1 = UBIR | |
95 | * y - 1 = UBMR | |
96 | * | |
97 | * each register is 16 bits wide. refclk max is 96 MHz | |
98 | * | |
99 | */ | |
100 | ||
101 | ufcr_rfdiv = ((base->ufcr) & UFCR_RFDIV) >> 7; | |
102 | if (ufcr_rfdiv == 6) | |
103 | ufcr_rfdiv = 7; | |
104 | else | |
105 | ufcr_rfdiv = 6 - ufcr_rfdiv; | |
106 | ||
107 | refclk = get_PERCLK1(); | |
108 | refclk /= ufcr_rfdiv; | |
109 | ||
281e00a3 | 110 | /* Set the numerator value minus one of the BRM ratio */ |
48fed405 | 111 | base->ubir = (gd->baudrate / 100) - 1; |
281e00a3 WD |
112 | |
113 | /* Set the denominator value minus one of the BRM ratio */ | |
48fed405 | 114 | base->ubmr = (refclk/(16 * 100)) - 1; |
281e00a3 WD |
115 | |
116 | /* Set to 8N1 */ | |
117 | base->ucr2 &= ~UCR2_PREN; | |
118 | base->ucr2 |= UCR2_WS; | |
119 | base->ucr2 &= ~UCR2_STPB; | |
120 | ||
121 | /* Ignore RTS */ | |
122 | base->ucr2 |= UCR2_IRTS; | |
123 | ||
124 | /* Enable UART */ | |
125 | base->ucr1 |= UCR1_UARTEN | UCR1_UARTCLKEN; | |
126 | ||
127 | /* Enable FIFOs */ | |
128 | base->ucr2 |= UCR2_SRST | UCR2_RXEN | UCR2_TXEN; | |
129 | ||
53677ef1 | 130 | /* Clear status flags */ |
281e00a3 | 131 | base->usr2 |= USR2_ADET | |
48fed405 AD |
132 | USR2_DTRF | |
133 | USR2_IDLE | | |
134 | USR2_IRINT | | |
135 | USR2_WAKE | | |
136 | USR2_RTSF | | |
137 | USR2_BRCD | | |
138 | USR2_ORE; | |
281e00a3 | 139 | |
53677ef1 | 140 | /* Clear status flags */ |
281e00a3 | 141 | base->usr1 |= USR1_PARITYERR | |
48fed405 AD |
142 | USR1_RTSD | |
143 | USR1_ESCF | | |
144 | USR1_FRAMERR | | |
145 | USR1_AIRINT | | |
146 | USR1_AWAKE; | |
281e00a3 WD |
147 | return (0); |
148 | } | |
149 | ||
150 | /* | |
151 | * Read a single byte from the serial port. Returns 1 on success, 0 | |
152 | * otherwise. When the function is successful, the character read is | |
153 | * written into its argument c. | |
154 | */ | |
7882e7c1 | 155 | static int imx_serial_getc(void) |
281e00a3 WD |
156 | { |
157 | volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; | |
158 | unsigned char ch; | |
159 | ||
160 | while(base->uts & UTS_RXEMPTY); | |
161 | ||
162 | ch = (char)base->urxd[0]; | |
163 | ||
164 | return ch; | |
165 | } | |
166 | ||
167 | #ifdef CONFIG_HWFLOW | |
168 | static int hwflow = 0; /* turned off by default */ | |
169 | int hwflow_onoff(int on) | |
170 | { | |
171 | } | |
172 | #endif | |
173 | ||
174 | /* | |
175 | * Output a single byte to the serial port. | |
176 | */ | |
7882e7c1 | 177 | static void imx_serial_putc(const char c) |
281e00a3 WD |
178 | { |
179 | volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; | |
180 | ||
181 | /* Wait for Tx FIFO not full */ | |
182 | while (base->uts & UTS_TXFULL); | |
183 | ||
184 | base->utxd[0] = c; | |
185 | ||
186 | /* If \n, also do \r */ | |
187 | if (c == '\n') | |
188 | serial_putc ('\r'); | |
189 | } | |
190 | ||
191 | /* | |
192 | * Test whether a character is in the RX buffer | |
193 | */ | |
7882e7c1 | 194 | static int imx_serial_tstc(void) |
281e00a3 WD |
195 | { |
196 | volatile struct imx_serial* base = (struct imx_serial *)UART_BASE; | |
197 | ||
198 | /* If receive fifo is empty, return false */ | |
199 | if (base->uts & UTS_RXEMPTY) | |
200 | return 0; | |
201 | return 1; | |
202 | } | |
203 | ||
7882e7c1 MV |
204 | static struct serial_device imx_serial_drv = { |
205 | .name = "imx_serial", | |
206 | .start = imx_serial_init, | |
207 | .stop = NULL, | |
208 | .setbrg = imx_serial_setbrg, | |
209 | .putc = imx_serial_putc, | |
ec3fd689 | 210 | .puts = default_serial_puts, |
7882e7c1 MV |
211 | .getc = imx_serial_getc, |
212 | .tstc = imx_serial_tstc, | |
213 | }; | |
214 | ||
215 | void imx_serial_initialize(void) | |
216 | { | |
217 | serial_register(&imx_serial_drv); | |
218 | } | |
219 | ||
220 | __weak struct serial_device *default_serial_console(void) | |
221 | { | |
222 | return &imx_serial_drv; | |
223 | } |