]> Git Repo - J-u-boot.git/blame - configs/chromebook_bob_defconfig
x86: Add support for building up an NHLT structure
[J-u-boot.git] / configs / chromebook_bob_defconfig
CommitLineData
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SG
1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_TEXT_BASE=0x00200000
4CONFIG_SPL_GPIO_SUPPORT=y
052170c6 5CONFIG_ENV_OFFSET=0x3F8000
556fd590 6CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
c5a6e9f8 7CONFIG_SPL_TEXT_BASE=0xff8c2000
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SG
8CONFIG_ROCKCHIP_RK3399=y
9CONFIG_ROCKCHIP_BOOT_MODE_REG=0
10CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
11# CONFIG_SPL_MMC_SUPPORT is not set
d168bcb6 12CONFIG_NR_DRAM_BANKS=1
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13CONFIG_DEBUG_UART_BASE=0xff1a0000
14CONFIG_DEBUG_UART_CLOCK=24000000
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15CONFIG_SPL_SPI_FLASH_SUPPORT=y
16CONFIG_SPL_SPI_SUPPORT=y
556fd590 17CONFIG_DEBUG_UART=y
6e7d7aa2 18CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
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SG
19CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
20# CONFIG_DISPLAY_CPUINFO is not set
21CONFIG_DISPLAY_BOARDINFO_LATE=y
58ec0aa3 22# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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23CONFIG_SPL_STACK_R=y
24CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
25CONFIG_SPL_SPI_LOAD=y
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26CONFIG_CMD_BOOTZ=y
27CONFIG_CMD_GPIO=y
28CONFIG_CMD_GPT=y
29CONFIG_CMD_I2C=y
30CONFIG_CMD_MMC=y
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SG
31CONFIG_CMD_SF_TEST=y
32CONFIG_CMD_SPI=y
33CONFIG_CMD_USB=y
34# CONFIG_CMD_SETEXPR is not set
35CONFIG_CMD_TIME=y
36CONFIG_CMD_PMIC=y
37CONFIG_CMD_REGULATOR=y
38CONFIG_CMD_LOG=y
39CONFIG_SPL_OF_CONTROL=y
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SG
40CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
41CONFIG_ENV_IS_IN_MMC=y
8d8ee47e 42CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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43CONFIG_ROCKCHIP_GPIO=y
44CONFIG_I2C_CROS_EC_TUNNEL=y
45CONFIG_SYS_I2C_ROCKCHIP=y
46CONFIG_I2C_MUX=y
47CONFIG_DM_KEYBOARD=y
48CONFIG_CROS_EC_KEYB=y
49CONFIG_CROS_EC=y
50CONFIG_CROS_EC_SPI=y
51CONFIG_PWRSEQ=y
52CONFIG_MMC_DW=y
53CONFIG_MMC_DW_ROCKCHIP=y
54CONFIG_MMC_SDHCI=y
55CONFIG_MMC_SDHCI_ROCKCHIP=y
14453fbf 56CONFIG_SF_DEFAULT_SPEED=20000000
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57CONFIG_SPI_FLASH_GIGADEVICE=y
58CONFIG_DM_ETH=y
59CONFIG_ETH_DESIGNWARE=y
60CONFIG_GMAC_ROCKCHIP=y
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61CONFIG_PMIC_RK8XX=y
62CONFIG_REGULATOR_PWM=y
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63CONFIG_REGULATOR_RK8XX=y
64CONFIG_PWM_ROCKCHIP=y
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65CONFIG_DEBUG_UART_SHIFT=2
66CONFIG_ROCKCHIP_SPI=y
67CONFIG_SYSRESET=y
68CONFIG_USB=y
69CONFIG_USB_XHCI_HCD=y
70CONFIG_USB_XHCI_DWC3=y
71CONFIG_USB_EHCI_HCD=y
72CONFIG_USB_EHCI_GENERIC=y
73CONFIG_USB_HOST_ETHER=y
74CONFIG_USB_ETHER_ASIX=y
75CONFIG_USB_ETHER_ASIX88179=y
76CONFIG_USB_ETHER_MCS7830=y
77CONFIG_USB_ETHER_RTL8152=y
78CONFIG_USB_ETHER_SMSC95XX=y
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SG
79CONFIG_CMD_DHRYSTONE=y
80CONFIG_ERRNO_STR=y
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