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Commit | Line | Data |
---|---|---|
085cd645 WE |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_K3=y | |
3 | CONFIG_SYS_MALLOC_LEN=0x08000000 | |
4 | CONFIG_SYS_MALLOC_F_LEN=0x9000 | |
5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
7 | CONFIG_NR_DRAM_BANKS=2 | |
8 | CONFIG_SOC_K3_AM625=y | |
0be40237 | 9 | CONFIG_PHYTEC_SOM_DETECTION=y |
085cd645 WE |
10 | CONFIG_TARGET_PHYCORE_AM62X_R5=y |
11 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | |
12 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 | |
13 | CONFIG_SF_DEFAULT_SPEED=25000000 | |
14 | CONFIG_SF_DEFAULT_MODE=0 | |
15 | CONFIG_ENV_SIZE=0x20000 | |
16 | CONFIG_DM_GPIO=y | |
17 | CONFIG_SPL_DM_SPI=y | |
18 | CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-phycore-som-2gb" | |
085cd645 WE |
19 | CONFIG_DM_RESET=y |
20 | CONFIG_SPL_MMC=y | |
21 | CONFIG_SPL_SERIAL=y | |
22 | CONFIG_SPL_DRIVERS_MISC=y | |
23 | CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
24 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 | |
867e16ae | 25 | CONFIG_SPL_TEXT_BASE=0x43c00000 |
18e791c4 TR |
26 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
27 | CONFIG_SPL_BSS_START_ADDR=0x43c3b000 | |
28 | CONFIG_SPL_BSS_MAX_SIZE=0x3000 | |
29 | CONFIG_SPL_STACK_R=y | |
085cd645 WE |
30 | CONFIG_SPL_SIZE_LIMIT=0x3A7F0 |
31 | CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 | |
32 | CONFIG_SPL_FS_FAT=y | |
33 | CONFIG_SPL_LIBDISK_SUPPORT=y | |
34 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
35 | CONFIG_SPL_SPI=y | |
36 | CONFIG_SPL_LOAD_FIT=y | |
37 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 | |
38 | # CONFIG_DISPLAY_CPUINFO is not set | |
39 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y | |
40 | CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y | |
41 | CONFIG_SPL_MAX_SIZE=0x3B000 | |
42 | CONFIG_SPL_PAD_TO=0x0 | |
085cd645 WE |
43 | CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y |
44 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y | |
085cd645 WE |
45 | CONFIG_SPL_SEPARATE_BSS=y |
46 | CONFIG_SPL_SYS_MALLOC=y | |
47 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y | |
48 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000 | |
49 | CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 | |
50 | CONFIG_SPL_EARLY_BSS=y | |
2a00d73d | 51 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
085cd645 | 52 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 |
0be40237 | 53 | CONFIG_SPL_I2C=y |
085cd645 WE |
54 | CONFIG_SPL_DM_MAILBOX=y |
55 | CONFIG_SPL_DM_SPI_FLASH=y | |
56 | CONFIG_SPL_DM_RESET=y | |
57 | CONFIG_SPL_POWER_DOMAIN=y | |
085cd645 WE |
58 | CONFIG_SPL_RAM_DEVICE=y |
59 | CONFIG_SPL_REMOTEPROC=y | |
60 | # CONFIG_SPL_SPI_FLASH_TINY is not set | |
61 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y | |
62 | CONFIG_SPL_SPI_LOAD=y | |
63 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 | |
64 | CONFIG_SPL_YMODEM_SUPPORT=y | |
65 | CONFIG_HUSH_PARSER=y | |
66 | CONFIG_CMD_ASKENV=y | |
67 | CONFIG_CMD_DFU=y | |
68 | CONFIG_CMD_GPT=y | |
69 | CONFIG_CMD_MMC=y | |
70 | CONFIG_CMD_REMOTEPROC=y | |
71 | # CONFIG_CMD_SETEXPR is not set | |
72 | CONFIG_CMD_TIME=y | |
73 | CONFIG_CMD_FAT=y | |
74 | CONFIG_OF_CONTROL=y | |
75 | CONFIG_SPL_OF_CONTROL=y | |
76 | CONFIG_SPL_MULTI_DTB_FIT=y | |
77 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
78 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
79 | CONFIG_SPL_DM=y | |
80 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
81 | CONFIG_REGMAP=y | |
82 | CONFIG_SPL_REGMAP=y | |
83 | CONFIG_SPL_OF_TRANSLATE=y | |
84 | CONFIG_CLK=y | |
85 | CONFIG_SPL_CLK=y | |
86 | CONFIG_SPL_CLK_CCF=y | |
87 | CONFIG_SPL_CLK_K3_PLL=y | |
88 | CONFIG_SPL_CLK_K3=y | |
89 | CONFIG_TI_SCI_PROTOCOL=y | |
90 | CONFIG_DA8XX_GPIO=y | |
0be40237 | 91 | CONFIG_DM_I2C=y |
08f512cf | 92 | CONFIG_SYS_I2C_OMAP24XX=y |
085cd645 WE |
93 | CONFIG_DM_MAILBOX=y |
94 | CONFIG_K3_SEC_PROXY=y | |
95 | CONFIG_SPL_MISC=y | |
96 | CONFIG_ESM_K3=y | |
97 | CONFIG_SUPPORT_EMMC_BOOT=y | |
98 | CONFIG_MMC_SDHCI=y | |
99 | CONFIG_MMC_SDHCI_ADMA=y | |
100 | CONFIG_SPL_MMC_SDHCI_ADMA=y | |
101 | CONFIG_MMC_SDHCI_AM654=y | |
db04ff42 | 102 | CONFIG_MTD=y |
085cd645 WE |
103 | CONFIG_DM_SPI_FLASH=y |
104 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y | |
105 | # CONFIG_SPI_FLASH_SMART_HWCAPS is not set | |
106 | CONFIG_SPI_FLASH_SOFT_RESET=y | |
107 | CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y | |
085cd645 WE |
108 | CONFIG_SPI_FLASH_STMICRO=y |
109 | CONFIG_SPI_FLASH_MT35XU=y | |
110 | CONFIG_PINCTRL=y | |
111 | # CONFIG_PINCTRL_GENERIC is not set | |
112 | CONFIG_SPL_PINCTRL=y | |
113 | # CONFIG_SPL_PINCTRL_GENERIC is not set | |
114 | CONFIG_PINCTRL_SINGLE=y | |
115 | CONFIG_POWER_DOMAIN=y | |
116 | CONFIG_TI_POWER_DOMAIN=y | |
117 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
118 | CONFIG_REMOTEPROC_TI_K3_ARM64=y | |
119 | CONFIG_RESET_TI_SCI=y | |
120 | CONFIG_SPECIFY_CONSOLE_INDEX=y | |
121 | CONFIG_DM_SERIAL=y | |
122 | CONFIG_SOC_DEVICE=y | |
123 | CONFIG_SOC_DEVICE_TI_K3=y | |
124 | CONFIG_SOC_TI=y | |
125 | CONFIG_SPI=y | |
126 | CONFIG_DM_SPI=y | |
127 | CONFIG_CADENCE_QSPI=y | |
128 | CONFIG_TIMER=y | |
129 | CONFIG_SPL_TIMER=y | |
130 | CONFIG_OMAP_TIMER=y | |
131 | CONFIG_LIB_RATIONAL=y | |
132 | CONFIG_SPL_LIB_RATIONAL=y |