]> Git Repo - J-u-boot.git/blame - drivers/fpga/altera.c
Merge patch series "FWU: Add support for FWU metadata version 2"
[J-u-boot.git] / drivers / fpga / altera.c
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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
5b845b66 2/*
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3 * (C) Copyright 2003
4 * Steven Scholz, imc Measurement & Control, [email protected]
5 *
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6 * (C) Copyright 2002
7 * Rich Ireland, Enterasys Networks, [email protected].
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8 */
9
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10#define LOG_CATEGORY UCLASS_FPGA
11
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12/*
13 * Altera FPGA support
14 */
fda915a4 15#include <errno.h>
5da627a4 16#include <ACEX1K.h>
f7ae49fc 17#include <log.h>
3c735e74 18#include <stratixII.h>
5b845b66 19
2012f238
MV
20static const struct altera_fpga {
21 enum altera_family family;
22 const char *name;
23 int (*load)(Altera_desc *, const void *, size_t);
24 int (*dump)(Altera_desc *, const void *, size_t);
25 int (*info)(Altera_desc *);
26} altera_fpga[] = {
27#if defined(CONFIG_FPGA_ACEX1K)
28 { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
29 { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info },
30#elif defined(CONFIG_FPGA_CYCLON2)
31 { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
32 { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info },
33#endif
34#if defined(CONFIG_FPGA_STRATIX_II)
35 { Altera_StratixII, "StratixII", StratixII_load,
36 StratixII_dump, StratixII_info },
37#endif
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38#if defined(CONFIG_FPGA_STRATIX_V)
39 { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL },
40#endif
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41#if defined(CONFIG_FPGA_SOCFPGA)
42 { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
43#endif
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44#if defined(CONFIG_FPGA_INTEL_SDM_MAILBOX)
45 { Intel_FPGA_SDM_Mailbox, "Intel SDM Mailbox", intel_sdm_mb_load, NULL,
46 NULL },
47#endif
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48};
49
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50static int altera_validate(Altera_desc *desc, const char *fn)
51{
52 if (!desc) {
53 printf("%s: NULL descriptor!\n", fn);
fda915a4 54 return -EINVAL;
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55 }
56
57 if ((desc->family < min_altera_type) ||
58 (desc->family > max_altera_type)) {
59 printf("%s: Invalid family type, %d\n", fn, desc->family);
fda915a4 60 return -EINVAL;
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61 }
62
63 if ((desc->iface < min_altera_iface_type) ||
64 (desc->iface > max_altera_iface_type)) {
65 printf("%s: Invalid Interface type, %d\n", fn, desc->iface);
fda915a4 66 return -EINVAL;
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67 }
68
69 if (!desc->size) {
70 printf("%s: NULL part size\n", fn);
fda915a4 71 return -EINVAL;
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72 }
73
fda915a4 74 return 0;
54c96b18 75}
5da627a4 76
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77static const struct altera_fpga *
78altera_desc_to_fpga(Altera_desc *desc, const char *fn)
5b845b66 79{
2012f238 80 int i;
5da627a4 81
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82 if (altera_validate(desc, fn)) {
83 printf("%s: Invalid device descriptor\n", fn);
84 return NULL;
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85 }
86
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87 for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) {
88 if (desc->family == altera_fpga[i].family)
89 break;
90 }
5da627a4 91
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92 if (i == ARRAY_SIZE(altera_fpga)) {
93 printf("%s: Unsupported family type, %d\n", fn, desc->family);
94 return NULL;
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95 }
96
2012f238 97 return &altera_fpga[i];
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98}
99
2012f238 100int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
5b845b66 101{
2012f238 102 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
5da627a4 103
2012f238 104 if (!fpga)
4a4c0a5e 105 return FPGA_FAIL;
4a4c0a5e 106
6c62e8ff 107 log_debug("Launching the %s Loader...\n", fpga->name);
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108 if (fpga->load)
109 return fpga->load(desc, buf, bsize);
110 return 0;
111}
5da627a4 112
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113int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
114{
115 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
5da627a4 116
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117 if (!fpga)
118 return FPGA_FAIL;
119
6c62e8ff 120 log_debug("Launching the %s Reader...\n", fpga->name);
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121 if (fpga->dump)
122 return fpga->dump(desc, buf, bsize);
123 return 0;
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124}
125
4a4c0a5e 126int altera_info(Altera_desc *desc)
5b845b66 127{
2012f238 128 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);
5da627a4 129
2012f238 130 if (!fpga)
4a4c0a5e 131 return FPGA_FAIL;
5da627a4 132
2012f238 133 printf("Family: \t%s\n", fpga->name);
5da627a4 134
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MV
135 printf("Interface type:\t");
136 switch (desc->iface) {
137 case passive_serial:
138 printf("Passive Serial (PS)\n");
139 break;
140 case passive_parallel_synchronous:
141 printf("Passive Parallel Synchronous (PPS)\n");
142 break;
143 case passive_parallel_asynchronous:
144 printf("Passive Parallel Asynchronous (PPA)\n");
145 break;
146 case passive_serial_asynchronous:
147 printf("Passive Serial Asynchronous (PSA)\n");
148 break;
149 case altera_jtag_mode: /* Not used */
150 printf("JTAG Mode\n");
151 break;
152 case fast_passive_parallel:
153 printf("Fast Passive Parallel (FPP)\n");
154 break;
155 case fast_passive_parallel_security:
156 printf("Fast Passive Parallel with Security (FPPS)\n");
157 break;
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158 case secure_device_manager_mailbox:
159 puts("Secure Device Manager (SDM) Mailbox\n");
160 break;
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161 /* Add new interface types here */
162 default:
163 printf("Unsupported interface type, %d\n", desc->iface);
164 }
165
166 printf("Device Size: \t%zd bytes\n"
167 "Cookie: \t0x%x (%d)\n",
168 desc->size, desc->cookie, desc->cookie);
5da627a4 169
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170 if (desc->iface_fns) {
171 printf("Device Function Table @ 0x%p\n", desc->iface_fns);
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172 if (fpga->info)
173 fpga->info(desc);
5da627a4 174 } else {
4a4c0a5e 175 printf("No Device Function Table.\n");
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176 }
177
2012f238 178 return FPGA_SUCCESS;
5da627a4 179}
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