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Commit | Line | Data |
---|---|---|
a684729a LFT |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_SOCFPGA=y | |
3 | CONFIG_SYS_TEXT_BASE=0x1000 | |
4 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
5 | CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y | |
6 | CONFIG_SPL=y | |
7 | CONFIG_IDENT_STRING="socfpga_stratix10" | |
0c3a9ed4 | 8 | CONFIG_SPL_FS_FAT=y |
a32f7d3c | 9 | CONFIG_NR_DRAM_BANKS=2 |
a684729a LFT |
10 | CONFIG_BOOTDELAY=5 |
11 | CONFIG_SPL_SPI_LOAD=y | |
12 | CONFIG_HUSH_PARSER=y | |
13 | CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " | |
14 | CONFIG_CMD_MEMTEST=y | |
15 | # CONFIG_CMD_FLASH is not set | |
16 | CONFIG_CMD_GPIO=y | |
17 | CONFIG_CMD_I2C=y | |
18 | CONFIG_CMD_MMC=y | |
19 | CONFIG_CMD_SF=y | |
20 | CONFIG_CMD_SPI=y | |
21 | CONFIG_CMD_USB=y | |
22 | CONFIG_CMD_DHCP=y | |
23 | CONFIG_CMD_MII=y | |
24 | CONFIG_CMD_PING=y | |
25 | CONFIG_CMD_CACHE=y | |
26 | CONFIG_CMD_EXT4=y | |
27 | CONFIG_CMD_FAT=y | |
28 | CONFIG_CMD_FS_GENERIC=y | |
f6d600b3 | 29 | CONFIG_OF_EMBED=y |
8c5cad05 | 30 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" |
a684729a LFT |
31 | CONFIG_ENV_IS_IN_MMC=y |
32 | CONFIG_NET_RANDOM_ETHADDR=y | |
33 | CONFIG_SPL_DM=y | |
34 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
35 | CONFIG_DM_GPIO=y | |
36 | CONFIG_DWAPB_GPIO=y | |
37 | CONFIG_DM_I2C=y | |
38 | CONFIG_SYS_I2C_DW=y | |
39 | CONFIG_DM_MMC=y | |
40 | CONFIG_MMC_DW=y | |
41 | CONFIG_SPI_FLASH=y | |
14453fbf | 42 | CONFIG_SF_DEFAULT_MODE=0x2003 |
a684729a LFT |
43 | CONFIG_SPI_FLASH_SPANSION=y |
44 | CONFIG_SPI_FLASH_STMICRO=y | |
45 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set | |
46 | CONFIG_PHY_MICREL=y | |
47 | CONFIG_PHY_MICREL_KSZ90X1=y | |
48 | CONFIG_DM_ETH=y | |
49 | CONFIG_ETH_DESIGNWARE=y | |
d7869b21 | 50 | CONFIG_MII=y |
a684729a LFT |
51 | CONFIG_DM_RESET=y |
52 | CONFIG_SPI=y | |
53 | CONFIG_CADENCE_QSPI=y | |
54 | CONFIG_DESIGNWARE_SPI=y | |
55 | CONFIG_USB=y | |
56 | CONFIG_DM_USB=y | |
57 | CONFIG_USB_DWC2=y | |
58 | CONFIG_USB_STORAGE=y |