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fe8c2806 | 1 | /* |
d4ca31c4 | 2 | * (C) Copyright 2000-2004 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
fe8c2806 WD |
38 | #if (CONFIG_COMMANDS & CFG_CMD_IDE) |
39 | #include <ide.h> | |
40 | #endif | |
41 | #if (CONFIG_COMMANDS & CFG_CMD_SCSI) | |
42 | #include <scsi.h> | |
43 | #endif | |
44 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
45 | #include <kgdb.h> | |
46 | #endif | |
47 | #ifdef CONFIG_STATUS_LED | |
48 | #include <status_led.h> | |
49 | #endif | |
50 | #include <net.h> | |
281e00a3 | 51 | #include <serial.h> |
fe8c2806 | 52 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 53 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
54 | #include <commproc.h> |
55 | #endif | |
7aa78614 | 56 | #endif |
fe8c2806 WD |
57 | #include <version.h> |
58 | #if defined(CONFIG_BAB7xx) | |
59 | #include <w83c553f.h> | |
60 | #endif | |
61 | #include <dtt.h> | |
62 | #if defined(CONFIG_POST) | |
63 | #include <post.h> | |
64 | #endif | |
56f94be3 WD |
65 | #if defined(CONFIG_LOGBUFFER) |
66 | #include <logbuff.h> | |
67 | #endif | |
42d1f039 WD |
68 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
69 | #include <asm/cache.h> | |
70 | #endif | |
1c43771b WD |
71 | #ifdef CONFIG_PS2KBD |
72 | #include <keyboard.h> | |
73 | #endif | |
fe8c2806 WD |
74 | |
75 | #if (CONFIG_COMMANDS & CFG_CMD_DOC) | |
76 | void doc_init (void); | |
77 | #endif | |
78 | #if defined(CONFIG_HARD_I2C) || \ | |
79 | defined(CONFIG_SOFT_I2C) | |
80 | #include <i2c.h> | |
81 | #endif | |
bedc4970 SR |
82 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
83 | void nand_init (void); | |
84 | #endif | |
fe8c2806 WD |
85 | |
86 | static char *failed = "*** failed ***\n"; | |
87 | ||
17d704eb | 88 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 89 | extern flash_info_t flash_info[]; |
17d704eb | 90 | #endif |
fe8c2806 WD |
91 | |
92 | #include <environment.h> | |
bce84c4d | 93 | DECLARE_GLOBAL_DATA_PTR; |
fe8c2806 | 94 | |
7e780369 WD |
95 | #if defined(CFG_ENV_IS_EMBEDDED) |
96 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
97 | #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \ | |
04a85b3b | 98 | (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ |
7e780369 | 99 | defined(CFG_ENV_IS_IN_NVRAM) |
fe8c2806 WD |
100 | #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE) |
101 | #else | |
102 | #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN | |
103 | #endif | |
104 | ||
3b57fe0a WD |
105 | extern ulong __init_end; |
106 | extern ulong _end; | |
3b57fe0a WD |
107 | ulong monitor_flash_len; |
108 | ||
8bde7f77 WD |
109 | #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) |
110 | #include <bedbug/type.h> | |
111 | #endif | |
112 | ||
fe8c2806 WD |
113 | /* |
114 | * Begin and End of memory area for malloc(), and current "brk" | |
115 | */ | |
116 | static ulong mem_malloc_start = 0; | |
117 | static ulong mem_malloc_end = 0; | |
118 | static ulong mem_malloc_brk = 0; | |
119 | ||
120 | /************************************************************************ | |
121 | * Utilities * | |
122 | ************************************************************************ | |
123 | */ | |
124 | ||
125 | /* | |
126 | * The Malloc area is immediately below the monitor copy in DRAM | |
127 | */ | |
128 | static void mem_malloc_init (void) | |
129 | { | |
fe8c2806 WD |
130 | ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off; |
131 | ||
132 | mem_malloc_end = dest_addr; | |
133 | mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN; | |
134 | mem_malloc_brk = mem_malloc_start; | |
135 | ||
136 | memset ((void *) mem_malloc_start, | |
137 | 0, | |
138 | mem_malloc_end - mem_malloc_start); | |
139 | } | |
140 | ||
141 | void *sbrk (ptrdiff_t increment) | |
142 | { | |
143 | ulong old = mem_malloc_brk; | |
144 | ulong new = old + increment; | |
145 | ||
146 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
147 | return (NULL); | |
148 | } | |
149 | mem_malloc_brk = new; | |
150 | return ((void *) old); | |
151 | } | |
152 | ||
153 | char *strmhz (char *buf, long hz) | |
154 | { | |
155 | long l, n; | |
156 | long m; | |
157 | ||
158 | n = hz / 1000000L; | |
159 | l = sprintf (buf, "%ld", n); | |
160 | m = (hz % 1000000L) / 1000L; | |
161 | if (m != 0) | |
162 | sprintf (buf + l, ".%03ld", m); | |
163 | return (buf); | |
164 | } | |
165 | ||
fe8c2806 WD |
166 | /* |
167 | * All attempts to come up with a "common" initialization sequence | |
168 | * that works for all boards and architectures failed: some of the | |
169 | * requirements are just _too_ different. To get rid of the resulting | |
170 | * mess of board dependend #ifdef'ed code we now make the whole | |
171 | * initialization sequence configurable to the user. | |
172 | * | |
173 | * The requirements for any new initalization function is simple: it | |
174 | * receives a pointer to the "global data" structure as it's only | |
175 | * argument, and returns an integer return code, where 0 means | |
176 | * "continue" and != 0 means "fatal error, hang the system". | |
177 | */ | |
178 | typedef int (init_fnc_t) (void); | |
179 | ||
180 | /************************************************************************ | |
181 | * Init Utilities * | |
182 | ************************************************************************ | |
183 | * Some of this code should be moved into the core functions, | |
184 | * but let's get it working (again) first... | |
185 | */ | |
186 | ||
187 | static int init_baudrate (void) | |
188 | { | |
fe8c2806 WD |
189 | uchar tmp[64]; /* long enough for environment variables */ |
190 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); | |
191 | ||
192 | gd->baudrate = (i > 0) | |
193 | ? (int) simple_strtoul (tmp, NULL, 10) | |
194 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
195 | return (0); |
196 | } | |
197 | ||
198 | /***********************************************************************/ | |
199 | ||
200 | static int init_func_ram (void) | |
201 | { | |
fe8c2806 WD |
202 | #ifdef CONFIG_BOARD_TYPES |
203 | int board_type = gd->board_type; | |
204 | #else | |
205 | int board_type = 0; /* use dummy arg */ | |
206 | #endif | |
207 | puts ("DRAM: "); | |
208 | ||
209 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
210 | print_size (gd->ram_size, "\n"); | |
211 | return (0); | |
212 | } | |
213 | puts (failed); | |
214 | return (1); | |
215 | } | |
216 | ||
217 | /***********************************************************************/ | |
218 | ||
219 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
220 | static int init_func_i2c (void) | |
221 | { | |
222 | puts ("I2C: "); | |
223 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); | |
224 | puts ("ready\n"); | |
225 | return (0); | |
226 | } | |
227 | #endif | |
228 | ||
229 | /***********************************************************************/ | |
230 | ||
231 | #if defined(CONFIG_WATCHDOG) | |
232 | static int init_func_watchdog_init (void) | |
233 | { | |
234 | puts (" Watchdog enabled\n"); | |
235 | WATCHDOG_RESET (); | |
236 | return (0); | |
237 | } | |
238 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
239 | ||
240 | static int init_func_watchdog_reset (void) | |
241 | { | |
242 | WATCHDOG_RESET (); | |
243 | return (0); | |
244 | } | |
245 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
246 | #else | |
247 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
248 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
249 | #endif /* CONFIG_WATCHDOG */ | |
250 | ||
251 | /************************************************************************ | |
252 | * Initialization sequence * | |
253 | ************************************************************************ | |
254 | */ | |
255 | ||
256 | init_fnc_t *init_sequence[] = { | |
257 | ||
c837dcb1 WD |
258 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
259 | board_early_init_f, | |
fe8c2806 | 260 | #endif |
c178d3da | 261 | |
66ca92a5 | 262 | #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
fe8c2806 | 263 | get_clocks, /* get CPU and bus clocks (etc.) */ |
e9132ea9 WD |
264 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) |
265 | adjust_sdram_tbs_8xx, | |
266 | #endif | |
fe8c2806 | 267 | init_timebase, |
c178d3da | 268 | #endif |
fe8c2806 | 269 | #ifdef CFG_ALLOC_DPRAM |
9c4c5ae3 | 270 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
271 | dpram_init, |
272 | #endif | |
7aa78614 | 273 | #endif |
fe8c2806 WD |
274 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
275 | board_postclk_init, | |
276 | #endif | |
277 | env_init, | |
66ca92a5 | 278 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
c178d3da WD |
279 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ |
280 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
281 | init_timebase, | |
282 | #endif | |
fe8c2806 WD |
283 | init_baudrate, |
284 | serial_init, | |
285 | console_init_f, | |
286 | display_options, | |
287 | #if defined(CONFIG_8260) | |
288 | prt_8260_rsr, | |
289 | prt_8260_clks, | |
290 | #endif /* CONFIG_8260 */ | |
f046ccd1 EL |
291 | |
292 | #if defined(CONFIG_MPC83XX) | |
293 | print_clock_conf, | |
294 | #endif | |
295 | ||
fe8c2806 | 296 | checkcpu, |
cbd8a35c | 297 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 298 | prt_mpc5xxx_clks, |
cbd8a35c | 299 | #endif /* CONFIG_MPC5xxx */ |
983fda83 WD |
300 | #if defined(CONFIG_MPC8220) |
301 | prt_mpc8220_clks, | |
302 | #endif | |
fe8c2806 WD |
303 | checkboard, |
304 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 305 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
306 | misc_init_f, |
307 | #endif | |
308 | INIT_FUNC_WATCHDOG_RESET | |
309 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
310 | init_func_i2c, | |
311 | #endif | |
312 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ | |
313 | dtt_init, | |
4532cb69 WD |
314 | #endif |
315 | #ifdef CONFIG_POST | |
316 | post_init_f, | |
fe8c2806 WD |
317 | #endif |
318 | INIT_FUNC_WATCHDOG_RESET | |
319 | init_func_ram, | |
320 | #if defined(CFG_DRAM_TEST) | |
321 | testdram, | |
322 | #endif /* CFG_DRAM_TEST */ | |
323 | INIT_FUNC_WATCHDOG_RESET | |
324 | ||
325 | NULL, /* Terminate this list */ | |
326 | }; | |
327 | ||
328 | /************************************************************************ | |
329 | * | |
330 | * This is the first part of the initialization sequence that is | |
331 | * implemented in C, but still running from ROM. | |
332 | * | |
333 | * The main purpose is to provide a (serial) console interface as | |
334 | * soon as possible (so we can see any error messages), and to | |
335 | * initialize the RAM so that we can relocate the monitor code to | |
336 | * RAM. | |
337 | * | |
338 | * Be aware of the restrictions: global data is read-only, BSS is not | |
339 | * initialized, and stack space is limited to a few kB. | |
340 | * | |
341 | ************************************************************************ | |
342 | */ | |
343 | ||
344 | void board_init_f (ulong bootflag) | |
345 | { | |
fe8c2806 WD |
346 | bd_t *bd; |
347 | ulong len, addr, addr_sp; | |
7bc5ee07 | 348 | ulong *s; |
fe8c2806 WD |
349 | gd_t *id; |
350 | init_fnc_t **init_fnc_ptr; | |
351 | #ifdef CONFIG_PRAM | |
352 | int i; | |
353 | ulong reg; | |
354 | uchar tmp[64]; /* long enough for environment variables */ | |
355 | #endif | |
356 | ||
357 | /* Pointer is writable since we allocated a register for it */ | |
358 | gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
93f6a677 WD |
359 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
360 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 361 | |
9c4c5ae3 | 362 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
363 | /* Clear initial global data */ |
364 | memset ((void *) gd, 0, sizeof (gd_t)); | |
365 | #endif | |
366 | ||
367 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
368 | if ((*init_fnc_ptr) () != 0) { | |
369 | hang (); | |
370 | } | |
371 | } | |
372 | ||
373 | /* | |
374 | * Now that we have DRAM mapped and working, we can | |
375 | * relocate the code and continue running from DRAM. | |
376 | * | |
377 | * Reserve memory at end of RAM for (top down in that order): | |
8bde7f77 | 378 | * - kernel log buffer |
fe8c2806 WD |
379 | * - protected RAM |
380 | * - LCD framebuffer | |
381 | * - monitor code | |
382 | * - board info struct | |
383 | */ | |
3b57fe0a | 384 | len = (ulong)&_end - CFG_MONITOR_BASE; |
fe8c2806 WD |
385 | |
386 | #ifndef CONFIG_VERY_BIG_RAM | |
387 | addr = CFG_SDRAM_BASE + gd->ram_size; | |
388 | #else | |
389 | /* only allow stack below 256M */ | |
390 | addr = CFG_SDRAM_BASE + | |
391 | (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size; | |
392 | #endif | |
393 | ||
228f29ac WD |
394 | #ifdef CONFIG_LOGBUFFER |
395 | /* reserve kernel log buffer */ | |
396 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 397 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac WD |
398 | #endif |
399 | ||
fe8c2806 WD |
400 | #ifdef CONFIG_PRAM |
401 | /* | |
402 | * reserve protected RAM | |
403 | */ | |
404 | i = getenv_r ("pram", tmp, sizeof (tmp)); | |
405 | reg = (i > 0) ? simple_strtoul (tmp, NULL, 10) : CONFIG_PRAM; | |
406 | addr -= (reg << 10); /* size is in kB */ | |
9d2b18a0 | 407 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
408 | #endif /* CONFIG_PRAM */ |
409 | ||
410 | /* round down to next 4 kB limit */ | |
411 | addr &= ~(4096 - 1); | |
9d2b18a0 | 412 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
413 | |
414 | #ifdef CONFIG_LCD | |
415 | /* reserve memory for LCD display (always full pages) */ | |
416 | addr = lcd_setmem (addr); | |
417 | gd->fb_base = addr; | |
418 | #endif /* CONFIG_LCD */ | |
419 | ||
420 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
421 | /* reserve memory for video display (always full pages) */ | |
422 | addr = video_setmem (addr); | |
423 | gd->fb_base = addr; | |
424 | #endif /* CONFIG_VIDEO */ | |
425 | ||
426 | /* | |
427 | * reserve memory for U-Boot code, data & bss | |
682011ff | 428 | * round down to next 4 kB limit |
fe8c2806 WD |
429 | */ |
430 | addr -= len; | |
682011ff | 431 | addr &= ~(4096 - 1); |
7d314992 WD |
432 | #ifdef CONFIG_E500 |
433 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
434 | addr &= ~(65536 - 1); | |
435 | #endif | |
fe8c2806 | 436 | |
9d2b18a0 | 437 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 438 | |
c7de829c WD |
439 | #ifdef CONFIG_AMIGAONEG3SE |
440 | gd->relocaddr = addr; | |
441 | #endif | |
442 | ||
fe8c2806 WD |
443 | /* |
444 | * reserve memory for malloc() arena | |
445 | */ | |
446 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 447 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 448 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
449 | |
450 | /* | |
451 | * (permanently) allocate a Board Info struct | |
452 | * and a permanent copy of the "global" data | |
453 | */ | |
454 | addr_sp -= sizeof (bd_t); | |
455 | bd = (bd_t *) addr_sp; | |
456 | gd->bd = bd; | |
9d2b18a0 | 457 | debug ("Reserving %d Bytes for Board Info at: %08lx\n", |
fe8c2806 | 458 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
459 | addr_sp -= sizeof (gd_t); |
460 | id = (gd_t *) addr_sp; | |
9d2b18a0 | 461 | debug ("Reserving %d Bytes for Global Data at: %08lx\n", |
fe8c2806 | 462 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
463 | |
464 | /* | |
465 | * Finally, we set up a new (bigger) stack. | |
466 | * | |
467 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
468 | * Clear initial stack frame | |
469 | */ | |
470 | addr_sp -= 16; | |
471 | addr_sp &= ~0xF; | |
7bc5ee07 WD |
472 | s = (ulong *)addr_sp; |
473 | *s-- = 0; | |
474 | *s-- = 0; | |
475 | addr_sp = (ulong)s; | |
9d2b18a0 | 476 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
477 | |
478 | /* | |
479 | * Save local variables to board info struct | |
480 | */ | |
481 | ||
c837dcb1 | 482 | bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
483 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
484 | ||
485 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
486 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
487 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
983fda83 WD |
488 | #elif defined CONFIG_MPC8220 |
489 | bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */ | |
490 | bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 491 | #else |
c837dcb1 WD |
492 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
493 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
494 | #endif |
495 | ||
42d1f039 WD |
496 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
497 | defined(CONFIG_E500) | |
fe8c2806 WD |
498 | bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */ |
499 | #endif | |
cbd8a35c | 500 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
501 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ |
502 | #endif | |
f046ccd1 EL |
503 | #if defined(CONFIG_MPC83XX) |
504 | bd->bi_immrbar = CFG_IMMRBAR; | |
505 | #endif | |
983fda83 WD |
506 | #if defined(CONFIG_MPC8220) |
507 | bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */ | |
508 | bd->bi_inpfreq = gd->inp_clk; | |
509 | bd->bi_pcifreq = gd->pci_clk; | |
510 | bd->bi_vcofreq = gd->vco_clk; | |
511 | bd->bi_pevfreq = gd->pev_clk; | |
512 | bd->bi_flbfreq = gd->flb_clk; | |
513 | ||
514 | /* store bootparam to sram (backward compatible), here? */ | |
515 | { | |
9d5028c2 WD |
516 | u32 *sram = (u32 *)CFG_SRAM_BASE; |
517 | *sram++ = gd->ram_size; | |
518 | *sram++ = gd->bus_clk; | |
519 | *sram++ = gd->inp_clk; | |
520 | *sram++ = gd->cpu_clk; | |
521 | *sram++ = gd->vco_clk; | |
522 | *sram++ = gd->flb_clk; | |
523 | *sram++ = 0xb8c3ba11; /* boot signature */ | |
983fda83 WD |
524 | } |
525 | #endif | |
fe8c2806 WD |
526 | |
527 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
528 | ||
529 | WATCHDOG_RESET (); | |
530 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
531 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
9c4c5ae3 | 532 | #if defined(CONFIG_CPM2) |
fe8c2806 WD |
533 | bd->bi_cpmfreq = gd->cpm_clk; |
534 | bd->bi_brgfreq = gd->brg_clk; | |
535 | bd->bi_sccfreq = gd->scc_clk; | |
536 | bd->bi_vco = gd->vco_out; | |
9c4c5ae3 | 537 | #endif /* CONFIG_CPM2 */ |
cbd8a35c | 538 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
539 | bd->bi_ipbfreq = gd->ipb_clk; |
540 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 541 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
542 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
543 | ||
544 | #ifdef CFG_EXTBDINFO | |
545 | strncpy (bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); | |
546 | strncpy (bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
547 | ||
548 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
549 | bd->bi_plb_busfreq = gd->bus_clk; | |
846b0dd2 | 550 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR) |
fe8c2806 | 551 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 552 | bd->bi_opbfreq = get_OPB_freq (); |
028ab6b5 WD |
553 | #elif defined(CONFIG_XILINX_ML300) |
554 | bd->bi_pci_busfreq = get_PCI_freq (); | |
fe8c2806 WD |
555 | #endif |
556 | #endif | |
557 | ||
9d2b18a0 | 558 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
559 | |
560 | WATCHDOG_RESET (); | |
561 | ||
562 | #ifdef CONFIG_POST | |
563 | post_bootmode_init(); | |
6dff5529 | 564 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
565 | #endif |
566 | ||
567 | WATCHDOG_RESET(); | |
568 | ||
27b207fd | 569 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
570 | |
571 | relocate_code (addr_sp, id, addr); | |
572 | ||
573 | /* NOTREACHED - relocate_code() does not return */ | |
574 | } | |
575 | ||
576 | ||
577 | /************************************************************************ | |
578 | * | |
579 | * This is the next part if the initialization sequence: we are now | |
580 | * running from RAM and have a "normal" C environment, i. e. global | |
581 | * data can be written, BSS has been cleared, the stack size in not | |
582 | * that critical any more, etc. | |
583 | * | |
584 | ************************************************************************ | |
585 | */ | |
586 | ||
587 | void board_init_r (gd_t *id, ulong dest_addr) | |
588 | { | |
fe8c2806 WD |
589 | cmd_tbl_t *cmdtp; |
590 | char *s, *e; | |
591 | bd_t *bd; | |
592 | int i; | |
593 | extern void malloc_bin_reloc (void); | |
594 | #ifndef CFG_ENV_IS_NOWHERE | |
595 | extern char * env_name_spec; | |
596 | #endif | |
597 | ||
598 | #ifndef CFG_NO_FLASH | |
599 | ulong flash_size; | |
600 | #endif | |
601 | ||
602 | gd = id; /* initialize RAM version of global data */ | |
603 | bd = gd->bd; | |
604 | ||
605 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
606 | ||
9d2b18a0 | 607 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
608 | |
609 | WATCHDOG_RESET (); | |
610 | ||
c837dcb1 WD |
611 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
612 | board_early_init_r (); | |
613 | #endif | |
614 | ||
fe8c2806 | 615 | gd->reloc_off = dest_addr - CFG_MONITOR_BASE; |
8bde7f77 | 616 | |
3b57fe0a | 617 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 | 618 | |
281e00a3 WD |
619 | #ifdef CONFIG_SERIAL_MULTI |
620 | serial_initialize(); | |
621 | #endif | |
622 | ||
fe8c2806 WD |
623 | /* |
624 | * We have to relocate the command table manually | |
625 | */ | |
8bde7f77 | 626 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 627 | ulong addr; |
fe8c2806 WD |
628 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
629 | #if 0 | |
630 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
631 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
632 | #endif | |
633 | cmdtp->cmd = | |
634 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
635 | ||
636 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
637 | cmdtp->name = (char *)addr; | |
638 | ||
639 | if (cmdtp->usage) { | |
640 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
641 | cmdtp->usage = (char *)addr; | |
642 | } | |
643 | #ifdef CFG_LONGHELP | |
644 | if (cmdtp->help) { | |
645 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
646 | cmdtp->help = (char *)addr; | |
647 | } | |
648 | #endif | |
649 | } | |
650 | /* there are some other pointer constants we must deal with */ | |
651 | #ifndef CFG_ENV_IS_NOWHERE | |
652 | env_name_spec += gd->reloc_off; | |
653 | #endif | |
654 | ||
655 | WATCHDOG_RESET (); | |
656 | ||
56f94be3 | 657 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 658 | logbuff_init_ptrs (); |
56f94be3 | 659 | #endif |
fe8c2806 | 660 | #ifdef CONFIG_POST |
228f29ac | 661 | post_output_backlog (); |
fe8c2806 WD |
662 | post_reloc (); |
663 | #endif | |
664 | ||
665 | WATCHDOG_RESET(); | |
666 | ||
667 | #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM) | |
668 | icache_enable (); /* it's time to enable the instruction cache */ | |
669 | #endif | |
670 | ||
42d1f039 | 671 | #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 672 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
673 | #endif |
674 | ||
3bac3513 | 675 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 676 | /* |
3bac3513 WD |
677 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
678 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
679 | * bridge there. | |
fe8c2806 WD |
680 | */ |
681 | pci_init (); | |
3bac3513 WD |
682 | #endif |
683 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
684 | /* |
685 | * Initialise the ISA bridge | |
686 | */ | |
687 | initialise_w83c553f (); | |
688 | #endif | |
689 | ||
690 | asm ("sync ; isync"); | |
691 | ||
692 | /* | |
693 | * Setup trap handlers | |
694 | */ | |
695 | trap_init (dest_addr); | |
696 | ||
697 | #if !defined(CFG_NO_FLASH) | |
698 | puts ("FLASH: "); | |
699 | ||
700 | if ((flash_size = flash_init ()) > 0) { | |
0cb61d7d | 701 | # ifdef CFG_FLASH_CHECKSUM |
fe8c2806 WD |
702 | print_size (flash_size, ""); |
703 | /* | |
704 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
705 | * | |
706 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
707 | */ | |
708 | s = getenv ("flashchecksum"); | |
709 | if (s && (*s == 'y')) { | |
710 | printf (" CRC: %08lX", | |
7e780369 WD |
711 | crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size) |
712 | ); | |
fe8c2806 WD |
713 | } |
714 | putc ('\n'); | |
0cb61d7d | 715 | # else /* !CFG_FLASH_CHECKSUM */ |
fe8c2806 | 716 | print_size (flash_size, "\n"); |
0cb61d7d | 717 | # endif /* CFG_FLASH_CHECKSUM */ |
fe8c2806 WD |
718 | } else { |
719 | puts (failed); | |
720 | hang (); | |
721 | } | |
722 | ||
723 | bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */ | |
724 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ | |
7e780369 WD |
725 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
726 | /* flash mapped at end of memory map */ | |
727 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
0cb61d7d | 728 | # elif CFG_MONITOR_BASE == CFG_FLASH_BASE |
3b57fe0a | 729 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 730 | # else |
fe8c2806 | 731 | bd->bi_flashoffset = 0; |
0cb61d7d WD |
732 | # endif |
733 | #else /* CFG_NO_FLASH */ | |
fe8c2806 WD |
734 | |
735 | bd->bi_flashsize = 0; | |
736 | bd->bi_flashstart = 0; | |
737 | bd->bi_flashoffset = 0; | |
738 | #endif /* !CFG_NO_FLASH */ | |
739 | ||
740 | WATCHDOG_RESET (); | |
741 | ||
742 | /* initialize higher level parts of CPU like time base and timers */ | |
743 | cpu_init_r (); | |
744 | ||
745 | WATCHDOG_RESET (); | |
746 | ||
747 | /* initialize malloc() area */ | |
748 | mem_malloc_init (); | |
749 | malloc_bin_reloc (); | |
750 | ||
751 | #ifdef CONFIG_SPI | |
752 | # if !defined(CFG_ENV_IS_IN_EEPROM) | |
753 | spi_init_f (); | |
754 | # endif | |
755 | spi_init_r (); | |
756 | #endif | |
757 | ||
758 | /* relocate environment function pointers etc. */ | |
759 | env_relocate (); | |
760 | ||
761 | /* | |
762 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
763 | * We do this here, where we have "normal" access to the |
764 | * environment; we used to do this still running from ROM, | |
765 | * where had to use getenv_r(), which can be pretty slow when | |
766 | * the environment is in EEPROM. | |
fe8c2806 | 767 | */ |
7abf0c58 WD |
768 | |
769 | #if defined(CFG_EXTBDINFO) | |
770 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) | |
771 | #if defined(CONFIG_I2CFAST) | |
772 | /* | |
773 | * set bi_iic_fast for linux taking environment variable | |
774 | * "i2cfast" into account | |
775 | */ | |
776 | { | |
777 | char *s = getenv ("i2cfast"); | |
778 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
779 | bd->bi_iic_fast[0] = 1; | |
780 | bd->bi_iic_fast[1] = 1; | |
781 | } else { | |
782 | bd->bi_iic_fast[0] = 0; | |
783 | bd->bi_iic_fast[1] = 0; | |
784 | } | |
785 | } | |
786 | #else | |
787 | bd->bi_iic_fast[0] = 0; | |
788 | bd->bi_iic_fast[1] = 0; | |
789 | #endif /* CONFIG_I2CFAST */ | |
790 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
791 | #endif /* CFG_EXTBDINFO */ | |
792 | ||
fe8c2806 WD |
793 | s = getenv ("ethaddr"); |
794 | #if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210) | |
795 | if (s == NULL) | |
796 | board_get_enetaddr (bd->bi_enetaddr); | |
797 | else | |
798 | #endif | |
799 | for (i = 0; i < 6; ++i) { | |
800 | bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
801 | if (s) | |
802 | s = (*e) ? e + 1 : e; | |
803 | } | |
804 | #ifdef CONFIG_HERMES | |
805 | if ((gd->board_type >> 16) == 2) | |
806 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
807 | else | |
808 | bd->bi_ethspeed = 0xFFFF; | |
809 | #endif | |
810 | ||
811 | #ifdef CONFIG_NX823 | |
812 | load_sernum_ethaddr (); | |
813 | #endif | |
814 | ||
e2ffd59b | 815 | #ifdef CONFIG_HAS_ETH1 |
fe8c2806 WD |
816 | /* handle the 2nd ethernet address */ |
817 | ||
818 | s = getenv ("eth1addr"); | |
819 | ||
820 | for (i = 0; i < 6; ++i) { | |
821 | bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
822 | if (s) | |
823 | s = (*e) ? e + 1 : e; | |
824 | } | |
825 | #endif | |
e2ffd59b | 826 | #ifdef CONFIG_HAS_ETH2 |
fe8c2806 WD |
827 | /* handle the 3rd ethernet address */ |
828 | ||
829 | s = getenv ("eth2addr"); | |
b79316f2 | 830 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
831 | if (s == NULL) |
832 | board_get_enetaddr(bd->bi_enet2addr); | |
833 | else | |
834 | #endif | |
fe8c2806 WD |
835 | for (i = 0; i < 6; ++i) { |
836 | bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
837 | if (s) | |
838 | s = (*e) ? e + 1 : e; | |
839 | } | |
840 | #endif | |
841 | ||
e2ffd59b | 842 | #ifdef CONFIG_HAS_ETH3 |
ba56f625 WD |
843 | /* handle 4th ethernet address */ |
844 | s = getenv("eth3addr"); | |
b79316f2 | 845 | #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF) |
ba56f625 WD |
846 | if (s == NULL) |
847 | board_get_enetaddr(bd->bi_enet3addr); | |
848 | else | |
849 | #endif | |
850 | for (i = 0; i < 6; ++i) { | |
851 | bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0; | |
852 | if (s) | |
853 | s = (*e) ? e + 1 : e; | |
854 | } | |
855 | #endif | |
fe8c2806 WD |
856 | |
857 | #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \ | |
02b11f8e | 858 | defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X) |
fe8c2806 WD |
859 | load_sernum_ethaddr (); |
860 | #endif | |
861 | /* IP Address */ | |
862 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
863 | ||
864 | WATCHDOG_RESET (); | |
865 | ||
979bdbc7 | 866 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
867 | /* |
868 | * Do pci configuration | |
869 | */ | |
870 | pci_init (); | |
871 | #endif | |
872 | ||
873 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
874 | /* Initialize devices */ | |
875 | devices_init (); | |
876 | ||
27b207fd WD |
877 | /* Initialize the jump table for applications */ |
878 | jumptable_init (); | |
fe8c2806 WD |
879 | |
880 | /* Initialize the console (after the relocation and devices init) */ | |
881 | console_init_r (); | |
fe8c2806 WD |
882 | |
883 | #if defined(CONFIG_CCM) || \ | |
884 | defined(CONFIG_COGENT) || \ | |
885 | defined(CONFIG_CPCI405) || \ | |
886 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 887 | defined(CONFIG_KUP4K) || \ |
0608e04d | 888 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
889 | defined(CONFIG_LWMON) || \ |
890 | defined(CONFIG_PCU_E) || \ | |
891 | defined(CONFIG_W7O) || \ | |
892 | defined(CONFIG_MISC_INIT_R) | |
893 | /* miscellaneous platform dependent initialisations */ | |
894 | misc_init_r (); | |
895 | #endif | |
896 | ||
897 | #ifdef CONFIG_HERMES | |
898 | if (bd->bi_ethspeed != 0xFFFF) | |
899 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
900 | #endif | |
901 | ||
902 | #if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \ | |
903 | defined(CONFIG_CCM) || \ | |
3bac3513 | 904 | defined(CONFIG_ELPT860) || \ |
fe8c2806 WD |
905 | defined(CONFIG_EP8260) || \ |
906 | defined(CONFIG_IP860) || \ | |
907 | defined(CONFIG_IVML24) || \ | |
908 | defined(CONFIG_IVMS8) || \ | |
fe8c2806 | 909 | defined(CONFIG_MPC8260ADS) || \ |
5d232d0e | 910 | defined(CONFIG_MPC8266ADS) || \ |
42d1f039 | 911 | defined(CONFIG_MPC8560ADS) || \ |
fe8c2806 WD |
912 | defined(CONFIG_PCU_E) || \ |
913 | defined(CONFIG_RPXSUPER) || \ | |
7abf0c58 | 914 | defined(CONFIG_STXGP3) || \ |
ba91e26a WD |
915 | defined(CONFIG_SPD823TS) || \ |
916 | defined(CONFIG_RESET_PHY_R) ) | |
fe8c2806 WD |
917 | |
918 | WATCHDOG_RESET (); | |
9d2b18a0 | 919 | debug ("Reset Ethernet PHY\n"); |
fe8c2806 WD |
920 | reset_phy (); |
921 | #endif | |
922 | ||
923 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
924 | WATCHDOG_RESET (); | |
925 | puts ("KGDB: "); | |
926 | kgdb_init (); | |
927 | #endif | |
928 | ||
9d2b18a0 | 929 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
930 | |
931 | /* | |
932 | * Enable Interrupts | |
933 | */ | |
934 | interrupt_init (); | |
935 | ||
936 | /* Must happen after interrupts are initialized since | |
937 | * an irq handler gets installed | |
938 | */ | |
42dfe7a1 | 939 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
940 | serial_buffered_init(); |
941 | #endif | |
942 | ||
943 | #ifdef CONFIG_STATUS_LED | |
944 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); | |
945 | #endif | |
946 | ||
947 | udelay (20); | |
948 | ||
949 | set_timer (0); | |
950 | ||
fe8c2806 WD |
951 | /* Initialize from environment */ |
952 | if ((s = getenv ("loadaddr")) != NULL) { | |
953 | load_addr = simple_strtoul (s, NULL, 16); | |
954 | } | |
955 | #if (CONFIG_COMMANDS & CFG_CMD_NET) | |
956 | if ((s = getenv ("bootfile")) != NULL) { | |
957 | copy_filename (BootFile, s, sizeof (BootFile)); | |
958 | } | |
959 | #endif /* CFG_CMD_NET */ | |
960 | ||
961 | WATCHDOG_RESET (); | |
962 | ||
963 | #if (CONFIG_COMMANDS & CFG_CMD_SCSI) | |
964 | WATCHDOG_RESET (); | |
965 | puts ("SCSI: "); | |
966 | scsi_init (); | |
967 | #endif | |
968 | ||
969 | #if (CONFIG_COMMANDS & CFG_CMD_DOC) | |
970 | WATCHDOG_RESET (); | |
971 | puts ("DOC: "); | |
972 | doc_init (); | |
973 | #endif | |
974 | ||
bedc4970 SR |
975 | #if (CONFIG_COMMANDS & CFG_CMD_NAND) |
976 | WATCHDOG_RESET (); | |
b7eaad81 | 977 | puts ("NAND: "); |
bedc4970 SR |
978 | nand_init(); /* go init the NAND */ |
979 | #endif | |
980 | ||
fe8c2806 WD |
981 | #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) |
982 | WATCHDOG_RESET (); | |
983 | puts ("Net: "); | |
984 | eth_initialize (bd); | |
985 | #endif | |
986 | ||
987 | #ifdef CONFIG_POST | |
6dff5529 | 988 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
989 | #endif |
990 | ||
991 | #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE) | |
992 | WATCHDOG_RESET (); | |
993 | puts ("PCMCIA:"); | |
994 | pcmcia_init (); | |
995 | #endif | |
996 | ||
997 | #if (CONFIG_COMMANDS & CFG_CMD_IDE) | |
998 | WATCHDOG_RESET (); | |
999 | # ifdef CONFIG_IDE_8xx_PCCARD | |
1000 | puts ("PCMCIA:"); | |
1001 | # else | |
1002 | puts ("IDE: "); | |
1003 | #endif | |
1004 | ide_init (); | |
1005 | #endif /* CFG_CMD_IDE */ | |
1006 | ||
1007 | #ifdef CONFIG_LAST_STAGE_INIT | |
1008 | WATCHDOG_RESET (); | |
1009 | /* | |
1010 | * Some parts can be only initialized if all others (like | |
1011 | * Interrupts) are up and running (i.e. the PC-style ISA | |
1012 | * keyboard). | |
1013 | */ | |
1014 | last_stage_init (); | |
1015 | #endif | |
1016 | ||
1017 | #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) | |
1018 | WATCHDOG_RESET (); | |
1019 | bedbug_init (); | |
1020 | #endif | |
1021 | ||
228f29ac | 1022 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
1023 | /* |
1024 | * Export available size of memory for Linux, | |
1025 | * taking into account the protected RAM at top of memory | |
1026 | */ | |
1027 | { | |
1028 | ulong pram; | |
fe8c2806 | 1029 | uchar memsz[32]; |
228f29ac WD |
1030 | #ifdef CONFIG_PRAM |
1031 | char *s; | |
fe8c2806 WD |
1032 | |
1033 | if ((s = getenv ("pram")) != NULL) { | |
1034 | pram = simple_strtoul (s, NULL, 10); | |
1035 | } else { | |
1036 | pram = CONFIG_PRAM; | |
1037 | } | |
228f29ac WD |
1038 | #else |
1039 | pram=0; | |
1040 | #endif | |
1041 | #ifdef CONFIG_LOGBUFFER | |
1042 | /* Also take the logbuffer into account (pram is in kB) */ | |
1043 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
1044 | #endif | |
fe8c2806 WD |
1045 | sprintf (memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1046 | setenv ("mem", memsz); | |
1047 | } | |
1048 | #endif | |
1049 | ||
1c43771b WD |
1050 | #ifdef CONFIG_PS2KBD |
1051 | puts ("PS/2: "); | |
1052 | kbd_init(); | |
1053 | #endif | |
1054 | ||
4532cb69 WD |
1055 | #ifdef CONFIG_MODEM_SUPPORT |
1056 | { | |
1057 | extern int do_mdm_init; | |
1058 | do_mdm_init = gd->do_mdm_init; | |
1059 | } | |
1060 | #endif | |
1061 | ||
fe8c2806 WD |
1062 | /* Initialization complete - start the monitor */ |
1063 | ||
1064 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1065 | for (;;) { | |
1066 | WATCHDOG_RESET (); | |
1067 | main_loop (); | |
1068 | } | |
1069 | ||
1070 | /* NOTREACHED - no way out of command loop except booting */ | |
1071 | } | |
1072 | ||
1073 | void hang (void) | |
1074 | { | |
1075 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a WD |
1076 | #ifdef CONFIG_SHOW_BOOT_PROGRESS |
1077 | show_boot_progress(-30); | |
1078 | #endif | |
fe8c2806 WD |
1079 | for (;;); |
1080 | } | |
1081 | ||
4532cb69 WD |
1082 | #ifdef CONFIG_MODEM_SUPPORT |
1083 | /* called from main loop (common/main.c) */ | |
1084 | extern void dbg(const char *fmt, ...); | |
1085 | int mdm_init (void) | |
1086 | { | |
1087 | char env_str[16]; | |
1088 | char *init_str; | |
1089 | int i; | |
1090 | extern char console_buffer[]; | |
1091 | static inline void mdm_readline(char *buf, int bufsiz); | |
1092 | extern void enable_putc(void); | |
1093 | extern int hwflow_onoff(int); | |
1094 | ||
1095 | enable_putc(); /* enable serial_putc() */ | |
1096 | ||
1097 | #ifdef CONFIG_HWFLOW | |
1098 | init_str = getenv("mdm_flow_control"); | |
1099 | if (init_str && (strcmp(init_str, "rts/cts") == 0)) | |
1100 | hwflow_onoff (1); | |
1101 | else | |
1102 | hwflow_onoff(-1); | |
1103 | #endif | |
1104 | ||
1105 | for (i = 1;;i++) { | |
1106 | sprintf(env_str, "mdm_init%d", i); | |
1107 | if ((init_str = getenv(env_str)) != NULL) { | |
1108 | serial_puts(init_str); | |
1109 | serial_puts("\n"); | |
1110 | for(;;) { | |
1111 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1112 | dbg("ini%d: [%s]", i, console_buffer); | |
1113 | ||
1114 | if ((strcmp(console_buffer, "OK") == 0) || | |
1115 | (strcmp(console_buffer, "ERROR") == 0)) { | |
1116 | dbg("ini%d: cmd done", i); | |
1117 | break; | |
1118 | } else /* in case we are originating call ... */ | |
1119 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1120 | dbg("ini%d: connect", i); | |
1121 | return 0; | |
1122 | } | |
1123 | } | |
1124 | } else | |
1125 | break; /* no init string - stop modem init */ | |
1126 | ||
1127 | udelay(100000); | |
1128 | } | |
1129 | ||
1130 | udelay(100000); | |
1131 | ||
1132 | /* final stage - wait for connect */ | |
1133 | for(;i > 1;) { /* if 'i' > 1 - wait for connection | |
1134 | message from modem */ | |
1135 | mdm_readline(console_buffer, CFG_CBSIZE); | |
1136 | dbg("ini_f: [%s]", console_buffer); | |
1137 | if (strncmp(console_buffer, "CONNECT", 7) == 0) { | |
1138 | dbg("ini_f: connected"); | |
1139 | return 0; | |
1140 | } | |
1141 | } | |
1142 | ||
1143 | return 0; | |
1144 | } | |
1145 | ||
1146 | /* 'inline' - We have to do it fast */ | |
1147 | static inline void mdm_readline(char *buf, int bufsiz) | |
1148 | { | |
1149 | char c; | |
1150 | char *p; | |
1151 | int n; | |
1152 | ||
1153 | n = 0; | |
1154 | p = buf; | |
1155 | for(;;) { | |
1156 | c = serial_getc(); | |
1157 | ||
1158 | /* dbg("(%c)", c); */ | |
1159 | ||
1160 | switch(c) { | |
1161 | case '\r': | |
1162 | break; | |
1163 | case '\n': | |
1164 | *p = '\0'; | |
1165 | return; | |
1166 | ||
1167 | default: | |
1168 | if(n++ > bufsiz) { | |
1169 | *p = '\0'; | |
1170 | return; /* sanity check */ | |
1171 | } | |
1172 | *p = c; | |
1173 | p++; | |
1174 | break; | |
1175 | } | |
1176 | } | |
1177 | } | |
1178 | #endif | |
1179 | ||
fe8c2806 WD |
1180 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1181 | /* | |
1182 | * Pointer to initial global data area | |
1183 | * | |
1184 | * Here we initialize it. | |
1185 | */ | |
1186 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1187 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
1188 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); | |
1189 | #endif /* 0 */ | |
1190 | ||
1191 | /************************************************************************/ |