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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
baefb63a | 2 | /* |
d8acc9de | 3 | * Copyright (C) 2010-2018 Freescale Semiconductor, Inc. |
baefb63a | 4 | * |
d8acc9de | 5 | * Configuration settings for the virtual mx6memcal board. |
baefb63a EN |
6 | */ |
7 | ||
8 | #ifndef __CONFIG_H | |
9 | #define __CONFIG_H | |
10 | ||
11 | /* SPL */ | |
12 | ||
13 | #include "mx6_common.h" | |
14 | #include "imx6_spl.h" | |
15 | ||
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16 | #ifdef CONFIG_SERIAL_CONSOLE_UART1 |
17 | #if defined(CONFIG_MX6SL) | |
18 | #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR | |
19 | #else | |
20 | #define CONFIG_MXC_UART_BASE UART1_BASE | |
21 | #endif | |
22 | #elif defined(CONFIG_SERIAL_CONSOLE_UART2) | |
23 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
24 | #else | |
25 | #error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx) | |
26 | #endif | |
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27 | |
28 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16) | |
29 | ||
30 | /* Physical Memory Map */ | |
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31 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
32 | ||
33 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
34 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
35 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
36 | ||
37 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
38 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
39 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
40 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
41 | ||
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42 | #define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI |
43 | ||
baefb63a | 44 | #endif /* __CONFIG_H */ |