[J-u-boot.git] / include / configs / sh7753evb.h

/*
 * Configuation settings for the sh7753evb board
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __SH7753EVB_H
#define __SH7753EVB_H

#undef DEBUG
#define CONFIG_CPU_SH7753	1
#define CONFIG_SH7753EVB	1

#define CONFIG_SYS_TEXT_BASE	0x5ff80000
#define CONFIG_SYS_LDSCRIPT	"board/renesas/sh7753evb/u-boot.lds"

#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SF
#define CONFIG_CMD_MD5SUM
#define CONFIG_MD5
#define CONFIG_CMD_MMC
#define CONFIG_CMD_EXT2
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION

#define CONFIG_BAUDRATE		115200
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"

#define CONFIG_VERSION_VARIABLE
#undef	CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/* MEMORY */
#define SH7753EVB_SDRAM_BASE		(0x40000000)
#define SH7753EVB_SDRAM_SIZE		(512 * 1024 * 1024)

#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_PBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		512
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE	1
#define CONFIG_CONS_SCIF2	1
#undef	CONFIG_SYS_CONSOLE_INFO_QUIET
#undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE

#define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
					 480 * 1024 * 1024)
#undef	CONFIG_SYS_ALT_MEMTEST
#undef	CONFIG_SYS_MEMTEST_SCRATCH
#undef	CONFIG_SYS_LOADS_BAUD_CHANGE

#define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
#define CONFIG_SYS_SDRAM_SIZE		(SH7753EVB_SDRAM_SIZE)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
					 128 * 1024 * 1024)

#define CONFIG_SYS_MONITOR_BASE		0x00000000
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
#define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)

/* FLASH */
#define CONFIG_SYS_NO_FLASH

/* Ether */
#define CONFIG_SH_ETHER			1
#define CONFIG_SH_ETHER_USE_PORT	0
#define CONFIG_SH_ETHER_PHY_ADDR	18
#define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
#define CONFIG_SH_ETHER_USE_GETHER	1
#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
#define CONFIG_PHY_VITESSE

#define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
#define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
#define SH7753EVB_ETHERNET_MAC_BASE	SH7753EVB_ETHERNET_MAC_BASE_SPI
#define SH7753EVB_ETHERNET_MAC_SIZE	17
#define SH7753EVB_ETHERNET_NUM_CH	2
#define CONFIG_BOARD_LATE_INIT

/* SPI */
#define CONFIG_SH_SPI			1
#define CONFIG_SH_SPI_BASE		0xfe002000
#define CONFIG_SPI_FLASH_STMICRO	1
#define CONFIG_SPI_FLASH_MACRONIX	1

/* MMCIF */
#define CONFIG_MMC			1
#define CONFIG_GENERIC_MMC		1
#define CONFIG_SH_MMCIF			1
#define CONFIG_SH_MMCIF_ADDR		0xffcb0000
#define CONFIG_SH_MMCIF_CLK		48000000

/* ENV setting */
#define CONFIG_ENV_IS_EMBEDDED
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_ADDR		(0x00080000)
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
#define CONFIG_EXTRA_ENV_SETTINGS				\
		"netboot=bootp; bootm\0"

/* Board Clock */
#define CONFIG_SYS_CLK_FREQ	48000000
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV	4
#endif	/* __SH7753EVB_H */
Commit	Line	Data
320cf350 YS	1	/*
	2	* Configuation settings for the sh7753evb board
	3	*
	4	* Copyright (C) 2012 Renesas Solutions Corp.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __SH7753EVB_H
	10	#define __SH7753EVB_H
	11
	12	#undef DEBUG
320cf350 YS	13	#define CONFIG_CPU_SH7753 1
	14	#define CONFIG_SH7753EVB 1
	15
	16	#define CONFIG_SYS_TEXT_BASE 0x5ff80000
	17	#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds"
	18
320cf350 YS	19	#define CONFIG_CMD_MII
320cf350 YS	20	#define CONFIG_CMD_PING
320cf350 YS	21	#define CONFIG_CMD_DFL
	22	#define CONFIG_CMD_SDRAM
	23	#define CONFIG_CMD_SF
320cf350 YS	24	#define CONFIG_CMD_MD5SUM
320cf350 YS	25	#define CONFIG_MD5
320cf350 YS	26	#define CONFIG_CMD_MMC
	27	#define CONFIG_CMD_EXT2
	28	#define CONFIG_DOS_PARTITION
	29	#define CONFIG_MAC_PARTITION
	30
	31	#define CONFIG_BAUDRATE 115200
	32	#define CONFIG_BOOTDELAY 3
	33	#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
	34
	35	#define CONFIG_VERSION_VARIABLE
	36	#undef CONFIG_SHOW_BOOT_PROGRESS
	37	#define CONFIG_CMDLINE_EDITING
	38	#define CONFIG_AUTO_COMPLETE
	39
	40	/* MEMORY */
	41	#define SH7753EVB_SDRAM_BASE (0x40000000)
	42	#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
	43
	44	#define CONFIG_SYS_LONGHELP
	45	#define CONFIG_SYS_CBSIZE 256
	46	#define CONFIG_SYS_PBSIZE 256
	47	#define CONFIG_SYS_MAXARGS 16
	48	#define CONFIG_SYS_BARGSIZE 512
	49	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
	50
	51	/* SCIF */
	52	#define CONFIG_SCIF_CONSOLE 1
	53	#define CONFIG_CONS_SCIF2 1
	54	#undef CONFIG_SYS_CONSOLE_INFO_QUIET
	55	#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	56	#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
	57
	58	#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
	59	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
	60	480 * 1024 * 1024)
	61	#undef CONFIG_SYS_ALT_MEMTEST
	62	#undef CONFIG_SYS_MEMTEST_SCRATCH
	63	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	64
	65	#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
	66	#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE)
	67	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
	68	128 * 1024 * 1024)
	69
	70	#define CONFIG_SYS_MONITOR_BASE 0x00000000
	71	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
	72	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
	73	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
	74
	75	/* FLASH */
	76	#define CONFIG_SYS_NO_FLASH
	77
	78	/* Ether */
	79	#define CONFIG_SH_ETHER 1
	80	#define CONFIG_SH_ETHER_USE_PORT 0
	81	#define CONFIG_SH_ETHER_PHY_ADDR 18
	82	#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
	83	#define CONFIG_SH_ETHER_USE_GETHER 1
	84	#define CONFIG_PHYLIB
	85	#define CONFIG_BITBANGMII
	86	#define CONFIG_BITBANGMII_MULTI
	87	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
	88	#define CONFIG_PHY_VITESSE
	89
90	#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000
91	#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024)
92	#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI
93	#define SH7753EVB_ETHERNET_MAC_SIZE 17
94	#define SH7753EVB_ETHERNET_NUM_CH 2
95	#define CONFIG_BOARD_LATE_INIT
96
97	/* SPI */
98	#define CONFIG_SH_SPI 1
99	#define CONFIG_SH_SPI_BASE 0xfe002000
320cf350 YS	100	#define CONFIG_SPI_FLASH_STMICRO 1
	101	#define CONFIG_SPI_FLASH_MACRONIX 1
	102
	103	/* MMCIF */
	104	#define CONFIG_MMC 1
	105	#define CONFIG_GENERIC_MMC 1
	106	#define CONFIG_SH_MMCIF 1
	107	#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
	108	#define CONFIG_SH_MMCIF_CLK 48000000
	109
	110	/* ENV setting */
	111	#define CONFIG_ENV_IS_EMBEDDED
	112	#define CONFIG_ENV_IS_IN_SPI_FLASH
	113	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	114	#define CONFIG_ENV_ADDR (0x00080000)
	115	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
	116	#define CONFIG_ENV_OVERWRITE 1
	117	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	118	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
	119	#define CONFIG_EXTRA_ENV_SETTINGS \
	120	"netboot=bootp; bootm\0"
	121
	122	/* Board Clock */
	123	#define CONFIG_SYS_CLK_FREQ 48000000
	124	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
	125	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
	126	#define CONFIG_SYS_TMU_CLK_DIV 4
	127	#endif /* __SH7753EVB_H */