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c91915e9 TR |
1 | /* |
2 | * (C) Copyright 2010,2011 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
1cbdf2d7 | 4 | * (C) Copyright 2011-2012 |
c91915e9 TR |
5 | * Avionic Design GmbH <www.avionic-design.de> |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
c91915e9 TR |
8 | */ |
9 | ||
10 | #ifndef __CONFIG_H | |
11 | #define __CONFIG_H | |
12 | ||
00a2749d | 13 | #include "tegra20-common.h" |
c91915e9 TR |
14 | |
15 | /* High-level configuration options */ | |
66b796a5 | 16 | #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" |
c91915e9 TR |
17 | |
18 | /* Board-specific serial config */ | |
29f3e3f2 | 19 | #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ |
c91915e9 TR |
20 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
21 | ||
c91915e9 TR |
22 | /* SD/MMC */ |
23 | #define CONFIG_MMC | |
24 | #define CONFIG_GENERIC_MMC | |
3f82d89d | 25 | #define CONFIG_TEGRA_MMC |
c91915e9 TR |
26 | #define CONFIG_CMD_MMC |
27 | ||
9dc9caf4 TR |
28 | /* NAND support */ |
29 | #define CONFIG_CMD_NAND | |
30 | #define CONFIG_TEGRA_NAND | |
31 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
32 | ||
33 | /* Environment in NAND, aligned to start of last sector */ | |
34 | #define CONFIG_ENV_IS_IN_NAND | |
35 | #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ | |
36 | ||
1cbdf2d7 TR |
37 | /* USB host support */ |
38 | #define CONFIG_USB_EHCI | |
39 | #define CONFIG_USB_EHCI_TEGRA | |
40 | #define CONFIG_USB_STORAGE | |
1cbdf2d7 TR |
41 | |
42 | /* USB networking support */ | |
43 | #define CONFIG_USB_HOST_ETHER | |
44 | #define CONFIG_USB_ETHER_SMSC95XX | |
45 | ||
46 | /* General networking support */ | |
1cbdf2d7 | 47 | |
7c3f386d | 48 | /* LCD support */ |
7c3f386d TR |
49 | #define CONFIG_SYS_WHITE_ON_BLACK |
50 | ||
29f3e3f2 | 51 | #include "tegra-common-post.h" |
bea2674c | 52 | |
c91915e9 | 53 | #endif /* __CONFIG_H */ |