[J-u-boot.git] / drivers / pinctrl / mscc / pinctrl-serval.c

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Microsemi SoCs pinctrl driver
 *
 * Author: <[email protected]>
 * Copyright (c) 2019 Microsemi Corporation
 */

#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/pinctrl.h>
#include <dm/root.h>
#include <errno.h>
#include <fdtdec.h>
#include <linux/io.h>
#include <asm/gpio.h>
#include <asm/system.h>
#include "mscc-common.h"

enum {
	FUNC_NONE,
	FUNC_GPIO,
	FUNC_IRQ0,
	FUNC_IRQ1,
	FUNC_MIIM1,
	FUNC_PCI_WAKE,
	FUNC_PTP0,
	FUNC_PTP1,
	FUNC_PTP2,
	FUNC_PTP3,
	FUNC_PWM,
	FUNC_RECO_CLK0,
	FUNC_RECO_CLK1,
	FUNC_SFP0,
	FUNC_SFP1,
	FUNC_SFP2,
	FUNC_SFP3,
	FUNC_SFP4,
	FUNC_SFP5,
	FUNC_SFP6,
	FUNC_SFP7,
	FUNC_SFP8,
	FUNC_SFP9,
	FUNC_SFP10,
	FUNC_SIO,
	FUNC_SI,
	FUNC_TACHO,
	FUNC_TWI,
	FUNC_TWI_SCL_M,
	FUNC_UART,
	FUNC_UART2,
	FUNC_MD,
	FUNC_PTP1588,
	FUNC_MAX
};

static char * const serval_function_names[] = {
	[FUNC_NONE]		= "none",
	[FUNC_GPIO]		= "gpio",
	[FUNC_IRQ0]		= "irq0",
	[FUNC_IRQ1]		= "irq1",
	[FUNC_MIIM1]		= "miim1",
	[FUNC_PCI_WAKE]		= "pci_wake",
	[FUNC_PTP0]		= "ptp0",
	[FUNC_PTP1]		= "ptp1",
	[FUNC_PTP2]		= "ptp2",
	[FUNC_PTP3]		= "ptp3",
	[FUNC_PWM]		= "pwm",
	[FUNC_RECO_CLK0]	= "reco_clk0",
	[FUNC_RECO_CLK1]	= "reco_clk1",
	[FUNC_SFP0]		= "sfp0",
	[FUNC_SFP1]		= "sfp1",
	[FUNC_SFP2]		= "sfp2",
	[FUNC_SFP3]		= "sfp3",
	[FUNC_SFP4]		= "sfp4",
	[FUNC_SFP5]		= "sfp5",
	[FUNC_SFP6]		= "sfp6",
	[FUNC_SFP7]		= "sfp7",
	[FUNC_SFP8]		= "sfp8",
	[FUNC_SFP9]		= "sfp9",
	[FUNC_SFP10]		= "sfp10",
	[FUNC_SIO]		= "sio",
	[FUNC_SI]		= "si",
	[FUNC_TACHO]		= "tacho",
	[FUNC_TWI]		= "twi",
	[FUNC_TWI_SCL_M]	= "twi_scl_m",
	[FUNC_UART]		= "uart",
	[FUNC_UART2]		= "uart2",
	[FUNC_MD]		= "md",
	[FUNC_PTP1588]		= "1588",
};

MSCC_P(0,  SIO,       NONE,      NONE);
MSCC_P(1,  SIO,       NONE,      NONE);
MSCC_P(2,  SIO,       NONE,      NONE);
MSCC_P(3,  SIO,       NONE,      NONE);
MSCC_P(4,  TACHO,     NONE,      NONE);
MSCC_P(5,  PWM,       NONE,      NONE);
MSCC_P(6,  TWI,       NONE,      NONE);
MSCC_P(7,  TWI,       NONE,      NONE);
MSCC_P(8,  SI,        NONE,      NONE);
MSCC_P(9,  SI,        MD,        NONE);
MSCC_P(10, SI,        MD,        NONE);
MSCC_P(11, SFP0,      MD,        TWI_SCL_M);
MSCC_P(12, SFP1,      MD,        TWI_SCL_M);
MSCC_P(13, SFP2,      UART2,     TWI_SCL_M);
MSCC_P(14, SFP3,      UART2,     TWI_SCL_M);
MSCC_P(15, SFP4,      PTP1588,   TWI_SCL_M);
MSCC_P(16, SFP5,      PTP1588,   TWI_SCL_M);
MSCC_P(17, SFP6,      PCI_WAKE,  TWI_SCL_M);
MSCC_P(18, SFP7,      NONE,      TWI_SCL_M);
MSCC_P(19, SFP8,      NONE,      TWI_SCL_M);
MSCC_P(20, SFP9,      NONE,      TWI_SCL_M);
MSCC_P(21, SFP10,     NONE,      TWI_SCL_M);
MSCC_P(22, NONE,      NONE,      NONE);
MSCC_P(23, NONE,      NONE,      NONE);
MSCC_P(24, NONE,      NONE,      NONE);
MSCC_P(25, NONE,      NONE,      NONE);
MSCC_P(26, UART,      NONE,      NONE);
MSCC_P(27, UART,      NONE,      NONE);
MSCC_P(28, IRQ0,      NONE,      NONE);
MSCC_P(29, IRQ1,      NONE,      NONE);
MSCC_P(30, PTP1588,   NONE,      NONE);
MSCC_P(31, PTP1588,   NONE,      NONE);

#define SERVAL_PIN(n) {						\
	.name = "GPIO_"#n,					\
	.drv_data = &mscc_pin_##n				\
}

static const struct mscc_pin_data serval_pins[] = {
	SERVAL_PIN(0),
	SERVAL_PIN(1),
	SERVAL_PIN(2),
	SERVAL_PIN(3),
	SERVAL_PIN(4),
	SERVAL_PIN(5),
	SERVAL_PIN(6),
	SERVAL_PIN(7),
	SERVAL_PIN(8),
	SERVAL_PIN(9),
	SERVAL_PIN(10),
	SERVAL_PIN(11),
	SERVAL_PIN(12),
	SERVAL_PIN(13),
	SERVAL_PIN(14),
	SERVAL_PIN(15),
	SERVAL_PIN(16),
	SERVAL_PIN(17),
	SERVAL_PIN(18),
	SERVAL_PIN(19),
	SERVAL_PIN(20),
	SERVAL_PIN(21),
	SERVAL_PIN(22),
	SERVAL_PIN(23),
	SERVAL_PIN(24),
	SERVAL_PIN(25),
	SERVAL_PIN(26),
	SERVAL_PIN(27),
	SERVAL_PIN(28),
	SERVAL_PIN(29),
	SERVAL_PIN(30),
	SERVAL_PIN(31),
};

static const unsigned long serval_gpios[] = {
	[MSCC_GPIO_OUT_SET] = 0x00,
	[MSCC_GPIO_OUT_CLR] = 0x04,
	[MSCC_GPIO_OUT] = 0x08,
	[MSCC_GPIO_IN] = 0x0c,
	[MSCC_GPIO_OE] = 0x10,
	[MSCC_GPIO_INTR] = 0x14,
	[MSCC_GPIO_INTR_ENA] = 0x18,
	[MSCC_GPIO_INTR_IDENT] = 0x1c,
	[MSCC_GPIO_ALT0] = 0x20,
	[MSCC_GPIO_ALT1] = 0x24,
};

static int serval_gpio_probe(struct udevice *dev)
{
	struct gpio_dev_priv *uc_priv;

	uc_priv = dev_get_uclass_priv(dev);
	uc_priv->bank_name = "serval-gpio";
	uc_priv->gpio_count = ARRAY_SIZE(serval_pins);

	return 0;
}

static struct driver serval_gpio_driver = {
	.name	= "serval-gpio",
	.id	= UCLASS_GPIO,
	.probe	= serval_gpio_probe,
	.ops	= &mscc_gpio_ops,
};

static int serval_pinctrl_probe(struct udevice *dev)
{
	int ret;

	ret = mscc_pinctrl_probe(dev, FUNC_MAX, serval_pins,
				 ARRAY_SIZE(serval_pins),
				 serval_function_names,
				 serval_gpios);

	if (ret)
		return ret;

	ret = device_bind(dev, &serval_gpio_driver, "serval-gpio", NULL,
			  dev_ofnode(dev), NULL);

	if (ret)
		return ret;

	return 0;
}

static const struct udevice_id serval_pinctrl_of_match[] = {
	{ .compatible = "mscc,serval-pinctrl" },
	{},
};

U_BOOT_DRIVER(serval_pinctrl) = {
	.name = "serval-pinctrl",
	.id = UCLASS_PINCTRL,
	.of_match = of_match_ptr(serval_pinctrl_of_match),
	.probe = serval_pinctrl_probe,
	.priv_auto	= sizeof(struct mscc_pinctrl),
	.ops = &mscc_pinctrl_ops,
};
Commit	Line	Data
5c31ce36 HV	1	// SPDX-License-Identifier: (GPL-2.0 OR MIT)
	2	/*
	3	* Microsemi SoCs pinctrl driver
	4	*
	5	* Author: <[email protected]>
	6	* Copyright (c) 2019 Microsemi Corporation
	7	*/
	8
5c31ce36 HV	9	#include <config.h>
	10	#include <dm.h>
	11	#include <dm/device-internal.h>
	12	#include <dm/lists.h>
	13	#include <dm/pinctrl.h>
	14	#include <dm/root.h>
	15	#include <errno.h>
	16	#include <fdtdec.h>
	17	#include <linux/io.h>
	18	#include <asm/gpio.h>
	19	#include <asm/system.h>
	20	#include "mscc-common.h"
	21
	22	enum {
	23	FUNC_NONE,
	24	FUNC_GPIO,
	25	FUNC_IRQ0,
	26	FUNC_IRQ1,
	27	FUNC_MIIM1,
	28	FUNC_PCI_WAKE,
	29	FUNC_PTP0,
	30	FUNC_PTP1,
	31	FUNC_PTP2,
	32	FUNC_PTP3,
	33	FUNC_PWM,
	34	FUNC_RECO_CLK0,
	35	FUNC_RECO_CLK1,
	36	FUNC_SFP0,
	37	FUNC_SFP1,
	38	FUNC_SFP2,
	39	FUNC_SFP3,
	40	FUNC_SFP4,
	41	FUNC_SFP5,
	42	FUNC_SFP6,
	43	FUNC_SFP7,
	44	FUNC_SFP8,
	45	FUNC_SFP9,
	46	FUNC_SFP10,
	47	FUNC_SIO,
	48	FUNC_SI,
	49	FUNC_TACHO,
	50	FUNC_TWI,
	51	FUNC_TWI_SCL_M,
	52	FUNC_UART,
	53	FUNC_UART2,
	54	FUNC_MD,
	55	FUNC_PTP1588,
	56	FUNC_MAX
	57	};
	58
	59	static char * const serval_function_names[] = {
	60	[FUNC_NONE] = "none",
	61	[FUNC_GPIO] = "gpio",
	62	[FUNC_IRQ0] = "irq0",
	63	[FUNC_IRQ1] = "irq1",
	64	[FUNC_MIIM1] = "miim1",
	65	[FUNC_PCI_WAKE] = "pci_wake",
	66	[FUNC_PTP0] = "ptp0",
	67	[FUNC_PTP1] = "ptp1",
	68	[FUNC_PTP2] = "ptp2",
	69	[FUNC_PTP3] = "ptp3",
	70	[FUNC_PWM] = "pwm",
	71	[FUNC_RECO_CLK0] = "reco_clk0",
	72	[FUNC_RECO_CLK1] = "reco_clk1",
73	[FUNC_SFP0] = "sfp0",
74	[FUNC_SFP1] = "sfp1",
75	[FUNC_SFP2] = "sfp2",
76	[FUNC_SFP3] = "sfp3",
77	[FUNC_SFP4] = "sfp4",
78	[FUNC_SFP5] = "sfp5",
79	[FUNC_SFP6] = "sfp6",
80	[FUNC_SFP7] = "sfp7",
81	[FUNC_SFP8] = "sfp8",
82	[FUNC_SFP9] = "sfp9",
83	[FUNC_SFP10] = "sfp10",
84	[FUNC_SIO] = "sio",
85	[FUNC_SI] = "si",
86	[FUNC_TACHO] = "tacho",
87	[FUNC_TWI] = "twi",
88	[FUNC_TWI_SCL_M] = "twi_scl_m",
89	[FUNC_UART] = "uart",
90	[FUNC_UART2] = "uart2",
91	[FUNC_MD] = "md",
92	[FUNC_PTP1588] = "1588",
93	};
94
95	MSCC_P(0, SIO, NONE, NONE);
96	MSCC_P(1, SIO, NONE, NONE);
97	MSCC_P(2, SIO, NONE, NONE);
98	MSCC_P(3, SIO, NONE, NONE);
99	MSCC_P(4, TACHO, NONE, NONE);
100	MSCC_P(5, PWM, NONE, NONE);
101	MSCC_P(6, TWI, NONE, NONE);
102	MSCC_P(7, TWI, NONE, NONE);
103	MSCC_P(8, SI, NONE, NONE);
104	MSCC_P(9, SI, MD, NONE);
105	MSCC_P(10, SI, MD, NONE);
106	MSCC_P(11, SFP0, MD, TWI_SCL_M);
107	MSCC_P(12, SFP1, MD, TWI_SCL_M);
108	MSCC_P(13, SFP2, UART2, TWI_SCL_M);
109	MSCC_P(14, SFP3, UART2, TWI_SCL_M);
110	MSCC_P(15, SFP4, PTP1588, TWI_SCL_M);
111	MSCC_P(16, SFP5, PTP1588, TWI_SCL_M);
112	MSCC_P(17, SFP6, PCI_WAKE, TWI_SCL_M);
113	MSCC_P(18, SFP7, NONE, TWI_SCL_M);
114	MSCC_P(19, SFP8, NONE, TWI_SCL_M);
115	MSCC_P(20, SFP9, NONE, TWI_SCL_M);
116	MSCC_P(21, SFP10, NONE, TWI_SCL_M);
117	MSCC_P(22, NONE, NONE, NONE);
118	MSCC_P(23, NONE, NONE, NONE);
119	MSCC_P(24, NONE, NONE, NONE);
120	MSCC_P(25, NONE, NONE, NONE);
121	MSCC_P(26, UART, NONE, NONE);
122	MSCC_P(27, UART, NONE, NONE);
123	MSCC_P(28, IRQ0, NONE, NONE);
124	MSCC_P(29, IRQ1, NONE, NONE);
125	MSCC_P(30, PTP1588, NONE, NONE);
126	MSCC_P(31, PTP1588, NONE, NONE);
127
128	#define SERVAL_PIN(n) { \
129	.name = "GPIO_"#n, \
130	.drv_data = &mscc_pin_##n \
131	}
132
133	static const struct mscc_pin_data serval_pins[] = {
134	SERVAL_PIN(0),
135	SERVAL_PIN(1),
136	SERVAL_PIN(2),
137	SERVAL_PIN(3),
138	SERVAL_PIN(4),
139	SERVAL_PIN(5),
140	SERVAL_PIN(6),
141	SERVAL_PIN(7),
142	SERVAL_PIN(8),
143	SERVAL_PIN(9),
144	SERVAL_PIN(10),
145	SERVAL_PIN(11),
146	SERVAL_PIN(12),
147	SERVAL_PIN(13),
148	SERVAL_PIN(14),
149	SERVAL_PIN(15),
150	SERVAL_PIN(16),
151	SERVAL_PIN(17),
152	SERVAL_PIN(18),
153	SERVAL_PIN(19),
154	SERVAL_PIN(20),
155	SERVAL_PIN(21),
156	SERVAL_PIN(22),
157	SERVAL_PIN(23),
158	SERVAL_PIN(24),
159	SERVAL_PIN(25),
160	SERVAL_PIN(26),
161	SERVAL_PIN(27),
162	SERVAL_PIN(28),
163	SERVAL_PIN(29),
164	SERVAL_PIN(30),
165	SERVAL_PIN(31),
166	};
167
168	static const unsigned long serval_gpios[] = {
169	[MSCC_GPIO_OUT_SET] = 0x00,
170	[MSCC_GPIO_OUT_CLR] = 0x04,
171	[MSCC_GPIO_OUT] = 0x08,
172	[MSCC_GPIO_IN] = 0x0c,
173	[MSCC_GPIO_OE] = 0x10,
174	[MSCC_GPIO_INTR] = 0x14,
175	[MSCC_GPIO_INTR_ENA] = 0x18,
176	[MSCC_GPIO_INTR_IDENT] = 0x1c,
177	[MSCC_GPIO_ALT0] = 0x20,
178	[MSCC_GPIO_ALT1] = 0x24,
179	};
180
181	static int serval_gpio_probe(struct udevice *dev)
182	{
183	struct gpio_dev_priv *uc_priv;
184
185	uc_priv = dev_get_uclass_priv(dev);
186	uc_priv->bank_name = "serval-gpio";
187	uc_priv->gpio_count = ARRAY_SIZE(serval_pins);
188
189	return 0;
190	}
191
192	static struct driver serval_gpio_driver = {
193	.name = "serval-gpio",
194	.id = UCLASS_GPIO,
195	.probe = serval_gpio_probe,
196	.ops = &mscc_gpio_ops,
197	};
198
199	static int serval_pinctrl_probe(struct udevice *dev)
200	{
201	int ret;
202
203	ret = mscc_pinctrl_probe(dev, FUNC_MAX, serval_pins,
204	ARRAY_SIZE(serval_pins),
205	serval_function_names,
206	serval_gpios);
207
208	if (ret)
209	return ret;
210
a2703ce1 SG	211	ret = device_bind(dev, &serval_gpio_driver, "serval-gpio", NULL,
a2703ce1 SG	212	dev_ofnode(dev), NULL);
5c31ce36 HV	213
	214	if (ret)
	215	return ret;
	216
	217	return 0;
	218	}
	219
	220	static const struct udevice_id serval_pinctrl_of_match[] = {
	221	{ .compatible = "mscc,serval-pinctrl" },
	222	{},
	223	};
	224
	225	U_BOOT_DRIVER(serval_pinctrl) = {
	226	.name = "serval-pinctrl",
	227	.id = UCLASS_PINCTRL,
	228	.of_match = of_match_ptr(serval_pinctrl_of_match),
	229	.probe = serval_pinctrl_probe,
41575d8e	230	.priv_auto = sizeof(struct mscc_pinctrl),
5c31ce36 HV	231	.ops = &mscc_pinctrl_ops,
5c31ce36 HV	232	};